Philippe Tillet
082828af47
[OPTIMIZER] Fixed up divisibility analysis in div operation ( #1341 )
2023-03-14 18:17:05 -07:00
Philippe Tillet
f8c92c3d17
[ANALYSIS] initializing operand axisinfo state (if necessary) before visiting operation ( #1259 )
...
Feels very wrong, and probably not the right way to do this. But
otherwise `scf.if` doesn't get initialized since the merge to llvm-head.
Suggestions are welcome 😅
2023-02-27 19:32:19 -08:00
Christian Sigg
9ef4b5d773
Rebase to LLVM-head. ( #1200 )
...
Rebase to
37b7a60cd7
2023-02-17 13:16:11 -08:00
Christian Sigg
fc7a8e3581
Rebase Triton to LLVM-15. ( #1070 )
...
This PR rebases Triton from LLVM-14 to LLVM-15. Most changes are
mechanical, except for the analysis framework changes.
2023-02-16 06:40:53 -08:00
Philippe Tillet
2aba985daa
[OPTIMIZER] Improved layout simplifications heuristics ( #1168 )
2023-02-09 20:17:25 -08:00
Keren Zhou
681d04cf2b
[BACKEND] Fix axisInfo analysis for div ops ( #1157 )
2023-02-07 02:25:23 +00:00
Keren Zhou
bde52f9db2
[BACKEND] Fix alignment calculation ( #1149 )
...
`getDivisibility` represents if the address in bytes is divisible by a
certain number, so we should convert `#aligned bytes` to `#aligned
elements`.
2023-02-03 17:20:23 -08:00
Keren Zhou
82befe32ad
[BACKEND] Improve torch inductor performance ( #1108 )
...
- Rewrite the AxisInfo analysis to handle each op case by case.
- Add bit shift, min max, div/rem, and select ops to AxisInfo.
- Rematerialize across load/store ops in the following two cases:
- A size 1 tensor is considered not expensive since all threads will
load the same
- the targeEncoding may expose more vectorization opportunities (more
elements per thread on the first dim)
**_res2next_** benchmark GPU Kernel time comparison on A100.
- Average kernel sum. Triton 16838630ns vs Triton-MLIR 17105166ns.
**1.016x slowdown**.
- Total kernel sum. Triton 6511735460ns vs Triton-MLIR 6512370620ns.
2023-02-01 18:21:15 -08:00
Philippe Tillet
20100a7254
Merge triton-mlir branch - Complete rewrite of the backend from scratch ( #1004 )
...
This PR merges the `triton-mlir` branch, in which we have been quietly
rewriting the Triton backend from scratch to increase maintainability,
stability and ultimately performance. Changes to the runtime are
minimal, and this new version aims to remain backward-compatible with
the previous commit. The legacy backend is now officially deprecated,
but can still be accessed via the `legacy-backend` tag.
Co-authored-by: Keren Zhou <kerenzhou@openai.com >
Co-authored-by: Yan Chunwei <yanchunwei@outlook.com >
Co-authored-by: goostavz <109190422+goostavz@users.noreply.github.com >
Co-authored-by: Shintaro Iwasaki <siwasaki@fb.com >
Co-authored-by: Yan Da <dyanab@connect.ust.hk >
Co-authored-by: Jun Yang <yangjunpro@gmail.com >
Co-authored-by: Ian Bearman <ianb@microsoft.com >
Co-authored-by: Jason Ansel <jansel@jansel.net >
Co-authored-by: Qingyi Liu <qingyil@nvidia.com >
Co-authored-by: ben-zhang-609 <110140741+ben-zhang-609@users.noreply.github.com >
Co-authored-by: Chenggang Zhao <lyricz@yeah.net >
Co-authored-by: ben-zhang-609 <benzh609@gmail.com >
Co-authored-by: dongdongl <dongdongl@nvidia.com >
2022-12-21 01:30:50 -08:00
