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* Bump rocm-docs-core from 1.4.1 to 1.5.0 in /docs/sphinx (#3396) Bumps [rocm-docs-core](https://github.com/ROCm/rocm-docs-core) from 1.4.1 to 1.5.0. - [Release notes](https://github.com/ROCm/rocm-docs-core/releases) - [Changelog](https://github.com/ROCm/rocm-docs-core/blob/develop/CHANGELOG.md) - [Commits](https://github.com/ROCm/rocm-docs-core/compare/v1.4.1...v1.5.0) --- updated-dependencies: - dependency-name: rocm-docs-core dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> * Bump certifi from 2024.2.2 to 2024.7.4 in /docs/sphinx (#3399) Bumps [certifi](https://github.com/certifi/python-certifi) from 2024.2.2 to 2024.7.4. - [Commits](https://github.com/certifi/python-certifi/compare/2024.02.02...2024.07.04) --- updated-dependencies: - dependency-name: certifi dependency-type: indirect ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> * External CI: build hipBLASLt external dependencies (#3405) * External CI: Increase composable_kernel pipeline time limit (#3407) * [Changelog/release notes] Fix and add custom templates for autotag script (#3408) * Update custom templates * Add custom templates * Fix custom template for hipfort * Fix custom template for hipify * Fix custom template for rvs * External CI: Change composable_kernel pipeline to build for specific GPUs with tests and examples (#3412) * increase task time limit * test building CK for multiple architectures * Update composable_kernel.yml * Update composable_kernel.yml * gfx90a build * gfx941;gfx1100;gfx1030 build * hipTensor gfx941 build * hipTensor gfx941 build * reduce CK timeout to 100 minutes * change all gfx90a targets to gfx942 * Bump sphinx-reredirects from 0.1.4 to 0.1.5 in /docs/sphinx (#3419) Bumps [sphinx-reredirects](https://github.com/documatt/sphinx-reredirects) from 0.1.4 to 0.1.5. - [Commits](https://github.com/documatt/sphinx-reredirects/compare/v0.1.4...v0.1.5) --- updated-dependencies: - dependency-name: sphinx-reredirects dependency-type: direct:production update-type: version-update:semver-patch ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> * Removed TransferBench from the tools list (#3421) * update AI framework image (#3406) * update AI framework image * remove old image * Update system optimization guides headings (#3422) * update headings to system optimization * update index * conv tuning-guides.md to rst * shorten system optimization landing page * update conf.py update toc order add space * Update docs/how-to/tuning-guides.rst Co-authored-by: Leo Paoletti <164940351+lpaoletti@users.noreply.github.com> * update keywords * update intro --------- Co-authored-by: Leo Paoletti <164940351+lpaoletti@users.noreply.github.com> * External CI: move hipBLASLt build directory to ephemeral storage (#3433) * build hipblaslt in /mnt instead * rm checkoutref * remove debug step * Update using-gpu-sanitizer.md with new known issues (#3423) * External CI: move hipBLASLt to new large disk pool * Remove unused custom template for ck (#3438) * External CI: ROCm nightly builds (#3435) * ROCm nightly builds * remove branch trigger, enable develop * Remove unused configurations in conf.py (#3444) * External CI: Switch all pipeline GPU_TARGETS to gfx942 (#3443) * Switch all pipeline gpu targets to gfx942 * Change more pipelines target to gfx942 * set variables for manual testing * Switch all pipeline gpu targets to gfx942 * Change more pipelines target to gfx942 * set variables for manual testing * add test pipeline id * revert test changes * correct gpu target name * remove unused flags; change hipSPARSELt target to be gfx942 * Add MI300X tuning guides (#3448) * Add MI300X tuning guides Add mi300x doc (pandoc conversion) fix headings add metadata move images to shared/ move images to shared/ convert tuning-guides.md to rst using pandoc add mi300x to tuning-guides.rst landing page update h1s, toc, and landing page fix spelling fix fmt format code blocks add tensilelite imgs fix formatting fix formatting some more fix formatting more formatting spelling remove --enforce-eager note satisfy spellcheck linter more spelling add fixes from hongxia fix env var in D5 add fixes to PyTorch inductor section fix fix Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update docs/how-to/tuning-guides/mi300x.rst Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update 'torch_compile_debug' suggestion based on Hongxia's feedback fix PyTorch inductor env vars minor formatting fixes Apply suggestions from code review Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> Update vllm path Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> disable numfig in Sphinx configuration fix formatting and capitalization add words to wordlist update index update wordlist update optimizing-triton-kernel convert cards to table fix link in index.md add @lpaoletti's feedback Add system tuning guide add images add system section add os settings and sys management remove pcie=noats recommendation reorg add blurb to developer section impr formatting remove windows os from tuning guides pages in conf.py add suggestions from review fix typo and link remove os windows from relevant pages in conf mi300x add suggestions from review fix toc fix index links reorg update vLLM vars Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> update vLLM vars Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com> reorganize add warnings add text to system tuning add filler text on index pages reorg tuning pages fix links fix vars * rm old pages fix toc * add suggestions from review small change add more suggestions rewrite intro * add 'workload tuning philosophy' * refactor * fix broken links * black format conf.py * simplify cmd and update doc structure * add higher-level heading for consistency (mi300x.rst) * add fixes from review fix url add fixes fix formatting fix fmt fix hipBLASLt section change words fix tensilelite section fix fix fix fmt * style guide * fix some formatting * satisfy spellcheck linter * update wordlist * fix bad conflict resolution --------- Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Co-authored-by: danielsu-amd <danielsu@amd.com> Co-authored-by: alexxu-amd <159800977+alexxu-amd@users.noreply.github.com> Co-authored-by: spolifroni-amd <Sandra.Polifroni@amd.com> Co-authored-by: randyh62 <42045079+randyh62@users.noreply.github.com> Co-authored-by: Peter Park <peter.park@amd.com> Co-authored-by: Leo Paoletti <164940351+lpaoletti@users.noreply.github.com> Co-authored-by: b-sumner <brian.sumner@amd.com>
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.. meta::
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:description: Supported data types in ROCm
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:keywords: int8, float8, float8 (E4M3), float8 (E5M2), bfloat8, float16, half, bfloat16, tensorfloat32, float,
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float32, float64, double, AMD, ROCm, AMDGPU
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*************************************************************
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Precision support
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*************************************************************
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Use the following sections to identify data types and HIP types ROCm™ supports.
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Integral types
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==========================================
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The signed and unsigned integral types that are supported by ROCm are listed in the following table,
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together with their corresponding HIP type and a short description.
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.. list-table::
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:header-rows: 1
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:widths: 15,35,50
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*
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- Type name
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- HIP type
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- Description
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*
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- int8
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- ``int8_t``, ``uint8_t``
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- A signed or unsigned 8-bit integer
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*
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- int16
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- ``int16_t``, ``uint16_t``
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- A signed or unsigned 16-bit integer
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*
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- int32
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- ``int32_t``, ``uint32_t``
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- A signed or unsigned 32-bit integer
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*
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- int64
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- ``int64_t``, ``uint64_t``
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- A signed or unsigned 64-bit integer
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Floating-point types
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==========================================
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The floating-point types that are supported by ROCm are listed in the following table, together with
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their corresponding HIP type and a short description.
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.. image:: ../data/about/compatibility/floating-point-data-types.png
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:alt: Supported floating-point types
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.. list-table::
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:header-rows: 1
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:widths: 15,15,70
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*
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- Type name
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- HIP type
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- Description
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*
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- float8 (E4M3)
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- ``-``
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- An 8-bit floating-point number that mostly follows IEEE-754 conventions and **S1E4M3** bit layout, as described in `8-bit Numerical Formats for Deep Neural Networks <https://arxiv.org/abs/2206.02915>`_ , with expanded range and with no infinity or signed zero. NaN is represented as negative zero.
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*
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- float8 (E5M2)
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- ``-``
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- An 8-bit floating-point number mostly following IEEE-754 conventions and **S1E5M2** bit layout, as described in `8-bit Numerical Formats for Deep Neural Networks <https://arxiv.org/abs/2206.02915>`_ , with expanded range and with no infinity or signed zero. NaN is represented as negative zero.
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*
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- float16
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- ``half``
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- A 16-bit floating-point number that conforms to the IEEE 754-2008 half-precision storage format.
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*
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- bfloat16
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- ``bfloat16``
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- A shortened 16-bit version of the IEEE 754 single-precision storage format.
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*
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- tensorfloat32
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- ``-``
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- A floating-point number that occupies 32 bits or less of storage, providing improved range compared to half (16-bit) format, at (potentially) greater throughput than single-precision (32-bit) formats.
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*
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- float32
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- ``float``
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- A 32-bit floating-point number that conforms to the IEEE 754 single-precision storage format.
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*
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- float64
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- ``double``
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- A 64-bit floating-point number that conforms to the IEEE 754 double-precision storage format.
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.. note::
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* The float8 and tensorfloat32 types are internal types used in calculations in Matrix Cores and can be stored in any type of the same size.
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* The encodings for FP8 (E5M2) and FP8 (E4M3) that are natively supported by MI300 differ from the FP8 (E5M2) and FP8 (E4M3) encodings used in H100 (`FP8 Formats for Deep Learning <https://arxiv.org/abs/2209.05433>`_).
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* In some AMD documents and articles, float8 (E5M2) is referred to as bfloat8.
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ROCm support icons
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==========================================
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In the following sections, we use icons to represent the level of support. These icons, described in the
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following table, are also used on the library data type support pages.
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.. list-table::
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:header-rows: 1
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*
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- Icon
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- Definition
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*
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- ❌
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- Not supported
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*
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- ⚠️
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- Partial support
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*
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- ✅
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- Full support
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.. note::
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* Full support means that the type is supported natively or with hardware emulation.
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* Native support means that the operations for that type are implemented in hardware. Types that are not natively supported are emulated with the available hardware. The performance of non-natively supported types can differ from the full instruction throughput rate. For example, 16-bit integer operations can be performed on the 32-bit integer ALUs at full rate; however, 64-bit integer operations might need several instructions on the 32-bit integer ALUs.
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* Any type can be emulated by software, but this page does not cover such cases.
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Hardware type support
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==========================================
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AMD GPU hardware support for data types is listed in the following tables.
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Compute units support
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-------------------------------------------------------------------------------
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The following table lists data type support for compute units.
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.. tab-set::
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.. tab-item:: Integral types
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:sync: integral-type
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.. list-table::
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:header-rows: 1
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*
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- Type name
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- int8
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- int16
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- int32
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- int64
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*
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- MI100
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- ✅
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- ✅
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- ✅
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- ✅
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*
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- MI200 series
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- ✅
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- ✅
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- ✅
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- ✅
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*
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- MI300 series
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- ✅
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- ✅
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- ✅
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- ✅
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.. tab-item:: Floating-point types
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:sync: floating-point-type
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.. list-table::
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:header-rows: 1
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*
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- Type name
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- float8 (E4M3)
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- float8 (E5M2)
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- float16
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- bfloat16
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- tensorfloat32
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- float32
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- float64
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*
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- MI100
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- ❌
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- ❌
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- ✅
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- ✅
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- ❌
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- ✅
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- ✅
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*
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- MI200 series
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- ❌
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- ❌
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- ✅
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- ✅
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- ❌
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- ✅
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- ✅
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*
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- MI300 series
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- ❌
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- ❌
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- ✅
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- ✅
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- ❌
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- ✅
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- ✅
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Matrix core support
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-------------------------------------------------------------------------------
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The following table lists data type support for AMD GPU matrix cores.
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.. tab-set::
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.. tab-item:: Integral types
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:sync: integral-type
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.. list-table::
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:header-rows: 1
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*
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- Type name
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- int8
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- int16
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- int32
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- int64
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*
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- MI100
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- ✅
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- ❌
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- ❌
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- ❌
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*
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- MI200 series
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- ✅
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- ❌
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- ❌
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- ❌
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*
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- MI300 series
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- ✅
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- ❌
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- ❌
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- ❌
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.. tab-item:: Floating-point types
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:sync: floating-point-type
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.. list-table::
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:header-rows: 1
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*
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- Type name
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- float8 (E4M3)
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- float8 (E5M2)
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- float16
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- bfloat16
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- tensorfloat32
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- float32
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- float64
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*
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- MI100
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- ❌
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- ❌
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- ✅
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- ✅
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- ❌
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- ✅
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- ❌
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*
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- MI200 series
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- ❌
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- ❌
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- ✅
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- ✅
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- ❌
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- ✅
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- ✅
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*
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- MI300 series
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- ✅
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- ✅
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- ✅
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- ✅
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- ✅
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- ✅
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- ✅
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Atomic operations support
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-------------------------------------------------------------------------------
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The following table lists data type support for atomic operations.
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.. tab-set::
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.. tab-item:: Integral types
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:sync: integral-type
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.. list-table::
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:header-rows: 1
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*
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- Type name
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- int8
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- int16
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- int32
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- int64
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*
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- MI100
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- ❌
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- ❌
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- ✅
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- ❌
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*
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- MI200 series
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- ❌
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- ❌
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- ✅
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- ✅
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*
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- MI300 series
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- ❌
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- ❌
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- ✅
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- ✅
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.. tab-item:: Floating-point types
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:sync: floating-point-type
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.. list-table::
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:header-rows: 1
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*
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- Type name
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- float8 (E4M3)
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- float8 (E5M2)
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- float16
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- bfloat16
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- tensorfloat32
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- float32
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- float64
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*
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- MI100
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- ❌
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- ❌
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- ✅
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- ❌
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- ❌
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- ✅
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- ❌
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*
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- MI200 series
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- ❌
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- ❌
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- ✅
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- ❌
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- ❌
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- ✅
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- ✅
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*
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- MI300 series
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- ❌
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- ❌
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- ✅
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- ❌
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- ❌
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- ✅
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- ✅
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.. note::
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For cases that are not natively supported, you can emulate atomic operations using software.
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Software-emulated atomic operations have high negative performance impact when they frequently
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access the same memory address.
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Data Type support in ROCm Libraries
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==========================================
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ROCm library support for int8, float8 (E4M3), float8 (E5M2), int16, float16, bfloat16, int32,
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tensorfloat32, float32, int64, and float64 is listed in the following tables.
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Libraries input/output type support
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-------------------------------------------------------------------------------
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The following tables list ROCm library support for specific input and output data types. For a detailed
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description, refer to the corresponding library data type support page.
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.. tab-set::
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.. tab-item:: Integral types
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:sync: integral-type
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.. list-table::
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:header-rows: 1
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*
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- Library input/output data type name
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- int8
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- int16
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- int32
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- int64
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*
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- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
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- ✅/✅
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- ❌/❌
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- ❌/❌
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- ❌/❌
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*
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- rocRAND (:doc:`details <rocrand:data-type-support>`)
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- -/✅
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- -/✅
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- -/✅
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- -/✅
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*
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- hipRAND (:doc:`details <hiprand:api-reference/data-type-support>`)
|
|
- -/✅
|
|
- -/✅
|
|
- -/✅
|
|
- -/✅
|
|
*
|
|
- rocPRIM (:doc:`details <rocprim:reference/data-type-support>`)
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ✅/✅
|
|
*
|
|
- hipCUB (:doc:`details <hipcub:api-reference/data-type-support>`)
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ✅/✅
|
|
*
|
|
- rocThrust (:doc:`details <rocthrust:data-type-support>`)
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ✅/✅
|
|
|
|
.. tab-item:: Floating-point types
|
|
:sync: floating-point-type
|
|
|
|
.. list-table::
|
|
:header-rows: 1
|
|
|
|
*
|
|
- Library input/output data type name
|
|
- float8 (E4M3)
|
|
- float8 (E5M2)
|
|
- float16
|
|
- bfloat16
|
|
- tensorfloat32
|
|
- float32
|
|
- float64
|
|
*
|
|
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
|
|
- ❌/❌
|
|
- ❌/❌
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ❌/❌
|
|
- ❌/❌
|
|
- ❌/❌
|
|
*
|
|
- rocRAND (:doc:`details <rocrand:data-type-support>`)
|
|
- -/❌
|
|
- -/❌
|
|
- -/✅
|
|
- -/❌
|
|
- -/❌
|
|
- -/✅
|
|
- -/✅
|
|
*
|
|
- hipRAND (:doc:`details <hiprand:api-reference/data-type-support>`)
|
|
- -/❌
|
|
- -/❌
|
|
- -/✅
|
|
- -/❌
|
|
- -/❌
|
|
- -/✅
|
|
- -/✅
|
|
*
|
|
- rocPRIM (:doc:`details <rocprim:reference/data-type-support>`)
|
|
- ❌/❌
|
|
- ❌/❌
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ❌/❌
|
|
- ✅/✅
|
|
- ✅/✅
|
|
*
|
|
- hipCUB (:doc:`details <hipcub:api-reference/data-type-support>`)
|
|
- ❌/❌
|
|
- ❌/❌
|
|
- ✅/✅
|
|
- ✅/✅
|
|
- ❌/❌
|
|
- ✅/✅
|
|
- ✅/✅
|
|
*
|
|
- rocThrust (:doc:`details <rocthrust:data-type-support>`)
|
|
- ❌/❌
|
|
- ❌/❌
|
|
- ⚠️/⚠️
|
|
- ⚠️/⚠️
|
|
- ❌/❌
|
|
- ✅/✅
|
|
- ✅/✅
|
|
|
|
|
|
Libraries internal calculations type support
|
|
-------------------------------------------------------------------------------
|
|
|
|
The following tables list ROCm library support for specific internal data types. For a detailed
|
|
description, refer to the corresponding library data type support page.
|
|
|
|
.. tab-set::
|
|
|
|
.. tab-item:: Integral types
|
|
:sync: integral-type
|
|
|
|
.. list-table::
|
|
:header-rows: 1
|
|
|
|
*
|
|
- Library internal data type name
|
|
- int8
|
|
- int16
|
|
- int32
|
|
- int64
|
|
*
|
|
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
|
|
- ❌
|
|
- ❌
|
|
- ✅
|
|
- ❌
|
|
|
|
|
|
.. tab-item:: Floating-point types
|
|
:sync: floating-point-type
|
|
|
|
.. list-table::
|
|
:header-rows: 1
|
|
|
|
*
|
|
- Library internal data type name
|
|
- float8 (E4M3)
|
|
- float8 (E5M2)
|
|
- float16
|
|
- bfloat16
|
|
- tensorfloat32
|
|
- float32
|
|
- float64
|
|
*
|
|
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
|
|
- ❌
|
|
- ❌
|
|
- ❌
|
|
- ❌
|
|
- ❌
|
|
- ✅
|
|
- ❌
|