Files
ROCm/docs/compatibility/precision-support.rst
Sam Wu 2d0c702f65 Merge develop into roc-6.1.x (#3099)
* Add ROCm version 6.1.0 to version list (#3023)

* Update CHANGELOG.md

Added GitHub links to Changelog

* Update CHANGELOG.md

* Update manifest for ROCm 6.1.0 (#3022)

* Reorganize default.xml by group and alphabetically

* Add rocDecode to default.xml

* Add rocDecode to included names in tag script

* update tag to 6.1.0

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* Update CHANGELOG.md

Updated ROCm Compiler with fixed issue

* docs(tools/autotag/README.md): Add additional note to avoid duplicating data in changelog template (#3018)

* Bump rocm-docs-core from 0.38.1 to 1.0.0 in /docs/sphinx

Bumps [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) from 0.38.1 to 1.0.0.
- [Release notes](https://github.com/RadeonOpenCompute/rocm-docs-core/releases)
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* Use Ubuntu 22.04 and Python 3.10 in RTD config

* Update README.md (#3043)

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Fix rocSPARSE build link

* Update link to just general page, instead of anchor

* Add 'JAX for ROCm' link to index.md (#3034)

* Add JAX for ROCm link to index.md

* Reorder third-party libraries installation guides in index

* Update links to rocAL component (#3033)

* Update links to rocAL component

* Change absolute rocm docs links to relative

* Update compatibility/precision-support links (#3030)

* Change links to component data type support pages from absolute to relative

* Fix rocPRIM data type support links

* Empty commit to trigger demo rebuild.

* Update excluded and included projects

* Separate templates into a module; Fix MIVisionX template

* Add hipfort changelog processor

* Add rpp custom processor

* Add custom processor for rvs

* update the code-owner list (#3046)

* Update default.xml (#3038)

* Remove HIPCC from default.xml

HIPCC moved into llvm-project

* Remove ROCm-Device-Libs from default.xml

ROCm-Device-Libs was moved into llvm-project

* Remove ROCm-CompilerSupport from default.xml

ROCm-CompilerSupport was moved into llvm-project

* Add rocprofiler-register to default.xml

Added in 6.1 manifest

* Apply mathlibs group to projects in manifest

* Bump rocm-docs-core from 0.38.1 to 1.0.0 in /docs/sphinx (#3047)

* Bump rocm-docs-core from 0.38.1 to 1.0.0 in /docs/sphinx

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* Add 6.1.0.md template

* Add AMD SMI to 6.1.0 template

* Add ROCm Compiler to 6.1.0 template

* Add RDC to 6.1.0 template

* Add ROCgdb to 6.1.0 template

* Add ROCm SMI to 6.1.0 template

* Add ROCProfiler to 6.1.0 template

* Add MI200 SR-IOV known issue to 6.1.0 template

* Add MI300 RAS fixed defect to 6.1.0 template

* docs(6.1.0.md): Add more changelog notes for 6.1.0

* Update 6.1.0.md

Added links to GitHub for known issues and ROCm Compiler fixed defect

* Test autotag script

* Add ck template

* Add HIPIFY to included names for tag script

* Remove rocprofiler from tag_script

* Remove RVS template

Determine cause of missing later

* Add HIPIFY to template for 6.1.0

* Add extra line to topp of template for formatting changelog

* Update 5.7.1.md

Fixing the broken link for rocBLAS programmer's guide in 5.7.1 Changelog.

* Regenerate changelog with new 5.7.1 link fix

* Add note for tag_script included_names

* Improve readability of GPU architecture hardware specs (#3009)

* move units of measurement to table headers

* add glossary explaining table headers

* add missed units and update h1

* toc listing to say indicate Accelerators & GPUs

* fix typo

* update meta description and keywords

* Update title in toc to fit in sidebar

* update title, toc, and filename

* Fix broken link to HIP programming guide

* Revert "update title, toc, and filename"

This reverts commit 6b9e687805.

* Revert glossary; slight fixes

* Change 'Pro' to 'PRO' for consistency

* Add references to programming and hardware architecture guides

* Change 'warp' to 'wavefront'

* Update changelog.jinja to exclude version number in header for lindividual libraries (#3058)

* Base set of Azure DevOps pipeline library source (#3021)

* Base set of Azure DevOps pipeline library source

A base set of yaml files to orchestrate the build and testing of ROCm compiler and runtime components in an Azure DevOps project.

* Use hipcc in llvm-project, also build OpenCL runtime.

* Adding llvm-lit tests to llvm-project pipeline.

Added comgr ctest as well.

* rocm-cmake unit testing in pipeline

* Pipeline changes corresponding to 6.1 release

* Bump rocm-docs-core from 1.0.0 to 1.1.0 in /docs/sphinx (#3063)

Bumps [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) from 1.0.0 to 1.1.0.
- [Release notes](https://github.com/RadeonOpenCompute/rocm-docs-core/releases)
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* Bump rocm-docs-core from 1.0.0 to 1.1.0 in /docs/sphinx

Bumps [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) from 1.0.0 to 1.1.0.
- [Release notes](https://github.com/RadeonOpenCompute/rocm-docs-core/releases)
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* update the default.xml for ROCm6.1 (#3067)

Co-authored-by: Wang, Yanyao <yanyao.wang@amd.com>

* Bump urllib3 from 1.26.13 to 1.26.18 in /docs/sphinx (#3068)

Bumps [urllib3](https://github.com/urllib3/urllib3) from 1.26.13 to 1.26.18.
- [Release notes](https://github.com/urllib3/urllib3/releases)
- [Changelog](https://github.com/urllib3/urllib3/blob/main/CHANGES.rst)
- [Commits](https://github.com/urllib3/urllib3/compare/1.26.13...1.26.18)

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* Add 6.1.1.md template

* Bump rocm-docs-core from 1.1.0 to 1.1.1 in /docs/sphinx (#3070)

Bumps [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) from 1.1.0 to 1.1.1.
- [Release notes](https://github.com/RadeonOpenCompute/rocm-docs-core/releases)
- [Changelog](https://github.com/ROCm/rocm-docs-core/blob/develop/CHANGELOG.md)
- [Commits](https://github.com/RadeonOpenCompute/rocm-docs-core/compare/v1.1.0...v1.1.1)

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* Fix broken link on hardware specs page (#3075)

* Fix broken link

Fix broken link on hardware specs page to HIP programming model due to
refactoring of HIP docs.

* Update link anchor

* Tagged builds of External CI components (#3078)

* Tagged builds of External CI components

Adding capability to kick off builds of ROCm components based on a tag ref, without the need of the yaml file in the corresponding repo that is used for pre-submit and on-submit builds. This unblocks the team from creating an initial set of pipelines to verify things work.

Also made some improvements to the code structure and added support for more repos.

---------

Co-authored-by: abhimeda <abhinav.meda@amd.com>
Co-authored-by: alexxu-amd <alex.xu@amd.com>

* More external CI pipelines (#3083)

Changing default behaviour for PRs with tag-builds.
Changing build system for some jobs based on execution time.

Co-authored-by: abhimeda <abhinav.meda@amd.com>
Co-authored-by: alexxu-amd <alex.xu@amd.com>

* Add compatibility matrix (#3082)

* add compatibility matrix and custom css

* fix toc

* reorder some components in matrix, add missing tools to reference page

* Update docs/compatibility/compatibility-matrix.rst

Co-authored-by: Leo Paoletti <164940351+lpaoletti@users.noreply.github.com>

---------

Co-authored-by: Leo Paoletti <164940351+lpaoletti@users.noreply.github.com>

* update OS strings to be more readable and searchable (#3088)

* Tag build pipelines for four more ROCm repos (#3085)

-rocgdb
-hipother via HIP build with targeted platform
-hipSOLVER
-hipSPARSELt

* Bump jinja2 from 3.1.3 to 3.1.4 in /docs/sphinx (#3089)

Bumps [jinja2](https://github.com/pallets/jinja) from 3.1.3 to 3.1.4.
- [Release notes](https://github.com/pallets/jinja/releases)
- [Changelog](https://github.com/pallets/jinja/blob/main/CHANGES.rst)
- [Commits](https://github.com/pallets/jinja/compare/3.1.3...3.1.4)

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* Compatibility Matrix - include AMDSMI (#3090)

* Extend codeowners for docs (#3091)

* Add release notes

Improve wording

Clarify Ubuntu 22.04.5 is pre-release

Add AMD SMI changes

Fix md headings and some words

Reword highlight

Add feedback from Leo to release highlight

Add generated changelog

Add RELEASE.md for 6.1.1

Update highlight in RELEASE.md with change in 6.1.1 template

Change h1 in CHANGELOG.md

to ROCm 6.1.1 changelog

Change release notes to changelog in CHANGELOG.md

Fix missing info in CHANGELOG.md pre-6.1.1

Add HIPIFY 6.1.1 to changelog

Add HIPIFY to RELEASE.md

Also fix typo in changelog

Add HIPIFY to 6.1.1 template

* Fix util imports

* Skip and log missing branches for release_data.py

* Update autotag readme

* Remove ck template

* Fix changelog and release notes

Add \n to top of 6.0.2 template

Update RELEASE.md and 6.1.1.md

Regenerate changelog

Add minor wording changes in RELEASE.md

Incorporate Leo's feedback

Reformat RELEASE.md to fix build issue

Fixes an issue preventing Changelog from appearing in the TOC.

Update AMDSMI link & change 'release highlights' to 'release notes'

Change AMD SMI link from develop to docs/6.1.1

* Bump rocm-docs-core from 1.1.0 to 1.1.1 in /docs/sphinx

Bumps [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) from 1.1.0 to 1.1.1.
- [Release notes](https://github.com/RadeonOpenCompute/rocm-docs-core/releases)
- [Changelog](https://github.com/ROCm/rocm-docs-core/blob/develop/CHANGELOG.md)
- [Commits](https://github.com/RadeonOpenCompute/rocm-docs-core/compare/v1.1.0...v1.1.1)

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* Update changelog and release notes for 6.1.1

Reformat 6.1.0 to 6.0.0 changelog

Add ROCm SMI known issues to RN

Tweak ROCm SMI wording

Add known issue

Reword known issue rn

Fix headings and wording

Remove redundancy

Fix headings and known issue words

Leo changes

Remove known issue with Radeon GPUs

Specify Navi3 GPUs in ROCM SMI known issue

Change Navi 3x to RDNA3

Add OS support note

Fix 6.1.1 template link to amdsmi

Update 6.1.1 library table, add hipBLASLt to 6.1.1 CL/RN, update HIPCC upcoming changes wording

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.. meta::
:description: Supported data types in ROCm
:keywords: int8, float8, float8 (E4M3), float8 (E5M2), bfloat8, float16, half, bfloat16, tensorfloat32, float,
float32, float64, double, AMD, ROCm, AMDGPU
*************************************************************
Precision support
*************************************************************
Use the following sections to identify data types and HIP types ROCm™ supports.
Integral types
==========================================
The signed and unsigned integral types that are supported by ROCm are listed in the following table,
together with their corresponding HIP type and a short description.
.. list-table::
:header-rows: 1
:widths: 15,35,50
*
- Type name
- HIP type
- Description
*
- int8
- ``int8_t``, ``uint8_t``
- A signed or unsigned 8-bit integer
*
- int16
- ``int16_t``, ``uint16_t``
- A signed or unsigned 16-bit integer
*
- int32
- ``int32_t``, ``uint32_t``
- A signed or unsigned 32-bit integer
*
- int64
- ``int64_t``, ``uint64_t``
- A signed or unsigned 64-bit integer
Floating-point types
==========================================
The floating-point types that are supported by ROCm are listed in the following table, together with
their corresponding HIP type and a short description.
.. image:: ../data/about/compatibility/floating-point-data-types.png
:alt: Supported floating-point types
.. list-table::
:header-rows: 1
:widths: 15,15,70
*
- Type name
- HIP type
- Description
*
- float8 (E4M3)
- ``-``
- An 8-bit floating-point number that mostly follows IEEE-754 conventions and **S1E4M3** bit layout, as described in `8-bit Numerical Formats for Deep Neural Networks <https://arxiv.org/abs/2206.02915>`_ , with expanded range and with no infinity or signed zero. NaN is represented as negative zero.
*
- float8 (E5M2)
- ``-``
- An 8-bit floating-point number mostly following IEEE-754 conventions and **S1E5M2** bit layout, as described in `8-bit Numerical Formats for Deep Neural Networks <https://arxiv.org/abs/2206.02915>`_ , with expanded range and with no infinity or signed zero. NaN is represented as negative zero.
*
- float16
- ``half``
- A 16-bit floating-point number that conforms to the IEEE 754-2008 half-precision storage format.
*
- bfloat16
- ``bfloat16``
- A shortened 16-bit version of the IEEE 754 single-precision storage format.
*
- tensorfloat32
- ``-``
- A floating-point number that occupies 32 bits or less of storage, providing improved range compared to half (16-bit) format, at (potentially) greater throughput than single-precision (32-bit) formats.
*
- float32
- ``float``
- A 32-bit floating-point number that conforms to the IEEE 754 single-precision storage format.
*
- float64
- ``double``
- A 64-bit floating-point number that conforms to the IEEE 754 double-precision storage format.
.. note::
* The float8 and tensorfloat32 types are internal types used in calculations in Matrix Cores and can be stored in any type of the same size.
* The encodings for FP8 (E5M2) and FP8 (E4M3) that are natively supported by MI300 differ from the FP8 (E5M2) and FP8 (E4M3) encodings used in H100 (`FP8 Formats for Deep Learning <https://arxiv.org/abs/2209.05433>`_).
* In some AMD documents and articles, float8 (E5M2) is referred to as bfloat8.
ROCm support icons
==========================================
In the following sections, we use icons to represent the level of support. These icons, described in the
following table, are also used on the library data type support pages.
.. list-table::
:header-rows: 1
*
- Icon
- Definition
*
-
- Not supported
*
- ⚠️
- Partial support
*
-
- Full support
.. note::
* Full support means that the type is supported natively or with hardware emulation.
* Native support means that the operations for that type are implemented in hardware. Types that are not natively supported are emulated with the available hardware. The performance of non-natively supported types can differ from the full instruction throughput rate. For example, 16-bit integer operations can be performed on the 32-bit integer ALUs at full rate; however, 64-bit integer operations might need several instructions on the 32-bit integer ALUs.
* Any type can be emulated by software, but this page does not cover such cases.
Hardware type support
==========================================
AMD GPU hardware support for data types is listed in the following tables.
Compute units support
-------------------------------------------------------------------------------
The following table lists data type support for compute units.
.. tab-set::
.. tab-item:: Integral types
:sync: integral-type
.. list-table::
:header-rows: 1
*
- Type name
- int8
- int16
- int32
- int64
*
- MI100
-
-
-
-
*
- MI200 series
-
-
-
-
*
- MI300 series
-
-
-
-
.. tab-item:: Floating-point types
:sync: floating-point-type
.. list-table::
:header-rows: 1
*
- Type name
- float8 (E4M3)
- float8 (E5M2)
- float16
- bfloat16
- tensorfloat32
- float32
- float64
*
- MI100
-
-
-
-
-
-
-
*
- MI200 series
-
-
-
-
-
-
-
*
- MI300 series
-
-
-
-
-
-
-
Matrix core support
-------------------------------------------------------------------------------
The following table lists data type support for AMD GPU matrix cores.
.. tab-set::
.. tab-item:: Integral types
:sync: integral-type
.. list-table::
:header-rows: 1
*
- Type name
- int8
- int16
- int32
- int64
*
- MI100
-
-
-
-
*
- MI200 series
-
-
-
-
*
- MI300 series
-
-
-
-
.. tab-item:: Floating-point types
:sync: floating-point-type
.. list-table::
:header-rows: 1
*
- Type name
- float8 (E4M3)
- float8 (E5M2)
- float16
- bfloat16
- tensorfloat32
- float32
- float64
*
- MI100
-
-
-
-
-
-
-
*
- MI200 series
-
-
-
-
-
-
-
*
- MI300 series
-
-
-
-
-
-
-
Atomic operations support
-------------------------------------------------------------------------------
The following table lists data type support for atomic operations.
.. tab-set::
.. tab-item:: Integral types
:sync: integral-type
.. list-table::
:header-rows: 1
*
- Type name
- int8
- int16
- int32
- int64
*
- MI100
-
-
-
-
*
- MI200 series
-
-
-
-
*
- MI300 series
-
-
-
-
.. tab-item:: Floating-point types
:sync: floating-point-type
.. list-table::
:header-rows: 1
*
- Type name
- float8 (E4M3)
- float8 (E5M2)
- float16
- bfloat16
- tensorfloat32
- float32
- float64
*
- MI100
-
-
-
-
-
-
-
*
- MI200 series
-
-
-
-
-
-
-
*
- MI300 series
-
-
-
-
-
-
-
.. note::
For cases that are not natively supported, you can emulate atomic operations using software.
Software-emulated atomic operations have high negative performance impact when they frequently
access the same memory address.
Data Type support in ROCm Libraries
==========================================
ROCm library support for int8, float8 (E4M3), float8 (E5M2), int16, float16, bfloat16, int32,
tensorfloat32, float32, int64, and float64 is listed in the following tables.
Libraries input/output type support
-------------------------------------------------------------------------------
The following tables list ROCm library support for specific input and output data types. For a detailed
description, refer to the corresponding library data type support page.
.. tab-set::
.. tab-item:: Integral types
:sync: integral-type
.. list-table::
:header-rows: 1
*
- Library input/output data type name
- int8
- int16
- int32
- int64
*
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
- ✅/✅
- ❌/❌
- ❌/❌
- ❌/❌
*
- rocRAND (:doc:`details <rocrand:data-type-support>`)
- -/✅
- -/✅
- -/✅
- -/✅
*
- hipRAND (:doc:`details <hiprand:data-type-support>`)
- -/✅
- -/✅
- -/✅
- -/✅
*
- rocPRIM (:doc:`details <rocprim:reference/data-type-support>`)
- ✅/✅
- ✅/✅
- ✅/✅
- ✅/✅
*
- hipCUB (:doc:`details <hipcub:data-type-support>`)
- ✅/✅
- ✅/✅
- ✅/✅
- ✅/✅
*
- rocThrust (:doc:`details <rocthrust:data-type-support>`)
- ✅/✅
- ✅/✅
- ✅/✅
- ✅/✅
.. tab-item:: Floating-point types
:sync: floating-point-type
.. list-table::
:header-rows: 1
*
- Library input/output data type name
- float8 (E4M3)
- float8 (E5M2)
- float16
- bfloat16
- tensorfloat32
- float32
- float64
*
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
- ❌/❌
- ❌/❌
- ✅/✅
- ✅/✅
- ❌/❌
- ❌/❌
- ❌/❌
*
- rocRAND (:doc:`details <rocrand:data-type-support>`)
- -/❌
- -/❌
- -/✅
- -/❌
- -/❌
- -/✅
- -/✅
*
- hipRAND (:doc:`details <hiprand:data-type-support>`)
- -/❌
- -/❌
- -/✅
- -/❌
- -/❌
- -/✅
- -/✅
*
- rocPRIM (:doc:`details <rocprim:reference/data-type-support>`)
- ❌/❌
- ❌/❌
- ✅/✅
- ✅/✅
- ❌/❌
- ✅/✅
- ✅/✅
*
- hipCUB (:doc:`details <hipcub:data-type-support>`)
- ❌/❌
- ❌/❌
- ✅/✅
- ✅/✅
- ❌/❌
- ✅/✅
- ✅/✅
*
- rocThrust (:doc:`details <rocthrust:data-type-support>`)
- ❌/❌
- ❌/❌
- ⚠️/⚠️
- ⚠️/⚠️
- ❌/❌
- ✅/✅
- ✅/✅
Libraries internal calculations type support
-------------------------------------------------------------------------------
The following tables list ROCm library support for specific internal data types. For a detailed
description, refer to the corresponding library data type support page.
.. tab-set::
.. tab-item:: Integral types
:sync: integral-type
.. list-table::
:header-rows: 1
*
- Library internal data type name
- int8
- int16
- int32
- int64
*
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
-
-
-
-
.. tab-item:: Floating-point types
:sync: floating-point-type
.. list-table::
:header-rows: 1
*
- Library internal data type name
- float8 (E4M3)
- float8 (E5M2)
- float16
- bfloat16
- tensorfloat32
- float32
- float64
*
- hipSPARSELt (:doc:`details <hipsparselt:reference/data-type-support>`)
-
-
-
-
-
-
-