Thomas Raoux 6bc1d9e1be [BACKEND] Support MMA V3 with register operand (#2375) ...

MMA V3 support taking operand A from register. This helps for chained
matmul operations like in attention.
Add an optimization to use this mode when it helps and add the lowering
for it.

2023-09-25 10:43:54 -07:00

..

CMakeLists.txt

[BACKEND] Add LLVM pre-processing pass to break struct types (#2285)

2023-09-13 10:03:29 -07:00

RegisterTritonDialects.h

[BACKEND] Support MMA V3 with register operand (#2375)

2023-09-25 10:43:54 -07:00

triton-llvm-opt.cpp

[BACKEND] Add LLVM pre-processing pass to break struct types (#2285)

2023-09-13 10:03:29 -07:00

triton-opt.cpp

[TESTS] Add triton version of mlir-reduce (#1498)

2023-04-10 13:31:11 -07:00

triton-reduce.cpp

[TESTS] Add triton version of mlir-reduce (#1498)

2023-04-10 13:31:11 -07:00

triton-translate.cpp

[ROCM] Core Functionality for AMD (#1983)

2023-08-31 14:02:00 -07:00