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e46446e7e4
Co-authored-by: deepak1556 <hop2deep@gmail.com> Co-authored-by: Jeremy Rose <nornagon@nornagon.net>
76 lines
2.7 KiB
Diff
76 lines
2.7 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Richard Townsend <richard.townsend@arm.com>
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Date: Wed, 24 Apr 2019 13:57:36 +0100
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Subject: Workaround an undefined symbol error
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Previously, builds configured with dcheck_always_on=true would error
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with messages like this in the log:
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lld-link: error: undefined symbol: public: bool __cdecl
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v8::internal::CPURegister::IsZero(void) const
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By moving some functions out of the the arm64-assembler header file,
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this error no longer seems to happen.
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diff --git a/src/codegen/arm64/assembler-arm64.cc b/src/codegen/arm64/assembler-arm64.cc
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index 8a44d21428b047eed73e0cf405c5064a0649b8cf..495c950b6cf725f4c4287e204d601ce178dc825d 100644
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--- a/src/codegen/arm64/assembler-arm64.cc
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+++ b/src/codegen/arm64/assembler-arm64.cc
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@@ -3653,6 +3653,22 @@ void Assembler::MoveWide(const Register& rd, uint64_t imm, int shift,
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ImmMoveWide(static_cast<int>(imm)) | ShiftMoveWide(shift));
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}
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+Instr Assembler::RmNot31(CPURegister rm) {
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+ DCHECK_NE(rm.code(), kSPRegInternalCode);
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+ DCHECK(!rm.IsZero());
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+ return Rm(rm);
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+}
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+
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+Instr Assembler::RdSP(Register rd) {
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+ DCHECK(!rd.IsZero());
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+ return (rd.code() & kRegCodeMask) << Rd_offset;
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+}
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+
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+Instr Assembler::RnSP(Register rn) {
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+ DCHECK(!rn.IsZero());
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+ return (rn.code() & kRegCodeMask) << Rn_offset;
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+}
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+
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void Assembler::AddSub(const Register& rd, const Register& rn,
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const Operand& operand, FlagsUpdate S, AddSubOp op) {
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DCHECK_EQ(rd.SizeInBits(), rn.SizeInBits());
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diff --git a/src/codegen/arm64/assembler-arm64.h b/src/codegen/arm64/assembler-arm64.h
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index 41bdb03b4f5a574eb86e69ba8e3edfe9ceea4ed8..84e9b2771decba32e86e90625e4f1b7551fc9f12 100644
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--- a/src/codegen/arm64/assembler-arm64.h
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+++ b/src/codegen/arm64/assembler-arm64.h
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@@ -2120,11 +2120,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
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return rm.code() << Rm_offset;
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}
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- static Instr RmNot31(CPURegister rm) {
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- DCHECK_NE(rm.code(), kSPRegInternalCode);
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- DCHECK(!rm.IsZero());
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- return Rm(rm);
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- }
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+ static Instr RmNot31(CPURegister rm);
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static Instr Ra(CPURegister ra) {
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DCHECK_NE(ra.code(), kSPRegInternalCode);
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@@ -2148,15 +2144,8 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
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// These encoding functions allow the stack pointer to be encoded, and
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// disallow the zero register.
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- static Instr RdSP(Register rd) {
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- DCHECK(!rd.IsZero());
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- return (rd.code() & kRegCodeMask) << Rd_offset;
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- }
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-
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- static Instr RnSP(Register rn) {
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- DCHECK(!rn.IsZero());
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- return (rn.code() & kRegCodeMask) << Rn_offset;
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- }
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+ static Instr RdSP(Register rd);
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+ static Instr RnSP(Register rn);
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// Flags encoding.
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inline static Instr Flags(FlagsUpdate S);
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