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Updating documentation to include token endianess override
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@@ -44,18 +44,19 @@ define endian=little;
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</pre></div>
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<p>
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This defines how the processor interprets contiguous sequences of
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bytes as integers. It effects how integer fields within an instruction
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are interpreted (see <a class="xref" href="sleigh_tokens.html#sleigh_defining_tokens" title="6.1. Defining Tokens and Fields">Section 6.1, “Defining Tokens and Fields”</a>), and
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it also effects the details of how the processor is supposed to
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implement atomic operations like integer addition and integer
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compare. The specification designer should only need to worry about
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these details when labeling instruction fields, otherwise the
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specification language will hide endianess issues.
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bytes as integers or other values and globally affects values across
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all address spaces. It also affects how integer fields
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within an instruction are interpreted, (see <a class="xref" href="sleigh_tokens.html#sleigh_defining_tokens" title="6.1. Defining Tokens and Fields">Section 6.1, “Defining Tokens and Fields”</a>),
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although it is possible to override this setting in the rare case that endianess is
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different for data versus instruction encoding.
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The specification designer generally only needs to worry about
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endianess when labeling instruction fields and when defining overlapping registers,
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otherwise the specification language hides endianess issues.
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</p>
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</div>
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<div class="sect2">
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<div class="titlepage"><div><div><h3 class="title">
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<a name="idm140016193284896"></a>4.2. Alignment Definition</h3></div></div></div>
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<a name="idm140526921098128"></a>4.2. Alignment Definition</h3></div></div></div>
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<p>
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An alignment definition looks like
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</p>
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@@ -72,7 +73,7 @@ instruction as an error.
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</div>
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<div class="sect2">
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<div class="titlepage"><div><div><h3 class="title">
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<a name="idm140016193281872"></a>4.3. Space Definitions</h3></div></div></div>
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<a name="idm140526921095104"></a>4.3. Space Definitions</h3></div></div></div>
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<p>
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The definition of an address space looks like
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</p>
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@@ -227,7 +228,7 @@ define register offset=0 size=1
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</div>
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<div class="sect2">
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<div class="titlepage"><div><div><h3 class="title">
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<a name="idm140016193245424"></a>4.5. Bit Range Registers</h3></div></div></div>
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<a name="idm140526920875744"></a>4.5. Bit Range Registers</h3></div></div></div>
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<p>
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Many processors define registers that either consist of a single bit
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or otherwise don't use an integral number of bytes. A recurring
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@@ -298,7 +299,7 @@ used as an alternate syntax for defining overlapping registers.
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</div>
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<div class="sect2">
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<div class="titlepage"><div><div><h3 class="title">
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<a name="idm140016193233216"></a>4.6. User-Defined Operations</h3></div></div></div>
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<a name="idm140526920863712"></a>4.6. User-Defined Operations</h3></div></div></div>
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<p>
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The specification designer can define new p-code operations using
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a <span class="bold"><strong>define pcodeop</strong></span> statement. This
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