Instructions:
  STOREH rd_rs2_ptr = 8, rs1_ptr = 2, imm = 6, mem_as = 2, needs_write = 1, imm_sign = 1

APC advantage:
  - Main columns: 41 -> 28 (1.46x reduction)
  - Bus interactions: 17 -> 16 (1.06x reduction)
  - Constraints: 25 -> 13 (1.92x reduction)

Symbolic machine using 28 unique main columns:
  from_state__timestamp_0
  rs1_data__0_0
  rs1_data__1_0
  rs1_data__2_0
  rs1_data__3_0
  rs1_aux_cols__base__prev_timestamp_0
  rs1_aux_cols__base__timestamp_lt_aux__lower_decomp__0_0
  read_data_aux__base__prev_timestamp_0
  read_data_aux__base__timestamp_lt_aux__lower_decomp__0_0
  mem_ptr_limbs__0_0
  mem_ptr_limbs__1_0
  write_base_aux__prev_timestamp_0
  write_base_aux__timestamp_lt_aux__lower_decomp__0_0
  flags__1_0
  flags__2_0
  read_data__0_0
  read_data__1_0
  read_data__2_0
  read_data__3_0
  prev_data__0_0
  prev_data__1_0
  prev_data__2_0
  prev_data__3_0
  write_data__0_0
  write_data__1_0
  write_data__2_0
  write_data__3_0
  is_valid

// Bus 0 (EXECUTION_BRIDGE):
mult=is_valid * -1, args=[0, from_state__timestamp_0]
mult=is_valid * 1, args=[4, from_state__timestamp_0 + 3]

// Bus 1 (MEMORY):
mult=is_valid * -1, args=[1, 2, rs1_data__0_0, rs1_data__1_0, rs1_data__2_0, rs1_data__3_0, rs1_aux_cols__base__prev_timestamp_0]
mult=is_valid * 1, args=[1, 2, rs1_data__0_0, rs1_data__1_0, rs1_data__2_0, rs1_data__3_0, from_state__timestamp_0]
mult=is_valid * -1, args=[1, 8, read_data__0_0, read_data__1_0, read_data__2_0, read_data__3_0, read_data_aux__base__prev_timestamp_0]
mult=is_valid * 1, args=[1, 8, read_data__0_0, read_data__1_0, read_data__2_0, read_data__3_0, from_state__timestamp_0 + 1]
mult=is_valid * -1, args=[2, mem_ptr_limbs__0_0 + 65536 * mem_ptr_limbs__1_0 - (flags__1_0 * flags__2_0 + 2 * flags__2_0), prev_data__0_0, prev_data__1_0, prev_data__2_0, prev_data__3_0, write_base_aux__prev_timestamp_0]
mult=is_valid * 1, args=[2, mem_ptr_limbs__0_0 + 65536 * mem_ptr_limbs__1_0 - (flags__1_0 * flags__2_0 + 2 * flags__2_0), write_data__0_0, write_data__1_0, write_data__2_0, write_data__3_0, from_state__timestamp_0 + 2]

// Bus 3 (VARIABLE_RANGE_CHECKER):
mult=is_valid * 1, args=[rs1_aux_cols__base__timestamp_lt_aux__lower_decomp__0_0, 17]
mult=is_valid * 1, args=[15360 * rs1_aux_cols__base__prev_timestamp_0 + 15360 * rs1_aux_cols__base__timestamp_lt_aux__lower_decomp__0_0 + 15360 - 15360 * from_state__timestamp_0, 12]
mult=is_valid * 1, args=[503316480 * flags__2_0 * (flags__2_0 - 1) + 503316481 * flags__2_0 * (flags__1_0 + flags__2_0 - 1) + 503316480 * flags__1_0 * flags__2_0 + 503316480 * flags__2_0 + 503316480 - (1006632960 * flags__1_0 * (flags__1_0 + flags__2_0 - 1) + 503316480 * mem_ptr_limbs__0_0 + 503316480 * flags__1_0), 14]
mult=is_valid * 1, args=[mem_ptr_limbs__1_0, 13]
mult=is_valid * 1, args=[read_data_aux__base__timestamp_lt_aux__lower_decomp__0_0, 17]
mult=is_valid * 1, args=[15360 * read_data_aux__base__prev_timestamp_0 + 15360 * read_data_aux__base__timestamp_lt_aux__lower_decomp__0_0 - 15360 * from_state__timestamp_0, 12]
mult=is_valid * 1, args=[write_base_aux__timestamp_lt_aux__lower_decomp__0_0, 17]
mult=is_valid * 1, args=[15360 * write_base_aux__prev_timestamp_0 + 15360 * write_base_aux__timestamp_lt_aux__lower_decomp__0_0 - (15360 * from_state__timestamp_0 + 15360), 12]

// Algebraic constraints:
flags__1_0 * ((flags__1_0 - 1) * (flags__1_0 - 2)) = 0
flags__2_0 * ((flags__2_0 - 1) * (flags__2_0 - 2)) = 0
(flags__1_0 + flags__2_0) * (flags__1_0 + flags__2_0 - 1) = 0
1006632960 * flags__1_0 * (flags__1_0 - 1) + 1006632960 * flags__2_0 * (flags__2_0 - 1) + flags__1_0 * (flags__1_0 + flags__2_0 - 1) + flags__2_0 * (flags__1_0 + flags__2_0 - 1) + flags__1_0 + flags__2_0 - 1 * is_valid = 0
1006632960 * flags__1_0 * (flags__1_0 - 1) * read_data__0_0 + (flags__1_0 + flags__2_0 - 1) * read_data__1_0 + (1006632960 * flags__2_0 * (flags__2_0 - 1) + flags__1_0 * (flags__1_0 + flags__2_0 - 1)) * read_data__2_0 + flags__2_0 * (flags__1_0 + flags__2_0 - 1) * read_data__3_0 + write_data__0_0 - (flags__1_0 * read_data__0_0 + (flags__1_0 * flags__2_0 + flags__2_0) * prev_data__0_0) = 0
1006632960 * flags__1_0 * (flags__1_0 - 1) * read_data__1_0 + 1006632960 * flags__2_0 * (flags__2_0 - 1) * read_data__3_0 + write_data__1_0 - (flags__1_0 * read_data__1_0 + flags__1_0 * flags__2_0 * read_data__0_0 + flags__2_0 * prev_data__1_0) = 0
write_data__2_0 - (flags__2_0 * read_data__0_0 + (flags__1_0 * flags__2_0 + flags__1_0) * prev_data__2_0) = 0
write_data__3_0 - (flags__2_0 * read_data__1_0 + (flags__1_0 * flags__2_0 + flags__1_0) * prev_data__3_0) = 0
(30720 * mem_ptr_limbs__0_0 - (30720 * rs1_data__0_0 + 7864320 * rs1_data__1_0 + 184320 * is_valid)) * (30720 * mem_ptr_limbs__0_0 - (30720 * rs1_data__0_0 + 7864320 * rs1_data__1_0 + 184321)) = 0
(943718400 * rs1_data__0_0 + 30720 * mem_ptr_limbs__1_0 - (120 * rs1_data__1_0 + 30720 * rs1_data__2_0 + 7864320 * rs1_data__3_0 + 943718400 * mem_ptr_limbs__0_0 + 377456642 * is_valid)) * (943718400 * rs1_data__0_0 + 30720 * mem_ptr_limbs__1_0 - (120 * rs1_data__1_0 + 30720 * rs1_data__2_0 + 7864320 * rs1_data__3_0 + 943718400 * mem_ptr_limbs__0_0 + 377456643)) = 0
flags__1_0 * (flags__1_0 - 1) + flags__2_0 * (flags__2_0 - 1) + 5 * flags__1_0 * flags__2_0 + 3 * flags__1_0 + 3 * flags__2_0 - (flags__1_0 * (flags__1_0 + flags__2_0 - 1) + flags__2_0 * (flags__1_0 + flags__2_0 - 1) + 3 * is_valid) = 0
flags__2_0 * (flags__2_0 - 1) + 1 * is_valid - (2 * flags__1_0 * (flags__1_0 + flags__2_0 - 1) + 3 * flags__2_0 * (flags__1_0 + flags__2_0 - 1) + flags__1_0 + flags__2_0) = 0
is_valid * (is_valid - 1) = 0