Instructions:
  SLTU rd_ptr = 8, rs1_ptr = 5, rs2 = 1, rs2_as = 0

APC advantage:
  - Main columns: 37 -> 15 (2.47x reduction)
  - Bus interactions: 18 -> 10 (1.80x reduction)
  - Constraints: 28 -> 2 (14.00x reduction)

Symbolic machine using 15 unique main columns:
  from_state__timestamp_0
  reads_aux__0__base__prev_timestamp_0
  reads_aux__0__base__timestamp_lt_aux__lower_decomp__0_0
  writes_aux__base__prev_timestamp_0
  writes_aux__base__timestamp_lt_aux__lower_decomp__0_0
  writes_aux__prev_data__0_0
  writes_aux__prev_data__1_0
  writes_aux__prev_data__2_0
  writes_aux__prev_data__3_0
  b__0_0
  b__1_0
  b__2_0
  b__3_0
  new_var_40
  is_valid

// Bus 0 (EXECUTION_BRIDGE):
mult=is_valid * -1, args=[0, from_state__timestamp_0]
mult=is_valid * 1, args=[4, from_state__timestamp_0 + 3]

// Bus 1 (MEMORY):
mult=is_valid * -1, args=[1, 5, b__0_0, b__1_0, b__2_0, b__3_0, reads_aux__0__base__prev_timestamp_0]
mult=is_valid * 1, args=[1, 5, b__0_0, b__1_0, b__2_0, b__3_0, from_state__timestamp_0]
mult=is_valid * -1, args=[1, 8, writes_aux__prev_data__0_0, writes_aux__prev_data__1_0, writes_aux__prev_data__2_0, writes_aux__prev_data__3_0, writes_aux__base__prev_timestamp_0]
mult=is_valid * 1, args=[1, 8, 1 - new_var_40 * (b__0_0 + b__1_0 + b__2_0 + b__3_0), 0, 0, 0, from_state__timestamp_0 + 2]

// Bus 3 (VARIABLE_RANGE_CHECKER):
mult=is_valid * 1, args=[reads_aux__0__base__timestamp_lt_aux__lower_decomp__0_0, 17]
mult=is_valid * 1, args=[15360 * reads_aux__0__base__prev_timestamp_0 + 15360 * reads_aux__0__base__timestamp_lt_aux__lower_decomp__0_0 + 15360 - 15360 * from_state__timestamp_0, 12]
mult=is_valid * 1, args=[writes_aux__base__timestamp_lt_aux__lower_decomp__0_0, 17]
mult=is_valid * 1, args=[15360 * writes_aux__base__prev_timestamp_0 + 15360 * writes_aux__base__timestamp_lt_aux__lower_decomp__0_0 - (15360 * from_state__timestamp_0 + 15360), 12]

// Algebraic constraints:
(1 - new_var_40 * (b__0_0 + b__1_0 + b__2_0 + b__3_0)) * (b__0_0 + b__1_0 + b__2_0 + b__3_0) = 0
is_valid * (is_valid - 1) = 0