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feat(hpu): Add Hpu backend implementation
This backend abstract communication with Hpu Fpga hardware.
It define it's proper entities to prevent circular dependencies with
tfhe-rs.
Object lifetime is handle through Arc<Mutex<T>> wrapper, and enforce
that all objects currently alive in Hpu Hw are also kept valid on the
host side.
It contains the second version of HPU instruction set (HIS_V2.0):
* DOp have following properties:
+ Template as first class citizen
+ Support of Immediate template
+ Direct parser and conversion between Asm/Hex
+ Replace deku (and it's associated endianess limitation) by
+ bitfield_struct and manual parsing
* IOp have following properties:
+ Support various number of Destination
+ Support various number of Sources
+ Support various number of Immediat values
+ Support of multiple bitwidth (Not implemented yet in the Fpga
firmware)
Details could be view in `backends/tfhe-hpu-backend/Readme.md`
This commit is contained in:
Baptiste Roux
@@ -28,7 +28,7 @@ Learn the basics of TFHE-rs, set it up, and make it run with ease.
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Start building with TFHE-rs by exploring its core features, discovering essential guides, and learning more with user-friendly tutorials.
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<table data-view="cards"><thead><tr><th></th><th></th><th></th><th data-hidden data-card-cover data-type="files"></th></tr></thead><tbody><tr><td><strong>FHE Computations</strong></td><td>Run FHE computation on encrypted data.</td><td><ul><li><a href="fhe-computation/types/">Types </a></li><li><a href="fhe-computation/operations/">Operations</a></li></ul></td><td><a href=".gitbook/assets/build1.png">build1.png</a></td></tr><tr><td><strong>Configuration</strong></td><td>Advanced configuration for better performance.</td><td><ul><li><a href="configuration/rust_configuration.md">Advanced Rust </a></li><li><a href="configuration/gpu_acceleration/run_on_gpu.md">GPU acceleration</a></li></ul></td><td><a href=".gitbook/assets/build2.png">build2.png</a></td></tr><tr><td><strong>Integration</strong></td><td>Use TFHE-rs in different contexts or platforms..</td><td><ul><li><a href="integration/c_api.md">C API</a></li><li><a href="integration/js_on_wasm_api.md">JS on WASM API</a></li></ul></td><td><a href=".gitbook/assets/build3.png">build3.png</a></td></tr></tbody></table>
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<table data-view="cards"><thead><tr><th></th><th></th><th></th><th data-hidden data-card-cover data-type="files"></th></tr></thead><tbody><tr><td><strong>FHE Computations</strong></td><td>Run FHE computation on encrypted data.</td><td><ul><li><a href="fhe-computation/types/">Types </a></li><li><a href="fhe-computation/operations/">Operations</a></li></ul></td><td><a href=".gitbook/assets/build1.png">build1.png</a></td></tr><tr><td><strong>Configuration</strong></td><td>Advanced configuration for better performance.</td><td><ul><li><a href="configuration/rust_configuration.md">Advanced Rust </a></li><li><a href="configuration/gpu_acceleration/run_on_gpu.md">GPU acceleration</a></li><li><a href="configuration/hpu_acceleration/run_on_hpu.md">HPU acceleration</a></li></ul></td><td><a href=".gitbook/assets/build2.png">build2.png</a></td></tr><tr><td><strong>Integration</strong></td><td>Use TFHE-rs in different contexts or platforms..</td><td><ul><li><a href="integration/c_api.md">C API</a></li><li><a href="integration/js_on_wasm_api.md">JS on WASM API</a></li></ul></td><td><a href=".gitbook/assets/build3.png">build3.png</a></td></tr></tbody></table>
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## Explore more
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@@ -14,6 +14,8 @@
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* [GPU Benchmarks](getting_started/benchmarks/gpu/README.md)
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* [Integer](getting_started/benchmarks/gpu/gpu_integer_operations.md)
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* [Programmable bootstrapping](getting_started/benchmarks/gpu/gpu_programmable_bootstrapping.md)
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* [HPU Benchmarks](getting_started/benchmarks/hpu/README.md)
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* [Integer](getting_started/benchmarks/hpu/hpu_integer_operations.md)
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* [Zero-knowledge proof benchmarks](getting_started/benchmarks/zk_proof_benchmarks.md)
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* [Security and cryptography](getting_started/security_and_cryptography.md)
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@@ -64,6 +66,8 @@
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* [Compressing ciphertexts](configuration/gpu_acceleration/compressing_ciphertexts.md)
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* [Array types](configuration/gpu_acceleration/array_type.md)
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* [Multi-GPU support](configuration/gpu_acceleration/multi_gpu.md)
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* [HPU acceleration](configuration/hpu_acceleration/run_on_hpu.md)
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* [Benchmark](configuration/hpu_acceleration/benchmark.md)
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* [Parallelized PBS](configuration/parallelized_pbs.md)
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## Integration
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="bold" fill="white" x="678.0" y="29.666666666666668">128</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="426.0" y="60.0">7.85 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="510.0" y="60.0">7.93 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="594.0" y="60.0">13.9 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="678.0" y="60.0">22.5 ms</text>
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<text dominant-baseline="middle" text-anchor="start" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="6" y="100.0">Mul (x)</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="342.0" y="100.0">10.7 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="426.0" y="100.0">19.4 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="510.0" y="100.0">51.5 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="594.0" y="100.0">149 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="426.0" y="140.0">8.14 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="510.0" y="140.0">9.18 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="594.0" y="140.0">12.5 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="678.0" y="140.0">18.3 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="342.0" y="180.0">6.84 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="426.0" y="180.0">7.83 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="510.0" y="180.0">10.3 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="594.0" y="180.0">11.9 ms</text>
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<text dominant-baseline="middle" text-anchor="middle" font-family="Arial" font-size="14" font-weight="normal" fill="black" x="678.0" y="180.0">18.2 ms</text>
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# Benchmarks
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Please refer to the [HPU benchmarks](../../getting_started/benchmarks/hpu/README.md) for detailed performance benchmark results.
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# HPU acceleration
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This guide explains how to update your existing program to leverage HPU acceleration, or to start a new program using HPU.
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**TFHE-rs** now supports a HPU backend based on FPGA implementation, enabling integer arithmetic operations on encrypted data.
|
||||
|
||||
## Prerequisites
|
||||
|
||||
* An [AMD/Xilinx V80 board](https://www.amd.com/en/products/accelerators/alveo/v80.html) installed on a server running Linux with kernel 5.15.0-\*
|
||||
* A HPU bitstream that you can find (or build) in [HPU fpga repository](https://github.com/zama-ai/hpu_fpga) and load in V80 flash and FPGA using its [README](https://github.com/zama-ai/hpu_fpga/README.md)
|
||||
* AMI linux device driver version from this [fork](https://github.com/zama-ai/AVED)
|
||||
* QDMA linux device driver version from this [fork](https://github.com/zama-ai/dma_ip_drivers)
|
||||
* Rust version - check this [page](../rust_configuration.md)
|
||||
|
||||
## Importing to your project
|
||||
|
||||
To use the **TFHE-rs** HPU backend in your project, add the following dependency in your `Cargo.toml`.
|
||||
|
||||
```toml
|
||||
tfhe = { version = "~1.2.0", features = ["integer", "hpu-v80"] }
|
||||
```
|
||||
|
||||
{% hint style="success" %}
|
||||
For optimal performance when using **TFHE-rs**, run your code in release mode with the `--release` flag.
|
||||
{% endhint %}
|
||||
|
||||
### Supported platforms
|
||||
|
||||
**TFHE-rs** HPU backend is supported on Linux (x86, aarch64).
|
||||
|
||||
| OS | x86 | aarch64 |
|
||||
| ------- | ----------- | ------------- |
|
||||
| Linux | Supported | Unsupported |
|
||||
| macOS | Unsupported | Unsupported |
|
||||
| Windows | Unsupported | Unsupported |
|
||||
|
||||
## A first example
|
||||
|
||||
### Configuring and creating keys.
|
||||
|
||||
Comparing to the [CPU example](../../getting_started/quick_start.md), HPU set up differs in the key creation and device registration, as detailed [here](run\_on\_hpu.md#setting-the-hpu)
|
||||
|
||||
Here is a full example (combining the client and server parts):
|
||||
|
||||
```rust
|
||||
use tfhe::{ConfigBuilder, set_server_key, FheUint8, ClientKey, CompressedServerKey};
|
||||
use tfhe::prelude::*;
|
||||
use tfhe_hpu_backend::prelude::*;
|
||||
|
||||
fn main() {
|
||||
|
||||
// Instantiate HpuDevice --------------------------------------------------
|
||||
// HPU configuration knobs are retrieved from a TOML configuration file. Prebuilt configurations could be find in `backends/tfhe-hpu-backend/config_store`
|
||||
// For ease of use a setup_hpu.sh script is available in repository root folder and it handle the required environment variables setup and driver initialisation
|
||||
// More details are available in `backends/tfhe-hpu-backend/Readme.md`
|
||||
let hpu_device = HpuDevice::from_config(ShellString::new("${HPU_BACKEND_DIR}/config_store/${HPU_CONFIG}/hpu_config.toml".to_string()));
|
||||
|
||||
// Generate keys ----------------------------------------------------------
|
||||
let config = Config::from_hpu_device(&hpu_device);
|
||||
|
||||
let client_key = ClientKey::generate(config);
|
||||
let compressed_server_key = CompressedServerKey::new(&client_key);
|
||||
|
||||
// Register HpuDevice and key as thread-local engine
|
||||
set_server_key((hpu_device, compressed_server_key));
|
||||
|
||||
let clear_a = 27u8;
|
||||
let clear_b = 128u8;
|
||||
|
||||
let a = FheUint8::encrypt(clear_a, &client_key);
|
||||
let b = FheUint8::encrypt(clear_b, &client_key);
|
||||
|
||||
// Server-side computation
|
||||
let result = a + b;
|
||||
|
||||
// Client-side
|
||||
let decrypted_result: u8 = result.decrypt(&client_key);
|
||||
|
||||
let clear_result = clear_a + clear_b;
|
||||
|
||||
assert_eq!(decrypted_result, clear_result);
|
||||
}
|
||||
```
|
||||
|
||||
### Setting the hpu
|
||||
|
||||
An HPU device is built for a given parameter set. At this point, because HPU is still a prototype, the software provided is retrieving this parameter set from an instantiated HpuDevice. Once retrieved, reading some HPU registers, this parameter set is used by the example applications to generate both client and compressed server keys.
|
||||
Server key has then to be decompressed by the server to be converted into the right format and uploaded to the device.
|
||||
Once decompressed, the operations between CPU and HPU are identical.
|
||||
|
||||
### Encryption
|
||||
|
||||
On the client-side, the method to encrypt the data is exactly the same than the CPU one, as shown in the following example:
|
||||
|
||||
```Rust
|
||||
let clear_a = 27u8;
|
||||
let clear_b = 128u8;
|
||||
|
||||
let a = FheUint8::encrypt(clear_a, &client_key);
|
||||
let b = FheUint8::encrypt(clear_b, &client_key);
|
||||
```
|
||||
|
||||
### Computation
|
||||
|
||||
The server first needs to set up its keys with `set_server_key((hpu_device, compressed_server_key))`.
|
||||
|
||||
Then, homomorphic computations are performed using the same approach as the [CPU operations](../../fhe-computation/operations/README.md).
|
||||
|
||||
``` rust
|
||||
// Server-side
|
||||
let result = a + b;
|
||||
|
||||
//Client-side
|
||||
let decrypted_result: u8 = result.decrypt(&client_key);
|
||||
|
||||
let clear_result = clear_a + clear_b;
|
||||
|
||||
assert_eq!(decrypted_result, clear_result);
|
||||
```
|
||||
|
||||
### Decryption
|
||||
|
||||
Finally, the client decrypts the result using:
|
||||
|
||||
```Rust
|
||||
let decrypted_result: u8 = result.decrypt(&client_key);
|
||||
```
|
||||
|
||||
## List of available operations
|
||||
|
||||
The HPU backend includes the following operations for unsigned encrypted integers:
|
||||
|
||||
| name | symbol | `Enc`/`Enc` | `Enc`/ `Int` |
|
||||
| --------------------- | -------------- | -------------------------- | -------------------------- |
|
||||
| Add | `+` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Sub | `-` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Mul | `*` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| BitAnd | `&` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| BitOr | `\|` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| BitXor | `^` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Greater than | `gt` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Greater or equal than | `ge` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Lower than | `lt` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Lower or equal than | `le` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Equal | `eq` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
| Ternary operator | `select` | :heavy\_check\_mark: | :heavy\_check\_mark: |
|
||||
|
||||
{% hint style="info" %}
|
||||
All operations follow the same syntax than the one described in [here](../../fhe-computation/operations/README.md).
|
||||
{% endhint %}
|
||||
@@ -1,6 +1,6 @@
|
||||
# Benchmarks
|
||||
|
||||
This document summarizes the timings of some homomorphic operations over 64-bit encrypted integers, depending on the hardware. More details are given for [the CPU](cpu/README.md), [the GPU](gpu/README.md), or [zeros-knowledge proofs](zk_proof_benchmarks.md).
|
||||
This document summarizes the timings of some homomorphic operations over 64-bit encrypted integers, depending on the hardware. More details are given for [the CPU](cpu/README.md), [the GPU](gpu/README.md), [the HPU](hpu/README.md) or [zeros-knowledge proofs](zk_proof_benchmarks.md).
|
||||
|
||||
The cryptographic parameters used for benchmarking follow a tweaked uniform (TUniform) noise distribution instead of a Gaussian. The main advantage of this distribution is to be bounded, whereas the usual Gaussian one is not. In some practical cases, this can simplify the use of homomorphic computation. See the [noise section](../security_and_cryptography.md#noise) of the Security and cryptography documentation page for more information on the noise distributions.
|
||||
|
||||
@@ -16,4 +16,4 @@ make print_doc_bench_parameters
|
||||
All CPU benchmarks in the Table below were launched on an `AWS hpc7a.96xlarge` instance equipped with a 96-core `AMD EPYC 9R14 CPU @ 2.60GHz` and 740GB of RAM, while all GPU benchmarks were launched on 1xH100 GPU, and rely on the multithreaded PBS algorithm.
|
||||
{% endhint %}
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -32,7 +32,7 @@ The next table shows the operation timings on CPU when the left input is encrypt
|
||||
|
||||
All timings are based on parallelized Radix-based integer operations where each block is encrypted using the default parameters `PARAM_MESSAGE_2_CARRY_2_KS_PBS`. To ensure predictable timings, we perform operations in the `default` mode, which ensures that the input and output encoding are similar (i.e., the carries are always emptied).
|
||||
|
||||
You can minimize operational costs by selecting from 'unchecked', 'checked', or 'smart' modes from [the fine-grained APIs](../../../references/fine-grained-apis/quick_start.md), each balancing performance and correctness differently. For more details about parameters, see [here](../../../references/fine-grained-apis/shortint/parameters.md). You can find the benchmark results on GPU for all these operations [here](../../../configuration/gpu_acceleration/benchmark.md).
|
||||
You can minimize operational costs by selecting from 'unchecked', 'checked', or 'smart' modes from [the fine-grained APIs](../../../references/fine-grained-apis/quick_start.md), each balancing performance and correctness differently. For more details about parameters, see [here](../../../references/fine-grained-apis/shortint/parameters.md). You can find the benchmark results on GPU for all these operations on GPU [here](../../../configuration/gpu_acceleration/benchmark.md) and on HPU [here](../../../configuration/hpu_acceleration/benchmark.md).
|
||||
|
||||
## Reproducing TFHE-rs benchmarks
|
||||
|
||||
|
||||
11
tfhe/docs/getting_started/benchmarks/hpu/README.md
Normal file
11
tfhe/docs/getting_started/benchmarks/hpu/README.md
Normal file
@@ -0,0 +1,11 @@
|
||||
# Benchmarks over HPU
|
||||
|
||||
This document details the HPU performance benchmarks of homomorphic operations using **TFHE-rs**.
|
||||
|
||||
By their nature, homomorphic operations run slower than their cleartext equivalents.
|
||||
|
||||
{% hint style="info" %}
|
||||
All HPU benchmarks were launched on AMD Alveo v80 FPGAs.
|
||||
{% endhint %}
|
||||
|
||||
* [Integer operations](hpu_integer_operations.md)
|
||||
@@ -0,0 +1,30 @@
|
||||
# Integer Operations over HPU
|
||||
|
||||
This document details the HPU performance benchmarks of homomorphic operations on integers using **TFHE-rs**.
|
||||
|
||||
{% hint style="info" %}
|
||||
All HPU benchmarks were launched on AMD Alveo v80 FPGAs.
|
||||
{% endhint %}
|
||||
|
||||
The cryptographic parameters `HPU_PARAM_MESSAGE_2_CARRY_2_KS32_PBS_TUNIFORM_2M64` were used.
|
||||
|
||||
## 1xHPU
|
||||
Below are the results for the execution on a single Alveo v80 board.
|
||||
The following table shows the performance when the inputs of the benchmarked operation are encrypted:
|
||||
|
||||
|
||||
|
||||
The following table shows the performance when the left input of the benchmarked operation is encrypted and the other is a clear scalar of the same size:
|
||||
|
||||
|
||||
|
||||
## Reproducing TFHE-rs benchmarks
|
||||
|
||||
**TFHE-rs** benchmarks can be easily reproduced from the [source](https://github.com/zama-ai/tfhe-rs).
|
||||
|
||||
The following example shows how to reproduce **TFHE-rs** benchmarks:
|
||||
|
||||
```shell
|
||||
#Integer benchmarks:
|
||||
make bench_integer_hpu
|
||||
```
|
||||
Reference in New Issue
Block a user