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539 lines
23 KiB
C++
539 lines
23 KiB
C++
#ifndef CUDA_BOOTSTRAP_UTILITIES_H
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#define CUDA_BOOTSTRAP_UTILITIES_H
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#include "device.h"
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#include "pbs_enums.h"
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#include "vector_types.h"
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#include <stdint.h>
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template <typename Torus>
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uint64_t get_buffer_size_full_sm_programmable_bootstrap_step_one(
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uint32_t polynomial_size) {
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size_t double_count = (sizeof(Torus) == 16) ? 2 : 1;
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return sizeof(Torus) * polynomial_size + // accumulator_rotated
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sizeof(double) * 2 * double_count * polynomial_size /
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2; // accumulator fft
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}
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template <typename Torus>
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uint64_t get_buffer_size_full_sm_programmable_bootstrap_step_two(
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uint32_t polynomial_size) {
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size_t double_count = (sizeof(Torus) == 16) ? 2 : 1;
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return sizeof(Torus) * polynomial_size + // accumulator
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sizeof(double) * 2 * double_count * polynomial_size /
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2; // accumulator fft
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}
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template <typename Torus>
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uint64_t
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get_buffer_size_partial_sm_programmable_bootstrap(uint32_t polynomial_size) {
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size_t double_count = (sizeof(Torus) == 16) ? 2 : 1;
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return sizeof(double) * 2 * double_count * polynomial_size /
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2; // accumulator fft
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}
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template <typename Torus>
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uint64_t
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get_buffer_size_full_sm_programmable_bootstrap_tbc(uint32_t polynomial_size) {
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return sizeof(Torus) * polynomial_size + // accumulator_rotated
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sizeof(Torus) * polynomial_size + // accumulator
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sizeof(double2) * polynomial_size / 2; // accumulator fft
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}
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template <typename Torus>
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uint64_t get_buffer_size_partial_sm_programmable_bootstrap_tbc(
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uint32_t polynomial_size) {
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return sizeof(double2) * polynomial_size / 2; // accumulator fft mask & body
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}
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template <typename Torus>
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uint64_t get_buffer_size_sm_dsm_plus_tbc_classic_programmable_bootstrap(
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uint32_t polynomial_size) {
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return sizeof(double2) * polynomial_size / 2; // tbc
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}
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template <typename Torus>
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uint64_t get_buffer_size_full_sm_programmable_bootstrap_tbc_2_2_params(
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uint32_t polynomial_size) {
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// In the first implementation with 2-2 params, we need up to 5 polynomials in
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// shared memory we can optimize this later
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return sizeof(Torus) * polynomial_size * 5;
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}
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template <typename Torus>
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uint64_t
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get_buffer_size_full_sm_programmable_bootstrap_cg(uint32_t polynomial_size) {
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size_t double_count = (sizeof(Torus) == 16) ? 2 : 1;
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return sizeof(Torus) * polynomial_size + // accumulator_rotated
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sizeof(Torus) * polynomial_size + // accumulator
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sizeof(double) * polynomial_size / 2 * 2 *
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double_count; // accumulator fft
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}
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template <typename Torus>
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uint64_t
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get_buffer_size_partial_sm_programmable_bootstrap_cg(uint32_t polynomial_size) {
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size_t double_count = (sizeof(Torus) == 16) ? 2 : 1;
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return sizeof(double) * polynomial_size / 2 * 2 *
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double_count; // accumulator fft mask & body
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}
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template <typename Torus>
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bool supports_distributed_shared_memory_on_classic_programmable_bootstrap(
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uint32_t polynomial_size, uint32_t max_shared_memory);
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template <typename Torus, PBS_TYPE pbs_type> struct pbs_buffer;
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template <typename Torus> struct pbs_buffer<Torus, PBS_TYPE::CLASSICAL> {
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int8_t *d_mem;
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Torus *global_accumulator;
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double2 *global_join_buffer;
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PBS_VARIANT pbs_variant;
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PBS_MS_REDUCTION_T noise_reduction_type;
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bool gpu_memory_allocated;
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pbs_buffer(cudaStream_t stream, uint32_t gpu_index, uint32_t lwe_dimension,
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uint32_t glwe_dimension, uint32_t polynomial_size,
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uint32_t level_count, uint32_t input_lwe_ciphertext_count,
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PBS_VARIANT pbs_variant, bool allocate_gpu_memory,
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PBS_MS_REDUCTION_T noise_reduction_type, uint64_t &size_tracker)
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: noise_reduction_type(noise_reduction_type) {
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gpu_memory_allocated = allocate_gpu_memory;
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cuda_set_device(gpu_index);
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this->pbs_variant = pbs_variant;
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auto max_shared_memory = cuda_get_max_shared_memory(gpu_index);
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switch (pbs_variant) {
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case PBS_VARIANT::DEFAULT: {
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uint64_t full_sm_step_one =
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get_buffer_size_full_sm_programmable_bootstrap_step_one<Torus>(
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polynomial_size);
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uint64_t full_sm_step_two =
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get_buffer_size_full_sm_programmable_bootstrap_step_two<Torus>(
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polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap<Torus>(
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polynomial_size);
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uint64_t partial_dm_step_one = full_sm_step_one - partial_sm;
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uint64_t partial_dm_step_two = full_sm_step_two - partial_sm;
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uint64_t full_dm = full_sm_step_one;
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uint64_t device_mem = 0;
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if (max_shared_memory < partial_sm) {
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device_mem = full_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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} else if (max_shared_memory < full_sm_step_two) {
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device_mem = (partial_dm_step_two + partial_dm_step_one * level_count) *
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input_lwe_ciphertext_count * (glwe_dimension + 1);
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} else if (max_shared_memory < full_sm_step_one) {
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device_mem = partial_dm_step_one * input_lwe_ciphertext_count *
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level_count * (glwe_dimension + 1);
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}
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// Otherwise, both kernels run all in shared memory
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d_mem = (int8_t *)cuda_malloc_with_size_tracking_async(
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device_mem, stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_join_buffer = (double2 *)cuda_malloc_with_size_tracking_async(
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(glwe_dimension + 1) * level_count * input_lwe_ciphertext_count *
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(polynomial_size / 2) * sizeof(double2),
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stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_accumulator = (Torus *)cuda_malloc_with_size_tracking_async(
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(glwe_dimension + 1) * input_lwe_ciphertext_count * polynomial_size *
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sizeof(Torus),
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stream, gpu_index, size_tracker, allocate_gpu_memory);
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} break;
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case PBS_VARIANT::CG: {
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uint64_t full_sm =
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get_buffer_size_full_sm_programmable_bootstrap_cg<Torus>(
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polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap_cg<Torus>(
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polynomial_size);
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uint64_t partial_dm = full_sm - partial_sm;
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uint64_t full_dm = full_sm;
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uint64_t device_mem = 0;
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if (max_shared_memory < partial_sm) {
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device_mem = full_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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} else if (max_shared_memory < full_sm) {
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device_mem = partial_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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}
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// Otherwise, both kernels run all in shared memory
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d_mem = (int8_t *)cuda_malloc_with_size_tracking_async(
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device_mem, stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_join_buffer = (double2 *)cuda_malloc_with_size_tracking_async(
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(glwe_dimension + 1) * level_count * input_lwe_ciphertext_count *
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polynomial_size / 2 * sizeof(double2),
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stream, gpu_index, size_tracker, allocate_gpu_memory);
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} break;
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#if CUDA_ARCH >= 900
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case PBS_VARIANT::TBC: {
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bool supports_dsm =
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supports_distributed_shared_memory_on_classic_programmable_bootstrap<
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Torus>(polynomial_size, max_shared_memory);
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uint64_t full_sm =
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get_buffer_size_full_sm_programmable_bootstrap_tbc<Torus>(
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polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap_tbc<Torus>(
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polynomial_size);
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uint64_t minimum_sm_tbc = 0;
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if (supports_dsm)
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minimum_sm_tbc =
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get_buffer_size_sm_dsm_plus_tbc_classic_programmable_bootstrap<
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Torus>(polynomial_size);
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uint64_t partial_dm = full_sm - partial_sm;
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uint64_t full_dm = full_sm;
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uint64_t device_mem = 0;
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// There is a minimum amount of memory we need to run the TBC PBS, which
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// is minimum_sm_tbc. We know that minimum_sm_tbc bytes are available
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// because otherwise the previous check would have redirected
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// computation to some other variant. If over that we don't have more
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// partial_sm bytes, TBC PBS will run on NOSM. If we have partial_sm but
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// not full_sm bytes, it will run on PARTIALSM. Otherwise, FULLSM.
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//
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// NOSM mode actually requires minimum_sm_tbc shared memory bytes.
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if (max_shared_memory < partial_sm + minimum_sm_tbc) {
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device_mem = full_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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} else if (max_shared_memory < full_sm + minimum_sm_tbc) {
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device_mem = partial_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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}
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// Otherwise, both kernels run all in shared memory
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d_mem = (int8_t *)cuda_malloc_with_size_tracking_async(
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device_mem, stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_join_buffer = (double2 *)cuda_malloc_with_size_tracking_async(
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(glwe_dimension + 1) * level_count * input_lwe_ciphertext_count *
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polynomial_size / 2 * sizeof(double2),
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stream, gpu_index, size_tracker, allocate_gpu_memory);
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} break;
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#endif
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default:
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PANIC("Cuda error (PBS): unsupported implementation variant.")
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}
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}
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void release(cudaStream_t stream, uint32_t gpu_index) {
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cuda_drop_with_size_tracking_async(d_mem, stream, gpu_index,
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gpu_memory_allocated);
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cuda_drop_with_size_tracking_async(global_join_buffer, stream, gpu_index,
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gpu_memory_allocated);
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if (pbs_variant == DEFAULT)
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cuda_drop_with_size_tracking_async(global_accumulator, stream, gpu_index,
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gpu_memory_allocated);
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}
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};
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template <typename Torus, PBS_TYPE pbs_type> struct pbs_buffer_128;
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template <typename InputTorus>
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struct pbs_buffer_128<InputTorus, PBS_TYPE::CLASSICAL> {
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int8_t *d_mem;
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__uint128_t *global_accumulator;
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double *global_join_buffer;
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PBS_VARIANT pbs_variant;
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PBS_MS_REDUCTION_T noise_reduction_type;
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bool gpu_memory_allocated;
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pbs_buffer_128(cudaStream_t stream, uint32_t gpu_index,
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uint32_t lwe_dimension, uint32_t glwe_dimension,
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uint32_t polynomial_size, uint32_t level_count,
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uint32_t input_lwe_ciphertext_count, PBS_VARIANT pbs_variant,
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bool allocate_gpu_memory,
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PBS_MS_REDUCTION_T noise_reduction_type,
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uint64_t &size_tracker)
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: noise_reduction_type(noise_reduction_type) {
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gpu_memory_allocated = allocate_gpu_memory;
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cuda_set_device(gpu_index);
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this->pbs_variant = pbs_variant;
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auto max_shared_memory = cuda_get_max_shared_memory(gpu_index);
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size_t global_join_buffer_size = (glwe_dimension + 1) * level_count *
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input_lwe_ciphertext_count *
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polynomial_size / 2 * sizeof(double) * 4;
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switch (pbs_variant) {
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case PBS_VARIANT::DEFAULT: {
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uint64_t full_sm_step_one =
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get_buffer_size_full_sm_programmable_bootstrap_step_one<__uint128_t>(
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polynomial_size);
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uint64_t full_sm_step_two =
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get_buffer_size_full_sm_programmable_bootstrap_step_two<__uint128_t>(
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polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap<__uint128_t>(
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polynomial_size);
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uint64_t partial_dm_step_one = full_sm_step_one - partial_sm;
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uint64_t partial_dm_step_two = full_sm_step_two - partial_sm;
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uint64_t full_dm = full_sm_step_one;
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uint64_t device_mem = 0;
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if (max_shared_memory < partial_sm) {
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device_mem = full_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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} else if (max_shared_memory < full_sm_step_two) {
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device_mem = (partial_dm_step_two + partial_dm_step_one * level_count) *
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input_lwe_ciphertext_count * (glwe_dimension + 1);
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} else if (max_shared_memory < full_sm_step_one) {
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device_mem = partial_dm_step_one * input_lwe_ciphertext_count *
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level_count * (glwe_dimension + 1);
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}
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// Otherwise, both kernels run all in shared memory
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d_mem = (int8_t *)cuda_malloc_with_size_tracking_async(
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device_mem, stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_join_buffer = (double *)cuda_malloc_with_size_tracking_async(
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global_join_buffer_size, stream, gpu_index, size_tracker,
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allocate_gpu_memory);
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global_accumulator = (__uint128_t *)cuda_malloc_with_size_tracking_async(
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(glwe_dimension + 1) * input_lwe_ciphertext_count * polynomial_size *
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sizeof(__uint128_t),
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stream, gpu_index, size_tracker, allocate_gpu_memory);
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} break;
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case PBS_VARIANT::CG: {
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uint64_t full_sm =
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get_buffer_size_full_sm_programmable_bootstrap_cg<__uint128_t>(
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polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap_cg<__uint128_t>(
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polynomial_size);
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uint64_t partial_dm = full_sm - partial_sm;
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uint64_t full_dm = full_sm;
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uint64_t device_mem = 0;
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if (max_shared_memory < partial_sm) {
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device_mem = full_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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} else if (max_shared_memory < full_sm) {
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device_mem = partial_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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}
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// Otherwise, both kernels run all in shared memory
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d_mem = (int8_t *)cuda_malloc_with_size_tracking_async(
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device_mem, stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_join_buffer = (double *)cuda_malloc_with_size_tracking_async(
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global_join_buffer_size, stream, gpu_index, size_tracker,
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allocate_gpu_memory);
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} break;
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#if CUDA_ARCH >= 900
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case PBS_VARIANT::TBC: {
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bool supports_dsm =
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supports_distributed_shared_memory_on_classic_programmable_bootstrap<
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__uint128_t>(polynomial_size, max_shared_memory);
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uint64_t full_sm =
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get_buffer_size_full_sm_programmable_bootstrap_tbc<__uint128_t>(
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polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap_tbc<__uint128_t>(
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polynomial_size);
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uint64_t minimum_sm_tbc = 0;
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if (supports_dsm)
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minimum_sm_tbc =
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get_buffer_size_sm_dsm_plus_tbc_classic_programmable_bootstrap<
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__uint128_t>(polynomial_size);
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uint64_t partial_dm = full_sm - partial_sm;
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uint64_t full_dm = full_sm;
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uint64_t device_mem = 0;
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// There is a minimum amount of memory we need to run the TBC PBS, which
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// is minimum_sm_tbc. We know that minimum_sm_tbc bytes are available
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// because otherwise the previous check would have redirected
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// computation to some other variant. If over that we don't have more
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// partial_sm bytes, TBC PBS will run on NOSM. If we have partial_sm but
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// not full_sm bytes, it will run on PARTIALSM. Otherwise, FULLSM.
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//
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// NOSM mode actually requires minimum_sm_tbc shared memory bytes.
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if (max_shared_memory < partial_sm + minimum_sm_tbc) {
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device_mem = full_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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} else if (max_shared_memory < full_sm + minimum_sm_tbc) {
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device_mem = partial_dm * input_lwe_ciphertext_count * level_count *
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(glwe_dimension + 1);
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}
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// Otherwise, both kernels run all in shared memory
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d_mem = (int8_t *)cuda_malloc_with_size_tracking_async(
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device_mem, stream, gpu_index, size_tracker, allocate_gpu_memory);
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global_join_buffer = (double *)cuda_malloc_with_size_tracking_async(
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global_join_buffer_size, stream, gpu_index, size_tracker,
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allocate_gpu_memory);
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} break;
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#endif
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default:
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PANIC("Cuda error (PBS): unsupported implementation variant.")
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}
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}
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void release(cudaStream_t stream, uint32_t gpu_index) {
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cuda_drop_with_size_tracking_async(d_mem, stream, gpu_index,
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gpu_memory_allocated);
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cuda_drop_with_size_tracking_async(global_join_buffer, stream, gpu_index,
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gpu_memory_allocated);
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if (pbs_variant == DEFAULT)
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cuda_drop_with_size_tracking_async(global_accumulator, stream, gpu_index,
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gpu_memory_allocated);
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}
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};
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template <typename Torus>
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uint64_t get_buffer_size_programmable_bootstrap_cg(
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uint32_t glwe_dimension, uint32_t polynomial_size, uint32_t level_count,
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uint32_t input_lwe_ciphertext_count, uint32_t max_shared_memory) {
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uint64_t full_sm =
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get_buffer_size_full_sm_programmable_bootstrap_cg<Torus>(polynomial_size);
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uint64_t partial_sm =
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get_buffer_size_partial_sm_programmable_bootstrap_cg<Torus>(
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polynomial_size);
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uint64_t partial_dm = full_sm - partial_sm;
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uint64_t full_dm = full_sm;
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uint64_t device_mem = 0;
|
|
if (max_shared_memory < partial_sm) {
|
|
device_mem = full_dm * input_lwe_ciphertext_count * level_count *
|
|
(glwe_dimension + 1);
|
|
} else if (max_shared_memory < full_sm) {
|
|
device_mem = partial_dm * input_lwe_ciphertext_count * level_count *
|
|
(glwe_dimension + 1);
|
|
}
|
|
uint64_t buffer_size = device_mem + (glwe_dimension + 1) * level_count *
|
|
input_lwe_ciphertext_count *
|
|
polynomial_size / 2 * sizeof(double2);
|
|
return buffer_size + buffer_size % sizeof(double2);
|
|
}
|
|
|
|
template <typename InputTorus, typename Torus>
|
|
bool has_support_to_cuda_programmable_bootstrap_cg(uint32_t glwe_dimension,
|
|
uint32_t polynomial_size,
|
|
uint32_t level_count,
|
|
uint32_t num_samples,
|
|
uint32_t max_shared_memory);
|
|
|
|
template <typename InputTorus, typename Torus>
|
|
void cuda_programmable_bootstrap_cg_lwe_ciphertext_vector(
|
|
void *stream, uint32_t gpu_index, Torus *lwe_array_out,
|
|
Torus const *lwe_output_indexes, Torus const *lut_vector,
|
|
Torus const *lut_vector_indexes, InputTorus const *lwe_array_in,
|
|
Torus const *lwe_input_indexes, double2 const *bootstrapping_key,
|
|
pbs_buffer<Torus, CLASSICAL> *buffer, uint32_t lwe_dimension,
|
|
uint32_t glwe_dimension, uint32_t polynomial_size, uint32_t base_log,
|
|
uint32_t level_count, uint32_t num_samples, uint32_t num_many_lut,
|
|
uint32_t lut_stride);
|
|
|
|
template <typename InputTorus, typename Torus>
|
|
void cuda_programmable_bootstrap_lwe_ciphertext_vector(
|
|
void *stream, uint32_t gpu_index, Torus *lwe_array_out,
|
|
Torus const *lwe_output_indexes, Torus const *lut_vector,
|
|
Torus const *lut_vector_indexes, InputTorus const *lwe_array_in,
|
|
Torus const *lwe_input_indexes, double2 const *bootstrapping_key,
|
|
pbs_buffer<Torus, CLASSICAL> *buffer, uint32_t lwe_dimension,
|
|
uint32_t glwe_dimension, uint32_t polynomial_size, uint32_t base_log,
|
|
uint32_t level_count, uint32_t num_samples, uint32_t num_many_lut,
|
|
uint32_t lut_stride);
|
|
|
|
#if (CUDA_ARCH >= 900)
|
|
template <typename InputTorus, typename Torus>
|
|
void cuda_programmable_bootstrap_tbc_lwe_ciphertext_vector(
|
|
void *stream, uint32_t gpu_index, Torus *lwe_array_out,
|
|
Torus const *lwe_output_indexes, Torus const *lut_vector,
|
|
Torus const *lut_vector_indexes, InputTorus const *lwe_array_in,
|
|
Torus const *lwe_input_indexes, double2 const *bootstrapping_key,
|
|
pbs_buffer<Torus, CLASSICAL> *buffer, uint32_t lwe_dimension,
|
|
uint32_t glwe_dimension, uint32_t polynomial_size, uint32_t base_log,
|
|
uint32_t level_count, uint32_t num_samples, uint32_t num_many_lut,
|
|
uint32_t lut_stride);
|
|
|
|
template <typename Torus>
|
|
uint64_t scratch_cuda_programmable_bootstrap_tbc(
|
|
void *stream, uint32_t gpu_index, pbs_buffer<Torus, CLASSICAL> **pbs_buffer,
|
|
uint32_t lwe_dimension, uint32_t glwe_dimension, uint32_t polynomial_size,
|
|
uint32_t level_count, uint32_t input_lwe_ciphertext_count,
|
|
bool allocate_gpu_memory, PBS_MS_REDUCTION_T noise_reduction_type);
|
|
#endif
|
|
|
|
template <typename InputTorus, typename Torus>
|
|
uint64_t scratch_cuda_programmable_bootstrap_cg(
|
|
void *stream, uint32_t gpu_index, pbs_buffer<Torus, CLASSICAL> **pbs_buffer,
|
|
uint32_t lwe_dimension, uint32_t glwe_dimension, uint32_t polynomial_size,
|
|
uint32_t level_count, uint32_t input_lwe_ciphertext_count,
|
|
bool allocate_gpu_memory, PBS_MS_REDUCTION_T noise_reduction_type);
|
|
|
|
template <typename InputTorus, typename Torus>
|
|
uint64_t scratch_cuda_programmable_bootstrap(
|
|
void *stream, uint32_t gpu_index, pbs_buffer<Torus, CLASSICAL> **buffer,
|
|
uint32_t lwe_dimension, uint32_t glwe_dimension, uint32_t polynomial_size,
|
|
uint32_t level_count, uint32_t input_lwe_ciphertext_count,
|
|
bool allocate_gpu_memory, PBS_MS_REDUCTION_T noise_reduction_type);
|
|
|
|
template <typename Torus>
|
|
bool has_support_to_cuda_programmable_bootstrap_tbc(uint32_t num_samples,
|
|
uint32_t glwe_dimension,
|
|
uint32_t polynomial_size,
|
|
uint32_t level_count,
|
|
uint32_t max_shared_memory);
|
|
|
|
bool has_support_to_cuda_programmable_bootstrap_128_cg(
|
|
uint32_t glwe_dimension, uint32_t polynomial_size, uint32_t level_count,
|
|
uint32_t num_samples, uint32_t max_shared_memory);
|
|
|
|
#ifdef __CUDACC__
|
|
__device__ inline int get_start_ith_ggsw(int i, uint32_t polynomial_size,
|
|
int glwe_dimension,
|
|
uint32_t level_count);
|
|
|
|
template <typename T>
|
|
__device__ const T *get_ith_mask_kth_block(const T *ptr, int i, int k,
|
|
int level, uint32_t polynomial_size,
|
|
int glwe_dimension,
|
|
uint32_t level_count);
|
|
|
|
template <typename T>
|
|
__device__ T *get_ith_mask_kth_block(T *ptr, int i, int k, int level,
|
|
uint32_t polynomial_size,
|
|
int glwe_dimension, uint32_t level_count);
|
|
|
|
template <typename T, uint32_t polynomial_size, uint32_t glwe_dimension,
|
|
uint32_t level_count, uint32_t level_id>
|
|
__device__ const T *get_ith_mask_kth_block_2_2_params(const T *ptr,
|
|
int iteration, int k);
|
|
|
|
template <typename T>
|
|
__device__ T *get_ith_body_kth_block(T *ptr, int i, int k, int level,
|
|
uint32_t polynomial_size,
|
|
int glwe_dimension, uint32_t level_count);
|
|
|
|
template <typename T>
|
|
__device__ const T *get_multi_bit_ith_lwe_gth_group_kth_block(
|
|
const T *ptr, int g, int i, int k, int level, uint32_t grouping_factor,
|
|
uint32_t polynomial_size, uint32_t glwe_dimension, uint32_t level_count);
|
|
|
|
#endif
|
|
|
|
#endif // CUDA_BOOTSTRAP_UTILITIES_H
|