From 5b11519d5e386c74b48c691dfd43f0a30b113290 Mon Sep 17 00:00:00 2001
From: Christopher Milan <chrismilan@ucla.edu>
Date: Tue, 17 Feb 2026 15:21:33 -0800
Subject: [PATCH] LLVM actually supports ops (#14843)

LLVM should support eg, SHL/SHR, but this was never actually rendered
---
 tinygrad/renderer/llvmir.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tinygrad/renderer/llvmir.py b/tinygrad/renderer/llvmir.py
index 90b7a39bee..a2d1a1be82 100644
--- a/tinygrad/renderer/llvmir.py
+++ b/tinygrad/renderer/llvmir.py
@@ -136,7 +136,7 @@ class LLVMRenderer(Renderer):
   supports_float4 = True
   abi: str | None
   string_rewrite: PatternMatcher
-  code_for_op = {Ops.FDIV: lambda: None, Ops.CMPLT: lambda: None}
+  code_for_op = {k:lambda:None for v in lop.values() for k in v.keys()}
   if AMX: tensor_cores = tc.amx
 
   extra_matcher = create_non_native_float_pats((dtypes.bfloat16,)) + pm_manual_bf16_cast