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tinygrad/.github/workflows
chenyu bfab03288d fix HALF=1 in test_speed_v_torch (#7642)
* fix HALF=1 in test_speed_v_torch

"operation cache defeats" adds 1 to all arg, which were centered around 0. adding 1 makes big matmul and matvec go inf.

fixed by subtract 1 after and bumpped tolerance for half input

* bigger tol for BIG=2, update CI too

* bigger tol
2024-11-11 14:29:37 -05:00
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2024-07-15 14:21:37 -07:00
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2024-01-09 17:52:22 -08:00
2024-11-11 20:18:04 +08:00