From 33d6eff6c9f227484b49e4f5e12342e9a4450cd2 Mon Sep 17 00:00:00 2001
From: Dzmitry Malyshau <kvarkus@gmail.com>
Date: Thu, 23 Jul 2020 22:24:21 -0400
Subject: [PATCH] Switch pipeline flag to mutation of depth/stencil

---
 wgpu-core/src/command/render.rs | 6 ++----
 wgpu-core/src/device/mod.rs     | 4 ++--
 wgpu-core/src/pipeline.rs       | 2 +-
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/wgpu-core/src/command/render.rs b/wgpu-core/src/command/render.rs
index 0f33e04a96..9b0b9c0e11 100644
--- a/wgpu-core/src/command/render.rs
+++ b/wgpu-core/src/command/render.rs
@@ -1083,10 +1083,8 @@ impl<G: GlobalIdentityHandlerFactory> Global<G> {
                     if !context.compatible(&pipeline.pass_context) {
                         return Err(RenderCommandError::IncompatiblePipeline.into());
                     }
-                    if pipeline
-                        .flags
-                        .contains(PipelineFlags::DEPTH_STENCIL_READ_ONLY)
-                        && !is_ds_read_only
+                    if pipeline.flags.contains(PipelineFlags::WRITES_DEPTH_STENCIL)
+                        && is_ds_read_only
                     {
                         return Err(RenderCommandError::IncompatibleReadOnlyDepthStencil.into());
                     }
diff --git a/wgpu-core/src/device/mod.rs b/wgpu-core/src/device/mod.rs
index 7864062b66..d90b021ba0 100644
--- a/wgpu-core/src/device/mod.rs
+++ b/wgpu-core/src/device/mod.rs
@@ -2396,8 +2396,8 @@ impl<G: GlobalIdentityHandlerFactory> Global<G> {
             if ds.needs_stencil_reference() {
                 flags |= pipeline::PipelineFlags::STENCIL_REFERENCE;
             }
-            if ds.is_read_only() {
-                flags |= pipeline::PipelineFlags::DEPTH_STENCIL_READ_ONLY;
+            if !ds.is_read_only() {
+                flags |= pipeline::PipelineFlags::WRITES_DEPTH_STENCIL;
             }
         }
 
diff --git a/wgpu-core/src/pipeline.rs b/wgpu-core/src/pipeline.rs
index 75113cbda6..a5fee52771 100644
--- a/wgpu-core/src/pipeline.rs
+++ b/wgpu-core/src/pipeline.rs
@@ -74,7 +74,7 @@ bitflags::bitflags! {
     pub struct PipelineFlags: u32 {
         const BLEND_COLOR = 1;
         const STENCIL_REFERENCE = 2;
-        const DEPTH_STENCIL_READ_ONLY = 4;
+        const WRITES_DEPTH_STENCIL = 4;
     }
 }