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https://github.com/pseXperiments/icicle.git
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2b07513310
## Describe the changes This PR adds the capability to pin host memory in golang bindings allowing data transfers to be quicker. Memory can be pinned once for multiple devices by passing the flag `cuda_runtime.CudaHostRegisterPortable` or `cuda_runtime.CudaHostAllocPortable` depending on how pinned memory is called
337 lines
25 KiB
Go
337 lines
25 KiB
Go
package cuda_runtime
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/*
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#cgo LDFLAGS: -L/usr/local/cuda/lib64 -lcudart
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#cgo CFLAGS: -I /usr/local/cuda/include
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#include <cuda.h>
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#include <cuda_runtime.h>
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#include <stdlib.h>
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*/
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import "C"
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type CudaStreamCreateFlags C.uint
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const (
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// CudaStreamDefault as defined in include/driver_types.h:98
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CudaStreamDefault CudaStreamCreateFlags = iota
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// CudaStreamNonBlocking as defined in include/driver_types.h:99
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CudaStreamNonBlocking CudaStreamCreateFlags = 1
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)
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type CudaStreamWaitFlags C.uint
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const (
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// CudaEventWaitDefault as defined in include/driver_types.h:129
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CudaEventWaitDefault CudaStreamWaitFlags = iota
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// CudaEventWaitExternal as defined in include/driver_types.h:130
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CudaEventWaitExternal CudaStreamWaitFlags = 1
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)
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// CudaErrorT as declared in include/driver_types.h:2868
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type CudaError int32
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// CudaErrorT enumeration from include/driver_types.h:2868
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const (
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CudaSuccess CudaError = iota
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CudaErrorInvalidValue CudaError = 1
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CudaErrorMemoryAllocation CudaError = 2
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CudaErrorInitializationError CudaError = 3
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CudaErrorCudartUnloading CudaError = 4
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CudaErrorProfilerDisabled CudaError = 5
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CudaErrorProfilerNotInitialized CudaError = 6
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CudaErrorProfilerAlreadyStarted CudaError = 7
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CudaErrorProfilerAlreadyStopped CudaError = 8
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CudaErrorInvalidConfiguration CudaError = 9
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CudaErrorInvalidPitchValue CudaError = 12
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CudaErrorInvalidSymbol CudaError = 13
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CudaErrorInvalidHostPointer CudaError = 16
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CudaErrorInvalidDevicePointer CudaError = 17
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CudaErrorInvalidTexture CudaError = 18
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CudaErrorInvalidTextureBinding CudaError = 19
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CudaErrorInvalidChannelDescriptor CudaError = 20
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CudaErrorInvalidMemcpyDirection CudaError = 21
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CudaErrorAddressOfConstant CudaError = 22
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CudaErrorTextureFetchFailed CudaError = 23
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CudaErrorTextureNotBound CudaError = 24
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CudaErrorSynchronizationError CudaError = 25
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CudaErrorInvalidFilterSetting CudaError = 26
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CudaErrorInvalidNormSetting CudaError = 27
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CudaErrorMixedDeviceExecution CudaError = 28
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CudaErrorNotYetImplemented CudaError = 31
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CudaErrorMemoryValueTooLarge CudaError = 32
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CudaErrorStubLibrary CudaError = 34
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CudaErrorInsufficientDriver CudaError = 35
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CudaErrorCallRequiresNewerDriver CudaError = 36
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CudaErrorInvalidSurface CudaError = 37
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CudaErrorDuplicateVariableName CudaError = 43
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CudaErrorDuplicateTextureName CudaError = 44
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CudaErrorDuplicateSurfaceName CudaError = 45
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CudaErrorDevicesUnavailable CudaError = 46
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CudaErrorIncompatibleDriverContext CudaError = 49
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CudaErrorMissingConfiguration CudaError = 52
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CudaErrorPriorLaunchFailure CudaError = 53
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CudaErrorLaunchMaxDepthExceeded CudaError = 65
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CudaErrorLaunchFileScopedTex CudaError = 66
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CudaErrorLaunchFileScopedSurf CudaError = 67
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CudaErrorSyncDepthExceeded CudaError = 68
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CudaErrorLaunchPendingCountExceeded CudaError = 69
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CudaErrorInvalidDeviceFunction CudaError = 98
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CudaErrorNoDevice CudaError = 100
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CudaErrorInvalidDevice CudaError = 101
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CudaErrorDeviceNotLicensed CudaError = 102
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CudaErrorSoftwareValidityNotEstablished CudaError = 103
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CudaErrorStartupFailure CudaError = 127
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CudaErrorInvalidKernelImage CudaError = 200
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CudaErrorDeviceUninitialized CudaError = 201
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CudaErrorMapBufferObjectFailed CudaError = 205
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CudaErrorUnmapBufferObjectFailed CudaError = 206
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CudaErrorArrayIsMapped CudaError = 207
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CudaErrorAlreadyMapped CudaError = 208
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CudaErrorNoKernelImageForDevice CudaError = 209
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CudaErrorAlreadyAcquired CudaError = 210
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CudaErrorNotMapped CudaError = 211
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CudaErrorNotMappedAsArray CudaError = 212
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CudaErrorNotMappedAsPointer CudaError = 213
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CudaErrorECCUncorrectable CudaError = 214
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CudaErrorUnsupportedLimit CudaError = 215
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CudaErrorDeviceAlreadyInUse CudaError = 216
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CudaErrorPeerAccessUnsupported CudaError = 217
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CudaErrorInvalidPtx CudaError = 218
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CudaErrorInvalidGraphicsContext CudaError = 219
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CudaErrorNvlinkUncorrectable CudaError = 220
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CudaErrorJitCompilerNotFound CudaError = 221
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CudaErrorUnsupportedPtxVersion CudaError = 222
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CudaErrorJitCompilationDisabled CudaError = 223
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CudaErrorUnsupportedExecAffinity CudaError = 224
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CudaErrorUnsupportedDevSideSync CudaError = 225
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CudaErrorInvalidSource CudaError = 300
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CudaErrorFileNotFound CudaError = 301
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CudaErrorSharedObjectSymbolNotFound CudaError = 302
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CudaErrorSharedObjectInitFailed CudaError = 303
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CudaErrorOperatingSystem CudaError = 304
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CudaErrorInvalidResourceHandle CudaError = 400
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CudaErrorIllegalState CudaError = 401
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CudaErrorLossyQuery CudaError = 402
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CudaErrorSymbolNotFound CudaError = 500
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CudaErrorNotReady CudaError = 600
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CudaErrorIllegalAddress CudaError = 700
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CudaErrorLaunchOutOfResources CudaError = 701
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CudaErrorLaunchTimeout CudaError = 702
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CudaErrorLaunchIncompatibleTexturing CudaError = 703
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CudaErrorPeerAccessAlreadyEnabled CudaError = 704
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CudaErrorPeerAccessNotEnabled CudaError = 705
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CudaErrorSetOnActiveProcess CudaError = 708
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CudaErrorContextIsDestroyed CudaError = 709
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CudaErrorAssert CudaError = 710
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CudaErrorTooManyPeers CudaError = 711
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CudaErrorHostMemoryAlreadyRegistered CudaError = 712
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CudaErrorHostMemoryNotRegistered CudaError = 713
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CudaErrorHardwareStackError CudaError = 714
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CudaErrorIllegalInstruction CudaError = 715
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CudaErrorMisalignedAddress CudaError = 716
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CudaErrorInvalidAddressSpace CudaError = 717
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CudaErrorInvalidPc CudaError = 718
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CudaErrorLaunchFailure CudaError = 719
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CudaErrorCooperativeLaunchTooLarge CudaError = 720
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CudaErrorNotPermitted CudaError = 800
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CudaErrorNotSupported CudaError = 801
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CudaErrorSystemNotReady CudaError = 802
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CudaErrorSystemDriverMismatch CudaError = 803
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CudaErrorCompatNotSupportedOnDevice CudaError = 804
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CudaErrorMpsConnectionFailed CudaError = 805
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CudaErrorMpsRpcFailure CudaError = 806
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CudaErrorMpsServerNotReady CudaError = 807
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CudaErrorMpsMaxClientsReached CudaError = 808
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CudaErrorMpsMaxConnectionsReached CudaError = 809
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CudaErrorMpsClientTerminated CudaError = 810
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CudaErrorCdpNotSupported CudaError = 811
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CudaErrorCdpVersionMismatch CudaError = 812
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CudaErrorStreamCaptureUnsupported CudaError = 900
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CudaErrorStreamCaptureInvalidated CudaError = 901
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CudaErrorStreamCaptureMerge CudaError = 902
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CudaErrorStreamCaptureUnmatched CudaError = 903
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CudaErrorStreamCaptureUnjoined CudaError = 904
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CudaErrorStreamCaptureIsolation CudaError = 905
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CudaErrorStreamCaptureImplicit CudaError = 906
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CudaErrorCapturedEvent CudaError = 907
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CudaErrorStreamCaptureWrongThread CudaError = 908
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CudaErrorTimeout CudaError = 909
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CudaErrorGraphExecUpdateFailure CudaError = 910
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CudaErrorExternalDevice CudaError = 911
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CudaErrorInvalidClusterSize CudaError = 912
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CudaErrorUnknown CudaError = 999
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CudaErrorApiFailureBase CudaError = 10000
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)
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type CudaMemcpyKind C.uint
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const (
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// CudaMemcpyHostToHost as declared in include/driver_types.h:1219
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CudaMemcpyHostToHost CudaMemcpyKind = iota
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// CudaMemcpyHostToDevice as declared in include/driver_types.h:1220
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CudaMemcpyHostToDevice CudaMemcpyKind = 1
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// CudaMemcpyDeviceToHost as declared in include/driver_types.h:1221
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CudaMemcpyDeviceToHost CudaMemcpyKind = 2
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// CudaMemcpyDeviceToDevice as declared in include/driver_types.h:1222
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CudaMemcpyDeviceToDevice CudaMemcpyKind = 3
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// CudaMemcpyDefault as declared in include/driver_types.h:1223
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CudaMemcpyDefault CudaMemcpyKind = 4
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)
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type AllocPinnedFlags = C.uint
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// CudaErrorT enumeration from include/driver_types.h:85-88
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const (
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CudaHostAllocDefault AllocPinnedFlags = 0x00 /**< Default page-locked allocation flag */
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CudaHostAllocPortable AllocPinnedFlags = 0x01 /**< Pinned memory accessible by all CUDA contexts */
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// Currently not supported
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// CudaHostAllocMapped AllocPinnedFlags = 0x02 /**< Map allocation into device space */
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// CudaHostAllocWriteCombined AllocPinnedFlags = 0x04 /**< Write-combined memory */
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)
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type RegisterPinnedFlags = C.uint
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// CudaErrorT enumeration from include/driver_types.h:90-94
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const (
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CudaHostRegisterDefault RegisterPinnedFlags = 0x00 /**< Default host memory registration flag */
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CudaHostRegisterPortable RegisterPinnedFlags = 0x01 /**< Pinned memory accessible by all CUDA contexts */
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// Currently not supported
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// CudaHostRegisterMapped RegisterPinnedFlags = 0x02 /**< Map registered memory into device space */
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// cudaHostRegisterIoMemory RegisterPinnedFlags = 0x04 /**< Memory-mapped I/O space */
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// cudaHostRegisterReadOnly RegisterPinnedFlags = 0x08 /**< Memory-mapped read-only */
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)
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type DeviceAttribute = uint32
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const (
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CudaDevAttrMaxThreadsPerBlock DeviceAttribute = 1 /**< Maximum number of threads per block */
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CudaDevAttrMaxBlockDimX DeviceAttribute = 2 /**< Maximum block dimension X */
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CudaDevAttrMaxBlockDimY DeviceAttribute = 3 /**< Maximum block dimension Y */
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CudaDevAttrMaxBlockDimZ DeviceAttribute = 4 /**< Maximum block dimension Z */
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CudaDevAttrMaxGridDimX DeviceAttribute = 5 /**< Maximum grid dimension X */
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CudaDevAttrMaxGridDimY DeviceAttribute = 6 /**< Maximum grid dimension Y */
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CudaDevAttrMaxGridDimZ DeviceAttribute = 7 /**< Maximum grid dimension Z */
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CudaDevAttrMaxSharedMemoryPerBlock DeviceAttribute = 8 /**< Maximum shared memory available per block in bytes */
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CudaDevAttrTotalConstantMemory DeviceAttribute = 9 /**< Memory available on device for __constant__ variables in a CUDA C kernel in bytes */
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CudaDevAttrWarpSize DeviceAttribute = 10 /**< Warp size in threads */
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CudaDevAttrMaxPitch DeviceAttribute = 11 /**< Maximum pitch in bytes allowed by memory copies */
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CudaDevAttrMaxRegistersPerBlock DeviceAttribute = 12 /**< Maximum number of 32-bit registers available per block */
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CudaDevAttrClockRate DeviceAttribute = 13 /**< Peak clock frequency in kilohertz */
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CudaDevAttrTextureAlignment DeviceAttribute = 14 /**< Alignment requirement for textures */
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CudaDevAttrGpuOverlap DeviceAttribute = 15 /**< Device can possibly copy memory and execute a kernel concurrently */
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CudaDevAttrMultiProcessorCount DeviceAttribute = 16 /**< Number of multiprocessors on device */
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CudaDevAttrKernelExecTimeout DeviceAttribute = 17 /**< Specifies whether there is a run time limit on kernels */
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CudaDevAttrIntegrated DeviceAttribute = 18 /**< Device is integrated with host memory */
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CudaDevAttrCanMapHostMemory DeviceAttribute = 19 /**< Device can map host memory into CUDA address space */
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CudaDevAttrComputeMode DeviceAttribute = 20 /**< Compute mode (See ::cudaComputeMode for details) */
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CudaDevAttrMaxTexture1DWidth DeviceAttribute = 21 /**< Maximum 1D texture width */
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CudaDevAttrMaxTexture2DWidth DeviceAttribute = 22 /**< Maximum 2D texture width */
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CudaDevAttrMaxTexture2DHeight DeviceAttribute = 23 /**< Maximum 2D texture height */
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CudaDevAttrMaxTexture3DWidth DeviceAttribute = 24 /**< Maximum 3D texture width */
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CudaDevAttrMaxTexture3DHeight DeviceAttribute = 25 /**< Maximum 3D texture height */
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CudaDevAttrMaxTexture3DDepth DeviceAttribute = 26 /**< Maximum 3D texture depth */
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CudaDevAttrMaxTexture2DLayeredWidth DeviceAttribute = 27 /**< Maximum 2D layered texture width */
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CudaDevAttrMaxTexture2DLayeredHeight DeviceAttribute = 28 /**< Maximum 2D layered texture height */
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CudaDevAttrMaxTexture2DLayeredLayers DeviceAttribute = 29 /**< Maximum layers in a 2D layered texture */
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CudaDevAttrSurfaceAlignment DeviceAttribute = 30 /**< Alignment requirement for surfaces */
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CudaDevAttrConcurrentKernels DeviceAttribute = 31 /**< Device can possibly execute multiple kernels concurrently */
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CudaDevAttrEccEnabled DeviceAttribute = 32 /**< Device has ECC support enabled */
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CudaDevAttrPciBusId DeviceAttribute = 33 /**< PCI bus ID of the device */
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CudaDevAttrPciDeviceId DeviceAttribute = 34 /**< PCI device ID of the device */
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CudaDevAttrTccDriver DeviceAttribute = 35 /**< Device is using TCC driver model */
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CudaDevAttrMemoryClockRate DeviceAttribute = 36 /**< Peak memory clock frequency in kilohertz */
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CudaDevAttrGlobalMemoryBusWidth DeviceAttribute = 37 /**< Global memory bus width in bits */
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CudaDevAttrL2CacheSize DeviceAttribute = 38 /**< Size of L2 cache in bytes */
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CudaDevAttrMaxThreadsPerMultiProcessor DeviceAttribute = 39 /**< Maximum resident threads per multiprocessor */
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CudaDevAttrAsyncEngineCount DeviceAttribute = 40 /**< Number of asynchronous engines */
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CudaDevAttrUnifiedAddressing DeviceAttribute = 41 /**< Device shares a unified address space with the host */
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CudaDevAttrMaxTexture1DLayeredWidth DeviceAttribute = 42 /**< Maximum 1D layered texture width */
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CudaDevAttrMaxTexture1DLayeredLayers DeviceAttribute = 43 /**< Maximum layers in a 1D layered texture */
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CudaDevAttrMaxTexture2DGatherWidth DeviceAttribute = 45 /**< Maximum 2D texture width if cudaArrayTextureGather is set */
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CudaDevAttrMaxTexture2DGatherHeight DeviceAttribute = 46 /**< Maximum 2D texture height if cudaArrayTextureGather is set */
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CudaDevAttrMaxTexture3DWidthAlt DeviceAttribute = 47 /**< Alternate maximum 3D texture width */
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CudaDevAttrMaxTexture3DHeightAlt DeviceAttribute = 48 /**< Alternate maximum 3D texture height */
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CudaDevAttrMaxTexture3DDepthAlt DeviceAttribute = 49 /**< Alternate maximum 3D texture depth */
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CudaDevAttrPciDomainId DeviceAttribute = 50 /**< PCI domain ID of the device */
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CudaDevAttrTexturePitchAlignment DeviceAttribute = 51 /**< Pitch alignment requirement for textures */
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CudaDevAttrMaxTextureCubemapWidth DeviceAttribute = 52 /**< Maximum cubemap texture width/height */
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CudaDevAttrMaxTextureCubemapLayeredWidth DeviceAttribute = 53 /**< Maximum cubemap layered texture width/height */
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CudaDevAttrMaxTextureCubemapLayeredLayers DeviceAttribute = 54 /**< Maximum layers in a cubemap layered texture */
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CudaDevAttrMaxSurface1DWidth DeviceAttribute = 55 /**< Maximum 1D surface width */
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CudaDevAttrMaxSurface2DWidth DeviceAttribute = 56 /**< Maximum 2D surface width */
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CudaDevAttrMaxSurface2DHeight DeviceAttribute = 57 /**< Maximum 2D surface height */
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CudaDevAttrMaxSurface3DWidth DeviceAttribute = 58 /**< Maximum 3D surface width */
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CudaDevAttrMaxSurface3DHeight DeviceAttribute = 59 /**< Maximum 3D surface height */
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CudaDevAttrMaxSurface3DDepth DeviceAttribute = 60 /**< Maximum 3D surface depth */
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CudaDevAttrMaxSurface1DLayeredWidth DeviceAttribute = 61 /**< Maximum 1D layered surface width */
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CudaDevAttrMaxSurface1DLayeredLayers DeviceAttribute = 62 /**< Maximum layers in a 1D layered surface */
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CudaDevAttrMaxSurface2DLayeredWidth DeviceAttribute = 63 /**< Maximum 2D layered surface width */
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CudaDevAttrMaxSurface2DLayeredHeight DeviceAttribute = 64 /**< Maximum 2D layered surface height */
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CudaDevAttrMaxSurface2DLayeredLayers DeviceAttribute = 65 /**< Maximum layers in a 2D layered surface */
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CudaDevAttrMaxSurfaceCubemapWidth DeviceAttribute = 66 /**< Maximum cubemap surface width */
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CudaDevAttrMaxSurfaceCubemapLayeredWidth DeviceAttribute = 67 /**< Maximum cubemap layered surface width */
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CudaDevAttrMaxSurfaceCubemapLayeredLayers DeviceAttribute = 68 /**< Maximum layers in a cubemap layered surface */
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CudaDevAttrMaxTexture1DLinearWidth DeviceAttribute = 69 /**< Maximum 1D linear texture width */
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CudaDevAttrMaxTexture2DLinearWidth DeviceAttribute = 70 /**< Maximum 2D linear texture width */
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CudaDevAttrMaxTexture2DLinearHeight DeviceAttribute = 71 /**< Maximum 2D linear texture height */
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CudaDevAttrMaxTexture2DLinearPitch DeviceAttribute = 72 /**< Maximum 2D linear texture pitch in bytes */
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CudaDevAttrMaxTexture2DMipmappedWidth DeviceAttribute = 73 /**< Maximum mipmapped 2D texture width */
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CudaDevAttrMaxTexture2DMipmappedHeight DeviceAttribute = 74 /**< Maximum mipmapped 2D texture height */
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CudaDevAttrComputeCapabilityMajor DeviceAttribute = 75 /**< Major compute capability version number */
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CudaDevAttrComputeCapabilityMinor DeviceAttribute = 76 /**< Minor compute capability version number */
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CudaDevAttrMaxTexture1DMipmappedWidth DeviceAttribute = 77 /**< Maximum mipmapped 1D texture width */
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CudaDevAttrStreamPrioritiesSupported DeviceAttribute = 78 /**< Device supports stream priorities */
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CudaDevAttrGlobalL1CacheSupported DeviceAttribute = 79 /**< Device supports caching globals in L1 */
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CudaDevAttrLocalL1CacheSupported DeviceAttribute = 80 /**< Device supports caching locals in L1 */
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CudaDevAttrMaxSharedMemoryPerMultiprocessor DeviceAttribute = 81 /**< Maximum shared memory available per multiprocessor in bytes */
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CudaDevAttrMaxRegistersPerMultiprocessor DeviceAttribute = 82 /**< Maximum number of 32-bit registers available per multiprocessor */
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CudaDevAttrManagedMemory DeviceAttribute = 83 /**< Device can allocate managed memory on this system */
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CudaDevAttrIsMultiGpuBoard DeviceAttribute = 84 /**< Device is on a multi-GPU board */
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CudaDevAttrMultiGpuBoardGroupID DeviceAttribute = 85 /**< Unique identifier for a group of devices on the same multi-GPU board */
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CudaDevAttrHostNativeAtomicSupported DeviceAttribute = 86 /**< Link between the device and the host supports native atomic operations */
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CudaDevAttrSingleToDoublePrecisionPerfRatio DeviceAttribute = 87 /**< Ratio of single precision performance (in floating-point operations per second) to double precision performance */
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CudaDevAttrPageableMemoryAccess DeviceAttribute = 88 /**< Device supports coherently accessing pageable memory without calling cudaHostRegister on it */
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CudaDevAttrConcurrentManagedAccess DeviceAttribute = 89 /**< Device can coherently access managed memory concurrently with the CPU */
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CudaDevAttrComputePreemptionSupported DeviceAttribute = 90 /**< Device supports Compute Preemption */
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CudaDevAttrCanUseHostPointerForRegisteredMem DeviceAttribute = 91 /**< Device can access host registered memory at the same virtual address as the CPU */
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CudaDevAttrReserved92 DeviceAttribute = 92
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CudaDevAttrReserved93 DeviceAttribute = 93
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CudaDevAttrReserved94 DeviceAttribute = 94
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CudaDevAttrCooperativeLaunch DeviceAttribute = 95 /**< Device supports launching cooperative kernels via ::cudaLaunchCooperativeKernel*/
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CudaDevAttrCooperativeMultiDeviceLaunch DeviceAttribute = 96 /**< Deprecated cudaLaunchCooperativeKernelMultiDevice is deprecated. */
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CudaDevAttrMaxSharedMemoryPerBlockOptin DeviceAttribute = 97 /**< The maximum opt-in shared memory per block. This value may vary by chip. See ::cudaFuncSetAttribute */
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CudaDevAttrCanFlushRemoteWrites DeviceAttribute = 98 /**< Device supports flushing of outstanding remote writes. */
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CudaDevAttrHostRegisterSupported DeviceAttribute = 99 /**< Device supports host memory registration via ::cudaHostRegister. */
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CudaDevAttrPageableMemoryAccessUsesHostPageTables DeviceAttribute = 100 /**< Device accesses pageable memory via the host's page tables. */
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CudaDevAttrDirectManagedMemAccessFromHost DeviceAttribute = 101 /**< Host can directly access managed memory on the device without migration. */
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CudaDevAttrMaxBlocksPerMultiprocessor DeviceAttribute = 106 /**< Maximum number of blocks per multiprocessor */
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CudaDevAttrMaxPersistingL2CacheSize DeviceAttribute = 108 /**< Maximum L2 persisting lines capacity setting in bytes. */
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CudaDevAttrMaxAccessPolicyWindowSize DeviceAttribute = 109 /**< Maximum value of cudaAccessPolicyWindow::num_bytes. */
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CudaDevAttrReservedSharedMemoryPerBlock DeviceAttribute = 111 /**< Shared memory reserved by CUDA driver per block in bytes */
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CudaDevAttrSparseCudaArraySupported DeviceAttribute = 112 /**< Device supports sparse CUDA arrays and sparse CUDA mipmapped arrays */
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CudaDevAttrHostRegisterReadOnlySupported DeviceAttribute = 113 /**< Device supports using the ::cudaHostRegister flag cudaHostRegisterReadOnly to register memory that must be mapped as read-only to the GPU */
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CudaDevAttrTimelineSemaphoreInteropSupported DeviceAttribute = 114 /**< External timeline semaphore interop is supported on the device */
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CudaDevAttrMaxTimelineSemaphoreInteropSupported DeviceAttribute = 114 /**< Deprecated External timeline semaphore interop is supported on the device */
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CudaDevAttrMemoryPoolsSupported DeviceAttribute = 115 /**< Device supports using the ::cudaMallocAsync and ::cudaMemPool family of APIs */
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CudaDevAttrGPUDirectRDMASupported DeviceAttribute = 116 /**< Device supports GPUDirect RDMA APIs like nvidia_p2p_get_pages (see https://docs.nvidia.com/cuda/gpudirect-rdma for more information) */
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CudaDevAttrGPUDirectRDMAFlushWritesOptions DeviceAttribute = 117 /**< The returned attribute shall be interpreted as a bitmask where the individual bits are listed in the ::cudaFlushGPUDirectRDMAWritesOptions enum */
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CudaDevAttrGPUDirectRDMAWritesOrdering DeviceAttribute = 118 /**< GPUDirect RDMA writes to the device do not need to be flushed for consumers within the scope indicated by the returned attribute. See ::cudaGPUDirectRDMAWritesOrdering for the numerical values returned here. */
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CudaDevAttrMemoryPoolSupportedHandleTypes DeviceAttribute = 119 /**< Handle types supported with mempool based IPC */
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CudaDevAttrClusterLaunch DeviceAttribute = 120 /**< Indicates device supports cluster launch */
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CudaDevAttrDeferredMappingCudaArraySupported DeviceAttribute = 121 /**< Device supports deferred mapping CUDA arrays and CUDA mipmapped arrays */
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CudaDevAttrReserved122 DeviceAttribute = 122
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CudaDevAttrReserved123 DeviceAttribute = 123
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CudaDevAttrReserved124 DeviceAttribute = 124
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CudaDevAttrIpcEventSupport DeviceAttribute = 125 /**< Device supports IPC Events. */
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CudaDevAttrMemSyncDomainCount DeviceAttribute = 126 /**< Number of memory synchronization domains the device supports. */
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CudaDevAttrReserved127 DeviceAttribute = 127
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CudaDevAttrReserved128 DeviceAttribute = 128
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CudaDevAttrReserved129 DeviceAttribute = 129
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CudaDevAttrNumaConfig DeviceAttribute = 130 /**< NUMA configuration of a device: value is of type cudaDeviceNumaConfig enum */
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CudaDevAttrNumaId DeviceAttribute = 131 /**< NUMA node ID of the GPU memory */
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CudaDevAttrReserved132 DeviceAttribute = 132
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CudaDevAttrMpsEnabled DeviceAttribute = 133 /**< Contexts created on this device will be shared via MPS */
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CudaDevAttrHostNumaId DeviceAttribute = 134 /**< NUMA ID of the host node closest to the device. Returns -1 when system does not support NUMA. */
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CudaDevAttrMax DeviceAttribute = 135
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)
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