Commit Graph

168 Commits

Author SHA1 Message Date
chriseth
bef7d80c70 Change labels to require just a single colon. 2023-12-19 14:07:21 +01:00
Georg Wiese
68a1ea374d Read bootloader inputs from write-once memory 2023-12-18 15:37:47 +01:00
Georg Wiese
2f9dc9d370 Fix continuations 2023-12-13 17:06:33 +01:00
Georg Wiese
50d08cd5a7 Pipeline Artifacts: Include name 2023-12-12 23:24:57 +01:00
Georg Wiese
05b6f154d8 Small fixes 2023-12-12 13:10:05 +01:00
Georg Wiese
d31c82bcfb No, test not working 2023-12-11 17:22:32 +01:00
Georg Wiese
726b414e4e Test now working? 2023-12-11 17:19:13 +01:00
Georg Wiese
376019c7eb Refactor 2023-12-11 16:45:29 +01:00
Georg Wiese
3908634133 Implement proving of continuations 2023-12-08 19:10:37 +01:00
Georg Wiese
13450ebcde Merge pull request #833 from powdr-labs/add-continuations-test
Add continuations test
2023-12-08 14:59:22 +00:00
Georg Wiese
54045fbcf7 Pipeline 2023-12-07 22:12:29 +01:00
Georg Wiese
4967ccefd7 Add continuations test 2023-12-07 17:43:39 +01:00
Georg Wiese
bfff61516e Move continuations into riscv crate 2023-12-07 17:31:03 +01:00
Leo Alt
80ce5ca097 lean executor without trace 2023-12-07 13:06:38 +01:00
Leo Alt
88206d3ca3 new data input 2023-12-04 13:35:23 +01:00
Georg Wiese
d93e80353a Bootloader: Add Merkle proofs 2023-11-30 17:20:56 +01:00
Georg Wiese
1b30931286 Bootloader: Hash pages 2023-11-30 15:20:27 +01:00
Georg Wiese
d4ea1db47a Bootloader: Unroll page loop 2023-11-29 20:01:42 +01:00
Georg Wiese
85b5ef030e Continuations Prototype 2023-11-29 16:23:14 +01:00
Georg Wiese
aca7536821 Add Bootloader 2023-11-29 16:19:01 +01:00
Leo Alt
cd1756f5fc more linking table entries 2023-11-28 18:16:38 +01:00
Leo Alt
0706001e92 mulh 2023-11-28 14:53:31 +01:00
Georg Wiese
8c50681fc1 Write-Once Memory 2023-11-24 16:13:56 +01:00
Lucas Clemente Vella
cd4449e65f RISCV executor 2023-11-24 11:42:35 +01:00
Leo Alt
3d61a0a1d7 fix poseidon assembly routine 2023-11-23 12:01:12 +01:00
Lucas Clemente Vella
27a2b006cd Providing alloc_zeroed instead of using default implementation.
This may save some cycles of zeroing already zeroed memory.
2023-11-21 11:00:51 +00:00
Lucas Clemente Vella
2ad7859e5b Removing tail instruction.
In our label based implementation, tail should actually be
identical to jump.
2023-11-15 17:55:39 +03:00
Lucas Clemente Vella
ee67d365c5 Regression: fixing instruction sc.w
Failure to write without a reservation was not being reported.
2023-11-09 17:42:31 +00:00
Lucas Clemente Vella
f716768d9a Instruction tests properly returning from __runtime_start. 2023-11-07 16:24:33 +00:00
Leo
93cf6d720d Merge pull request #751 from powdr-labs/allow_println
Explicitly allow printing to stdout.
2023-11-06 19:24:56 +00:00
Lucas Clemente Vella
a798a73304 On success, RV32 instruction tests returns from __runtime_start. 2023-11-06 17:32:48 +00:00
chriseth
1ce585d724 Explicitly allow printing to stdout. 2023-11-06 17:04:29 +01:00
Leo Alt
9e6de3b9c6 comment evm test for now because it uses too much memory 2023-11-02 10:45:09 +01:00
Leo Alt
6ec74de4cc choose degree automatically from program size 2023-11-02 10:24:53 +01:00
Leo Alt
5f23461924 run evm test 2023-11-01 17:24:19 +01:00
Leo Alt
4aef087487 fix riscv asm 2023-10-30 11:31:23 +01:00
Leo
81e3acccca Merge pull request #709 from powdr-labs/mload_unaligned
Implement mload with alignment correction built-in.
2023-10-26 13:31:40 +00:00
chriseth
554d123a2c Remove addr register. 2023-10-26 15:08:19 +02:00
Leo Alt
72691b495e update evm test 2023-10-26 13:45:21 +02:00
chriseth
c7f778fd9e Implement mload with alignment correction built in. 2023-10-26 11:57:04 +02:00
chriseth
ee0ba2e6a8 Fix handling of ".zero" with second argument. 2023-10-25 17:50:56 +02:00
Leo Alt
a8eb9e1aba add argument to mstore 2023-10-21 14:53:09 +02:00
Guillaume Ballet
1b29f6f76c poseidon gl rust 2023-10-17 18:56:08 +02:00
Lucas Clemente Vella
bad8750805 Removing number and compiler dependency from riscv. 2023-10-13 18:31:22 +01:00
Lucas Clemente Vella
df43affd63 Using the same json library in all crates. 2023-10-11 15:19:29 +01:00
Lucas Clemente Vella
566dbeec00 Implementing mulhsu.
Not the most pretty solution, but works.
2023-10-05 15:24:09 +01:00
Lucas Clemente Vella
89fd808146 Implementation of lr/sc instructions and tests. 2023-10-05 15:16:13 +01:00
Georg Wiese
a28a037f19 Disallow prints in all crates 2023-10-05 08:11:23 +00:00
schaeff
a3ebf460fd remove constraints blocks 2023-10-04 12:52:59 +02:00
Georg Wiese
5268e6fc24 Add more machines to Powdr STD 2023-10-03 18:02:01 +00:00