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feat(hpu): Add bpip_use_opportunism register to select the usage of opportunism when BPIP.

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Update regif toml (also contains new registers - WIP).
Remove access to registers that do not exist anymore
This commit is contained in:
JJ-hw
2025-03-24 12:41:55 +01:00
committed by Baptiste Roux
parent cc968380f8
commit cf0b288b17
6 changed files with 74 additions and 47 deletions
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1
backends/tfhe-hpu-backend/config_store/u55c_gf64/hpu_config.toml
View File

@@ -9,6 +9,7 @@
[rtl]
bpip_used = true
bpip_use_opportunism = false
bpip_timeout = 100_000
[board]

40
backends/tfhe-hpu-backend/config_store/u55c_gf64/hpu_regif_core.toml
View File

@@ -191,7 +191,8 @@ description="BPIP configuration"
owner="User"
read_access="Read"
write_access="Write"
field.use_bpip = { size_b=1, offset_b=0 , default={Cst=0}, description="use"}
field.use_bpip = { size_b=1, offset_b=0 , default={Cst=1}, description="use"}
field.use_opportunism = { size_b=1, offset_b=1 , default={Cst=0}, description="use opportunistic PBS flush"}
[section.bpip.register.timeout]
description="Timeout for BPIP mode"
@@ -351,6 +352,7 @@ offset= 0x2000
write_access="None"
field.pbs_in_rp = { size_b=8, offset_b=0 , default={Cst=0}, description="PEP pbs_in_rp"}
field.pbs_in_wp = { size_b=8, offset_b=8 , default={Cst=0}, description="PEP pbs_in_wp"}
field.ipip_flush_last_pbs_in_loop = { size_b=16, offset_b=16 , default={Cst=0}, description="PEP IPIP flush last pbs_in_loop"}
[section.runtime_1in3.register.isc_latest_instruction]
description="ISC: 4 latest instructions received ([0] is the most recent)"
@@ -377,6 +379,19 @@ offset= 0x2000
read_access="Read"
write_access="WriteNotify"
[section.runtime_1in3.register.pep_seq_bpip_waiting_batch_cnt]
description="PEP: BPIP batch that waits the trigger counter (Could be reset by user)"
owner="Kernel"
read_access="Read"
write_access="WriteNotify"
[section.runtime_1in3.register.pep_seq_bpip_batch_filling_cnt]
description="PEP: Count batch with filled with a given number of CT (Could be reset by user)"
owner="Kernel"
read_access="Read"
write_access="WriteNotify"
duplicate=["_1","_2","_3","_4","_5","_6","_7","_8","_9","_10","_11","_12","_13","_14","_15","_16"]
[section.runtime_1in3.register.pep_seq_ld_ack_cnt]
description="PEP: load BLWE ack counter (Could be reset by user)"
owner="Kernel"
@@ -389,6 +404,12 @@ offset= 0x2000
read_access="Read"
write_access="WriteNotify"
[section.runtime_1in3.register.pep_seq_ipip_flush_cnt]
description="PEP: IPIP flush CMUX counter (Could be reset by user)"
owner="Kernel"
read_access="Read"
write_access="WriteNotify"
[section.runtime_1in3.register.pep_ldb_rcp_dur]
description="PEP: load BLWE reception max duration (Could be reset by user)"
owner="Kernel"
@@ -566,6 +587,23 @@ description="Runtime information"
write_access="WriteNotify"
duplicate=["_pc0","_pc1","_pc2","_pc3","_pc4","_pc5","_pc6","_pc7","_pc8","_pc9","_pc10","_pc11","_pc12","_pc13","_pc14","_pc15"]
[section.runtime_3in3.register.pep_bskif_req_info_0]
description="PEP: BSK_IF: requester info 0"
owner="Kernel"
read_access="Read"
write_access="None"
field.req_br_loop_rp = { size_b=16, offset_b=0 , default={Cst=0}, description="PEP BSK_IF requester BSK read pointer"}
field.req_br_loop_wp = { size_b=16, offset_b=16 , default={Cst=0}, description="PEP BSK_IF requester BSK write pointer"}
[section.runtime_3in3.register.pep_bskif_req_info_1]
description="PEP: BSK_IF: requester info 0"
owner="Kernel"
read_access="Read"
write_access="None"
field.req_prf_br_loop = { size_b=16, offset_b=0 , default={Cst=0}, description="PEP BSK_IF requester BSK prefetch pointer"}
field.req_parity = { size_b=1, offset_b=16 , default={Cst=0}, description="PEP BSK_IF requester BSK pointer parity"}
field.req_assigned = { size_b=1, offset_b=31 , default={Cst=0}, description="PEP BSK_IF requester assignment"}
# =====================================================================================================================
[section.WorkAck]
description="Purpose of this section"

18
backends/tfhe-hpu-backend/src/interface/backend.rs
View File

@@ -132,13 +132,19 @@ impl HpuBackend {
// Apply Rtl configuration
// Bpip use
let bpip_use_reg = regmap
.register()
.get("bpip::use")
.expect("Unknow register, check regmap definition");
hpu_hw.write_reg(
*regmap
.register()
.get("bpip::use")
.expect("Unknow register, check regmap definition")
.offset() as u64,
config.rtl.bpip_used as u32,
*bpip_use_reg.offset() as u64,
bpip_use_reg.from_field(
[
("use_bpip", config.rtl.bpip_used as u32),
("use_opportunism", config.rtl.bpip_use_opportunism as u32),
]
.into(),
),
);
// Bpip timeout

51
backends/tfhe-hpu-backend/src/interface/rtl/runtime.rs
View File

@@ -7,6 +7,8 @@ use super::*;
pub struct InfoPePbs {
/// Bpip used
bpip_used: bool,
/// Bpip use opportunism
bpip_use_opportunism: bool,
/// Bpip timeout
bpip_timeout: u32,
@@ -113,7 +115,10 @@ impl InfoPePbs {
.register()
.get("bpip::use")
.expect("Unknow register, check regmap definition");
self.bpip_used = ffi_hw.read_reg(*reg_use.offset() as u64) != 0;
let val = ffi_hw.read_reg(*reg_use.offset() as u64);
let fields = reg_use.as_field(val);
self.bpip_used = *fields.get("use_bpip").expect("Unknow field") == 1;
self.bpip_use_opportunism = *fields.get("use_opportunism").expect("Unknow field") == 1;
let reg_timeout = regmap
.register()
.get("bpip::timeout")
@@ -439,8 +444,6 @@ pub struct InfoPeMem {
pem_store_ack_cnt: u32,
/// PEM load first addr/data
pem_ld_info: [PeMemInfo; 2],
/// PEM store first addr/data
pem_st_info: [PeMemInfo; 2],
}
impl FromRtl for InfoPeMem {
fn from_rtl(ffi_hw: &mut ffi::HpuHw, regmap: &FlatRegmap) -> Self {
@@ -461,8 +464,6 @@ impl InfoPeMem {
self.update_pem_store_ack_cnt(ffi_hw, regmap);
self.update_pem_ld_info(ffi_hw, regmap, 0);
self.update_pem_ld_info(ffi_hw, regmap, 1);
//self.update_pem_st_info(ffi_hw, regmap, 0);
//self.update_pem_st_info(ffi_hw, regmap, 1);
}
pub fn update_pem_load_inst_cnt(&mut self, ffi_hw: &mut ffi::HpuHw, regmap: &FlatRegmap) {
@@ -523,36 +524,6 @@ impl InfoPeMem {
});
}
pub fn update_pem_st_info(
&mut self,
ffi_hw: &mut ffi::HpuHw,
regmap: &FlatRegmap,
pc_idx: usize,
) {
// Update addr field
self.pem_st_info[pc_idx].addr = ["msb", "lsb"]
.iter()
.map(|n| {
let reg_name = format!("runtime_1in3::pem_store_info_1_pc{pc_idx}_{n}");
let reg = regmap
.register()
.get(&reg_name)
.expect("Unknow register, check regmap definition");
ffi_hw.read_reg(*reg.offset() as u64)
})
.fold(0_u64, |acc, v| (acc << u32::BITS) + v as u64);
// Update value field
(0..4).for_each(|i| {
let reg_name = format!("runtime_1in3::pem_store_info_0_pc{pc_idx}_{i}");
let reg = regmap
.register()
.get(&reg_name)
.expect("Unknow register, check regmap definition");
self.pem_st_info[pc_idx].data[i] = ffi_hw.read_reg(*reg.offset() as u64);
});
}
#[allow(unused)]
pub fn reset(&mut self, ffi_hw: &mut ffi::HpuHw, regmap: &FlatRegmap) {
self.reset_pem_load_inst_cnt(ffi_hw, regmap);
@@ -754,10 +725,10 @@ impl FromRtl for ErrorHpu {
.expect("Unknow register, check regmap definition");
Self(ffi_hw.read_reg(*reg.offset() as u64) as u16)
// TODO-JJ : now there are 2 error registers
// let reg = regmap
// .register()
// .get("status_3in3::error")
// .expect("Unknow register, check regmap definition");
// Self(ffi_hw.read_reg(*reg.offset() as u64) as u16)
// let reg = regmap
// .register()
// .get("status_3in3::error")
// .expect("Unknow register, check regmap definition");
// Self(ffi_hw.read_reg(*reg.offset() as u64) as u16)
}
}

5
backends/tfhe-hpu-backend/src/utils/fw.rs
View File

@@ -58,6 +58,10 @@ pub struct Args {
#[clap(long, value_parser, default_value_t = false)]
use_ipip: bool,
/// Use ipip configuration
#[clap(long, value_parser, default_value_t = false)]
use_bpip_opportunism: bool,
/// Try to fill the batch fifo
#[clap(long, value_parser, default_value_t = true)]
fill_batch_fifo: bool,
@@ -158,6 +162,7 @@ fn main() -> Result<(), anyhow::Error> {
nu: args.nu,
integer_w: args.integer_w,
use_ipip: args.use_ipip,
use_bpip_opportunism: args.use_bpip_opportunism,
kogge_cfg: args.kogge_cfg.expand(),
op_cfg: RtlCfg::from(OpCfg {
fill_batch_fifo: args.fill_batch_fifo,

6
mockups/tfhe-hpu-mockup/src/modules/regmap.rs
View File

@@ -20,6 +20,7 @@ impl KeyState {
#[derive(Default)]
pub(crate) struct BpipState {
pub(crate) used: bool,
pub(crate) use_opportunism: bool,
pub(crate) timeout: u32,
}
@@ -216,6 +217,7 @@ impl RegisterMap {
// Bpip configuration registers
"bpip::use" => self.bpip.used as u32,
"bpip::use_opportunism" => self.bpip.use_opportunism as u32,
"bpip::timeout" => self.bpip.timeout,
// Add offset configuration registers
@@ -347,6 +349,10 @@ impl RegisterMap {
self.bpip.used = value == 0x1;
RegisterEvent::None
}
"bpip::use_opportunism" => {
self.bpip.use_opportunism = value == 0x1;
RegisterEvent::None
}
"bpip::timeout" => {
self.bpip.timeout = value;
RegisterEvent::None