fix(hpu): reduce polling period of backend on iop ack file from 10 to 2us

This commit is contained in:
pgardratzama
2025-09-25 16:54:36 +02:00
committed by Pierre Gardrat
parent db16276715
commit da223b36b6
2 changed files with 3 additions and 2 deletions

View File

@@ -4,7 +4,7 @@
"${HPU_BACKEND_DIR}/config_store/${HPU_CONFIG}/hpu_regif_core_cfg_3in3.toml",
"${HPU_BACKEND_DIR}/config_store/${HPU_CONFIG}/hpu_regif_core_prc_1in3.toml",
"${HPU_BACKEND_DIR}/config_store/${HPU_CONFIG}/hpu_regif_core_prc_3in3.toml"]
polling_us=10
polling_us=2
[fpga.ffi.V80]
id="${V80_PCIE_DEV}"
board_sn="${V80_SERIAL_NUMBER}"

View File

@@ -89,7 +89,8 @@ impl HpuHw {
} else {
Err(format!(
"UUID mismatch loaded {:?} expected {:?}",
current_uuid, pdi.metadata.bitstream.uuid.to_lowercase()
current_uuid,
pdi.metadata.bitstream.uuid.to_lowercase()
)
.into())
}