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This backend abstract communication with Hpu Fpga hardware.
It define it's proper entities to prevent circular dependencies with
tfhe-rs.
Object lifetime is handle through Arc<Mutex<T>> wrapper, and enforce
that all objects currently alive in Hpu Hw are also kept valid on the
host side.
It contains the second version of HPU instruction set (HIS_V2.0):
* DOp have following properties:
+ Template as first class citizen
+ Support of Immediate template
+ Direct parser and conversion between Asm/Hex
+ Replace deku (and it's associated endianess limitation) by
+ bitfield_struct and manual parsing
* IOp have following properties:
+ Support various number of Destination
+ Support various number of Sources
+ Support various number of Immediat values
+ Support of multiple bitwidth (Not implemented yet in the Fpga
firmware)
Details could be view in `backends/tfhe-hpu-backend/Readme.md`
12 lines
354 B
Markdown
12 lines
354 B
Markdown
# Benchmarks over HPU
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This document details the HPU performance benchmarks of homomorphic operations using **TFHE-rs**.
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By their nature, homomorphic operations run slower than their cleartext equivalents.
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{% hint style="info" %}
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All HPU benchmarks were launched on AMD Alveo v80 FPGAs.
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{% endhint %}
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* [Integer operations](hpu_integer_operations.md)
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