mirror of
https://github.com/tinygrad/tinygrad.git
synced 2026-01-09 15:08:02 -05:00
Update autogen ci runner to ubuntu 24.04 (#10736)
For `kfd.AMDKFD_IOC_EXPORT_DMABUF`
This commit is contained in:
uuuvn
6
.github/actions/setup-tinygrad/action.yml
vendored
6
.github/actions/setup-tinygrad/action.yml
vendored
@@ -118,8 +118,8 @@ runs:
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shell: bash
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run: |
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wget https://repo.radeon.com/rocm/rocm.gpg.key -O - | gpg --dearmor | sudo tee /etc/apt/keyrings/rocm.gpg > /dev/null
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sudo tee /etc/apt/sources.list.d/rocm.list <<'EOF'
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deb [arch=amd64 signed-by=/etc/apt/keyrings/rocm.gpg] https://repo.radeon.com/rocm/apt/6.1.2 jammy main
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sudo tee /etc/apt/sources.list.d/rocm.list <<EOF
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deb [arch=amd64 signed-by=/etc/apt/keyrings/rocm.gpg] https://repo.radeon.com/rocm/apt/6.2 $(lsb_release -cs) main
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EOF
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echo -e 'Package: *\nPin: release o=repo.radeon.com\nPin-Priority: 600' | sudo tee /etc/apt/preferences.d/rocm-pin-600
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@@ -157,7 +157,7 @@ runs:
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fi
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# **** WebGPU (dependencies for software-based vulkan) ****
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if [[ "${{ inputs.webgpu }}" == "true" ]]; then
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pkgs+=" libegl1-mesa libgl1-mesa-dri libxcb-xfixes0-dev mesa-vulkan-drivers"
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pkgs+=" libgl1 libglx-mesa0 libgl1-mesa-dri libxcb-xfixes0-dev mesa-vulkan-drivers"
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fi
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# **** LLVM ****
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if [[ "${{ inputs.llvm }}" == "true" ]]; then
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4
.github/workflows/test.yml
vendored
4
.github/workflows/test.yml
vendored
@@ -83,7 +83,7 @@ jobs:
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autogen:
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name: Autogen
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runs-on: ubuntu-22.04
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runs-on: ubuntu-24.04
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timeout-minutes: 15
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steps:
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- name: Checkout Code
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@@ -96,6 +96,8 @@ jobs:
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cuda: 'true'
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webgpu: 'true'
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llvm: 'true'
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- name: Install autogen support packages
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run: sudo apt-get install -y --no-install-recommends llvm-14-dev libclang-14-dev
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- name: Verify OpenCL autogen
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run: |
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cp tinygrad/runtime/autogen/opencl.py /tmp/opencl.py.bak
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@@ -83,11 +83,12 @@ generate_kfd() {
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sed -i "/import functools/a from tinygrad.runtime.support.hcq import FileIOInterface" $BASE/kfd.py
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sed -i "s/def _do_ioctl(__idir, __base, __nr, __user_struct, __fd, \*\*kwargs):/def _do_ioctl(__idir, __base, __nr, __user_struct, __fd:FileIOInterface, \*\*kwargs):/g" $BASE/kfd.py
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sed -i "s/fcntl.ioctl(__fd, (__idir<<30)/__fd.ioctl((__idir<<30)/g" $BASE/kfd.py
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sed -i "s/!!/not not /g" $BASE/kfd.py
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python3 -c "import tinygrad.runtime.autogen.kfd"
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}
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generate_cuda() {
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clang2py /usr/include/cuda.h -o $BASE/cuda.py -l /usr/lib/x86_64-linux-gnu/libcuda.so
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clang2py /usr/include/cuda.h --clang-args="-D__CUDA_API_VERSION_INTERNAL" -o $BASE/cuda.py -l /usr/lib/x86_64-linux-gnu/libcuda.so
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sed -i "s\import ctypes\import ctypes, ctypes.util\g" $BASE/cuda.py
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sed -i "s\ctypes.CDLL('/usr/lib/x86_64-linux-gnu/libcuda.so')\ctypes.CDLL(ctypes.util.find_library('cuda'))\g" $BASE/cuda.py
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fixup $BASE/cuda.py
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@@ -226,7 +226,8 @@ amd_comgr_data_kind_s__enumvalues = {
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17: 'AMD_COMGR_DATA_KIND_AR',
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18: 'AMD_COMGR_DATA_KIND_BC_BUNDLE',
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19: 'AMD_COMGR_DATA_KIND_AR_BUNDLE',
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19: 'AMD_COMGR_DATA_KIND_LAST',
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20: 'AMD_COMGR_DATA_KIND_OBJ_BUNDLE',
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20: 'AMD_COMGR_DATA_KIND_LAST',
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}
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AMD_COMGR_DATA_KIND_UNDEF = 0
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AMD_COMGR_DATA_KIND_SOURCE = 1
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@@ -242,7 +243,8 @@ AMD_COMGR_DATA_KIND_FATBIN = 16
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AMD_COMGR_DATA_KIND_AR = 17
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AMD_COMGR_DATA_KIND_BC_BUNDLE = 18
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AMD_COMGR_DATA_KIND_AR_BUNDLE = 19
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AMD_COMGR_DATA_KIND_LAST = 19
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AMD_COMGR_DATA_KIND_OBJ_BUNDLE = 20
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AMD_COMGR_DATA_KIND_LAST = 20
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amd_comgr_data_kind_s = ctypes.c_uint32 # enum
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amd_comgr_data_kind_t = amd_comgr_data_kind_s
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amd_comgr_data_kind_t__enumvalues = amd_comgr_data_kind_s__enumvalues
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@@ -515,6 +517,24 @@ try:
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amd_comgr_action_info_get_option_list_item.argtypes = [amd_comgr_action_info_t, size_t, ctypes.POINTER(ctypes.c_uint64), ctypes.POINTER(ctypes.c_char)]
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except AttributeError:
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pass
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try:
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amd_comgr_action_info_set_bundle_entry_ids = _libraries['libamd_comgr.so'].amd_comgr_action_info_set_bundle_entry_ids
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amd_comgr_action_info_set_bundle_entry_ids.restype = amd_comgr_status_t
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amd_comgr_action_info_set_bundle_entry_ids.argtypes = [amd_comgr_action_info_t, ctypes.POINTER(ctypes.c_char) * 0, size_t]
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except AttributeError:
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pass
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try:
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amd_comgr_action_info_get_bundle_entry_id_count = _libraries['libamd_comgr.so'].amd_comgr_action_info_get_bundle_entry_id_count
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amd_comgr_action_info_get_bundle_entry_id_count.restype = amd_comgr_status_t
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amd_comgr_action_info_get_bundle_entry_id_count.argtypes = [amd_comgr_action_info_t, ctypes.POINTER(ctypes.c_uint64)]
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except AttributeError:
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pass
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try:
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amd_comgr_action_info_get_bundle_entry_id = _libraries['libamd_comgr.so'].amd_comgr_action_info_get_bundle_entry_id
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amd_comgr_action_info_get_bundle_entry_id.restype = amd_comgr_status_t
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amd_comgr_action_info_get_bundle_entry_id.argtypes = [amd_comgr_action_info_t, size_t, ctypes.POINTER(ctypes.c_uint64), ctypes.POINTER(ctypes.c_char)]
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except AttributeError:
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pass
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try:
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amd_comgr_action_info_set_working_directory_path = _libraries['libamd_comgr.so'].amd_comgr_action_info_set_working_directory_path
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amd_comgr_action_info_set_working_directory_path.restype = amd_comgr_status_t
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@@ -560,7 +580,8 @@ amd_comgr_action_kind_s__enumvalues = {
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15: 'AMD_COMGR_ACTION_COMPILE_SOURCE_WITH_DEVICE_LIBS_TO_BC',
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16: 'AMD_COMGR_ACTION_COMPILE_SOURCE_TO_RELOCATABLE',
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17: 'AMD_COMGR_ACTION_COMPILE_SOURCE_TO_EXECUTABLE',
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17: 'AMD_COMGR_ACTION_LAST',
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18: 'AMD_COMGR_ACTION_UNBUNDLE',
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18: 'AMD_COMGR_ACTION_LAST',
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}
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AMD_COMGR_ACTION_SOURCE_TO_PREPROCESSOR = 0
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AMD_COMGR_ACTION_ADD_PRECOMPILED_HEADERS = 1
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@@ -580,7 +601,8 @@ AMD_COMGR_ACTION_COMPILE_SOURCE_TO_FATBIN = 14
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AMD_COMGR_ACTION_COMPILE_SOURCE_WITH_DEVICE_LIBS_TO_BC = 15
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AMD_COMGR_ACTION_COMPILE_SOURCE_TO_RELOCATABLE = 16
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AMD_COMGR_ACTION_COMPILE_SOURCE_TO_EXECUTABLE = 17
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AMD_COMGR_ACTION_LAST = 17
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AMD_COMGR_ACTION_UNBUNDLE = 18
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AMD_COMGR_ACTION_LAST = 18
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amd_comgr_action_kind_s = ctypes.c_uint32 # enum
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amd_comgr_action_kind_t = amd_comgr_action_kind_s
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amd_comgr_action_kind_t__enumvalues = amd_comgr_action_kind_s__enumvalues
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@@ -801,12 +823,13 @@ __all__ = \
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'AMD_COMGR_ACTION_LINK_RELOCATABLE_TO_RELOCATABLE',
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'AMD_COMGR_ACTION_OPTIMIZE_BC_TO_BC',
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'AMD_COMGR_ACTION_SOURCE_TO_PREPROCESSOR',
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'AMD_COMGR_DATA_KIND_AR', 'AMD_COMGR_DATA_KIND_AR_BUNDLE',
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'AMD_COMGR_DATA_KIND_BC', 'AMD_COMGR_DATA_KIND_BC_BUNDLE',
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'AMD_COMGR_DATA_KIND_BYTES', 'AMD_COMGR_DATA_KIND_DIAGNOSTIC',
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'AMD_COMGR_ACTION_UNBUNDLE', 'AMD_COMGR_DATA_KIND_AR',
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'AMD_COMGR_DATA_KIND_AR_BUNDLE', 'AMD_COMGR_DATA_KIND_BC',
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'AMD_COMGR_DATA_KIND_BC_BUNDLE', 'AMD_COMGR_DATA_KIND_BYTES',
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'AMD_COMGR_DATA_KIND_DIAGNOSTIC',
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'AMD_COMGR_DATA_KIND_EXECUTABLE', 'AMD_COMGR_DATA_KIND_FATBIN',
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'AMD_COMGR_DATA_KIND_INCLUDE', 'AMD_COMGR_DATA_KIND_LAST',
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'AMD_COMGR_DATA_KIND_LOG',
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'AMD_COMGR_DATA_KIND_LOG', 'AMD_COMGR_DATA_KIND_OBJ_BUNDLE',
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'AMD_COMGR_DATA_KIND_PRECOMPILED_HEADER',
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'AMD_COMGR_DATA_KIND_RELOCATABLE', 'AMD_COMGR_DATA_KIND_SOURCE',
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'AMD_COMGR_DATA_KIND_UNDEF', 'AMD_COMGR_LANGUAGE_HC',
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@@ -828,6 +851,8 @@ __all__ = \
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'AMD_COMGR_SYMBOL_TYPE_OBJECT', 'AMD_COMGR_SYMBOL_TYPE_SECTION',
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'AMD_COMGR_SYMBOL_TYPE_UNKNOWN', 'amd_comgr_action_data_count',
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'amd_comgr_action_data_get_data',
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'amd_comgr_action_info_get_bundle_entry_id',
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'amd_comgr_action_info_get_bundle_entry_id_count',
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'amd_comgr_action_info_get_isa_name',
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'amd_comgr_action_info_get_language',
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'amd_comgr_action_info_get_logging',
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@@ -835,6 +860,7 @@ __all__ = \
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'amd_comgr_action_info_get_option_list_item',
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'amd_comgr_action_info_get_options',
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'amd_comgr_action_info_get_working_directory_path',
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'amd_comgr_action_info_set_bundle_entry_ids',
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'amd_comgr_action_info_set_isa_name',
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'amd_comgr_action_info_set_language',
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'amd_comgr_action_info_set_logging',
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File diff suppressed because it is too large
Load Diff
@@ -372,7 +372,8 @@ c__EA_hsa_extension_t__enumvalues = {
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512: 'HSA_EXTENSION_AMD_PROFILER',
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513: 'HSA_EXTENSION_AMD_LOADER',
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514: 'HSA_EXTENSION_AMD_AQLPROFILE',
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514: 'HSA_AMD_LAST_EXTENSION',
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515: 'HSA_EXTENSION_AMD_PC_SAMPLING',
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515: 'HSA_AMD_LAST_EXTENSION',
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}
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HSA_EXTENSION_FINALIZER = 0
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HSA_EXTENSION_IMAGES = 1
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@@ -383,7 +384,8 @@ HSA_AMD_FIRST_EXTENSION = 512
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HSA_EXTENSION_AMD_PROFILER = 512
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HSA_EXTENSION_AMD_LOADER = 513
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HSA_EXTENSION_AMD_AQLPROFILE = 514
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HSA_AMD_LAST_EXTENSION = 514
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HSA_EXTENSION_AMD_PC_SAMPLING = 515
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HSA_AMD_LAST_EXTENSION = 515
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c__EA_hsa_extension_t = ctypes.c_uint32 # enum
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hsa_extension_t = c__EA_hsa_extension_t
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hsa_extension_t__enumvalues = c__EA_hsa_extension_t__enumvalues
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@@ -2088,6 +2090,7 @@ c__EA_hsa_code_symbol_info_t__enumvalues = {
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15: 'HSA_CODE_SYMBOL_INFO_KERNEL_DYNAMIC_CALLSTACK',
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18: 'HSA_CODE_SYMBOL_INFO_KERNEL_CALL_CONVENTION',
|
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16: 'HSA_CODE_SYMBOL_INFO_INDIRECT_FUNCTION_CALL_CONVENTION',
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19: 'HSA_CODE_SYMBOL_INFO_KERNEL_WAVEFRONT_SIZE',
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}
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HSA_CODE_SYMBOL_INFO_TYPE = 0
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HSA_CODE_SYMBOL_INFO_NAME_LENGTH = 1
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@@ -2108,6 +2111,7 @@ HSA_CODE_SYMBOL_INFO_KERNEL_PRIVATE_SEGMENT_SIZE = 14
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HSA_CODE_SYMBOL_INFO_KERNEL_DYNAMIC_CALLSTACK = 15
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HSA_CODE_SYMBOL_INFO_KERNEL_CALL_CONVENTION = 18
|
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HSA_CODE_SYMBOL_INFO_INDIRECT_FUNCTION_CALL_CONVENTION = 16
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HSA_CODE_SYMBOL_INFO_KERNEL_WAVEFRONT_SIZE = 19
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c__EA_hsa_code_symbol_info_t = ctypes.c_uint32 # enum
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hsa_code_symbol_info_t = c__EA_hsa_code_symbol_info_t
|
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hsa_code_symbol_info_t__enumvalues = c__EA_hsa_code_symbol_info_t__enumvalues
|
||||
@@ -2594,6 +2598,7 @@ c__Ea_HSA_STATUS_ERROR_INVALID_MEMORY_POOL__enumvalues = {
|
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43: 'HSA_STATUS_ERROR_MEMORY_FAULT',
|
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44: 'HSA_STATUS_CU_MASK_REDUCED',
|
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45: 'HSA_STATUS_ERROR_OUT_OF_REGISTERS',
|
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46: 'HSA_STATUS_ERROR_RESOURCE_BUSY',
|
||||
}
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||||
HSA_STATUS_ERROR_INVALID_MEMORY_POOL = 40
|
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HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION = 41
|
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@@ -2601,6 +2606,7 @@ HSA_STATUS_ERROR_ILLEGAL_INSTRUCTION = 42
|
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HSA_STATUS_ERROR_MEMORY_FAULT = 43
|
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HSA_STATUS_CU_MASK_REDUCED = 44
|
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HSA_STATUS_ERROR_OUT_OF_REGISTERS = 45
|
||||
HSA_STATUS_ERROR_RESOURCE_BUSY = 46
|
||||
c__Ea_HSA_STATUS_ERROR_INVALID_MEMORY_POOL = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'c__EA_hsa_amd_iommu_version_t'
|
||||
@@ -2976,9 +2982,11 @@ hsa_amd_memory_pool_info_t__enumvalues = c__EA_hsa_amd_memory_pool_info_t__enumv
|
||||
hsa_amd_memory_pool_flag_s__enumvalues = {
|
||||
0: 'HSA_AMD_MEMORY_POOL_STANDARD_FLAG',
|
||||
1: 'HSA_AMD_MEMORY_POOL_PCIE_FLAG',
|
||||
2: 'HSA_AMD_MEMORY_POOL_CONTIGUOUS_FLAG',
|
||||
}
|
||||
HSA_AMD_MEMORY_POOL_STANDARD_FLAG = 0
|
||||
HSA_AMD_MEMORY_POOL_PCIE_FLAG = 1
|
||||
HSA_AMD_MEMORY_POOL_CONTIGUOUS_FLAG = 2
|
||||
hsa_amd_memory_pool_flag_s = ctypes.c_uint32 # enum
|
||||
hsa_amd_memory_pool_flag_t = hsa_amd_memory_pool_flag_s
|
||||
hsa_amd_memory_pool_flag_t__enumvalues = hsa_amd_memory_pool_flag_s__enumvalues
|
||||
@@ -3524,6 +3532,12 @@ try:
|
||||
hsa_amd_vmem_address_reserve.argtypes = [ctypes.POINTER(ctypes.POINTER(None)), size_t, uint64_t, uint64_t]
|
||||
except AttributeError:
|
||||
pass
|
||||
try:
|
||||
hsa_amd_vmem_address_reserve_align = _libraries['libhsa-runtime64.so'].hsa_amd_vmem_address_reserve_align
|
||||
hsa_amd_vmem_address_reserve_align.restype = hsa_status_t
|
||||
hsa_amd_vmem_address_reserve_align.argtypes = [ctypes.POINTER(ctypes.POINTER(None)), size_t, uint64_t, uint64_t, uint64_t]
|
||||
except AttributeError:
|
||||
pass
|
||||
try:
|
||||
hsa_amd_vmem_address_free = _libraries['libhsa-runtime64.so'].hsa_amd_vmem_address_free
|
||||
hsa_amd_vmem_address_free.restype = hsa_status_t
|
||||
@@ -3627,6 +3641,23 @@ try:
|
||||
hsa_amd_agent_set_async_scratch_limit.argtypes = [hsa_agent_t, size_t]
|
||||
except AttributeError:
|
||||
pass
|
||||
|
||||
# values for enumeration 'c__EA_hsa_queue_info_attribute_t'
|
||||
c__EA_hsa_queue_info_attribute_t__enumvalues = {
|
||||
0: 'HSA_AMD_QUEUE_INFO_AGENT',
|
||||
1: 'HSA_AMD_QUEUE_INFO_DOORBELL_ID',
|
||||
}
|
||||
HSA_AMD_QUEUE_INFO_AGENT = 0
|
||||
HSA_AMD_QUEUE_INFO_DOORBELL_ID = 1
|
||||
c__EA_hsa_queue_info_attribute_t = ctypes.c_uint32 # enum
|
||||
hsa_queue_info_attribute_t = c__EA_hsa_queue_info_attribute_t
|
||||
hsa_queue_info_attribute_t__enumvalues = c__EA_hsa_queue_info_attribute_t__enumvalues
|
||||
try:
|
||||
hsa_amd_queue_get_info = _libraries['libhsa-runtime64.so'].hsa_amd_queue_get_info
|
||||
hsa_amd_queue_get_info.restype = hsa_status_t
|
||||
hsa_amd_queue_get_info.argtypes = [ctypes.POINTER(struct_hsa_queue_s), hsa_queue_info_attribute_t, ctypes.POINTER(None)]
|
||||
except AttributeError:
|
||||
pass
|
||||
amd_queue_properties32_t = ctypes.c_uint32
|
||||
|
||||
# values for enumeration 'amd_queue_properties_t'
|
||||
@@ -5077,6 +5108,7 @@ __all__ = \
|
||||
'HSA_AMD_MEMORY_POOL_ACCESS_ALLOWED_BY_DEFAULT',
|
||||
'HSA_AMD_MEMORY_POOL_ACCESS_DISALLOWED_BY_DEFAULT',
|
||||
'HSA_AMD_MEMORY_POOL_ACCESS_NEVER_ALLOWED',
|
||||
'HSA_AMD_MEMORY_POOL_CONTIGUOUS_FLAG',
|
||||
'HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_COARSE_GRAINED',
|
||||
'HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_EXTENDED_SCOPE_FINE_GRAINED',
|
||||
'HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_FINE_GRAINED',
|
||||
@@ -5096,10 +5128,10 @@ __all__ = \
|
||||
'HSA_AMD_MEMORY_POOL_PCIE_FLAG',
|
||||
'HSA_AMD_MEMORY_POOL_STANDARD_FLAG',
|
||||
'HSA_AMD_MEMORY_PROPERTY_AGENT_IS_APU',
|
||||
'HSA_AMD_PACKET_TYPE_BARRIER_VALUE',
|
||||
'HSA_AMD_QUEUE_PRIORITY_HIGH', 'HSA_AMD_QUEUE_PRIORITY_LOW',
|
||||
'HSA_AMD_QUEUE_PRIORITY_NORMAL', 'HSA_AMD_REGION_INFO_BASE',
|
||||
'HSA_AMD_REGION_INFO_BUS_WIDTH',
|
||||
'HSA_AMD_PACKET_TYPE_BARRIER_VALUE', 'HSA_AMD_QUEUE_INFO_AGENT',
|
||||
'HSA_AMD_QUEUE_INFO_DOORBELL_ID', 'HSA_AMD_QUEUE_PRIORITY_HIGH',
|
||||
'HSA_AMD_QUEUE_PRIORITY_LOW', 'HSA_AMD_QUEUE_PRIORITY_NORMAL',
|
||||
'HSA_AMD_REGION_INFO_BASE', 'HSA_AMD_REGION_INFO_BUS_WIDTH',
|
||||
'HSA_AMD_REGION_INFO_HOST_ACCESSIBLE',
|
||||
'HSA_AMD_REGION_INFO_MAX_CLOCK_FREQUENCY',
|
||||
'HSA_AMD_SDMA_ENGINE_0', 'HSA_AMD_SDMA_ENGINE_1',
|
||||
@@ -5149,6 +5181,7 @@ __all__ = \
|
||||
'HSA_CODE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_ALIGNMENT',
|
||||
'HSA_CODE_SYMBOL_INFO_KERNEL_KERNARG_SEGMENT_SIZE',
|
||||
'HSA_CODE_SYMBOL_INFO_KERNEL_PRIVATE_SEGMENT_SIZE',
|
||||
'HSA_CODE_SYMBOL_INFO_KERNEL_WAVEFRONT_SIZE',
|
||||
'HSA_CODE_SYMBOL_INFO_LINKAGE',
|
||||
'HSA_CODE_SYMBOL_INFO_MODULE_NAME',
|
||||
'HSA_CODE_SYMBOL_INFO_MODULE_NAME_LENGTH',
|
||||
@@ -5192,8 +5225,9 @@ __all__ = \
|
||||
'HSA_EXECUTABLE_SYMBOL_INFO_VARIABLE_SEGMENT',
|
||||
'HSA_EXECUTABLE_SYMBOL_INFO_VARIABLE_SIZE',
|
||||
'HSA_EXTENSION_AMD_AQLPROFILE', 'HSA_EXTENSION_AMD_LOADER',
|
||||
'HSA_EXTENSION_AMD_PROFILER', 'HSA_EXTENSION_FINALIZER',
|
||||
'HSA_EXTENSION_IMAGES', 'HSA_EXTENSION_PERFORMANCE_COUNTERS',
|
||||
'HSA_EXTENSION_AMD_PC_SAMPLING', 'HSA_EXTENSION_AMD_PROFILER',
|
||||
'HSA_EXTENSION_FINALIZER', 'HSA_EXTENSION_IMAGES',
|
||||
'HSA_EXTENSION_PERFORMANCE_COUNTERS',
|
||||
'HSA_EXTENSION_PROFILING_EVENTS', 'HSA_EXTENSION_STD_LAST',
|
||||
'HSA_EXT_AGENT_INFO_IMAGE_1DA_MAX_ELEMENTS',
|
||||
'HSA_EXT_AGENT_INFO_IMAGE_1DB_MAX_ELEMENTS',
|
||||
@@ -5366,6 +5400,7 @@ __all__ = \
|
||||
'HSA_STATUS_ERROR_OUT_OF_REGISTERS',
|
||||
'HSA_STATUS_ERROR_OUT_OF_RESOURCES',
|
||||
'HSA_STATUS_ERROR_REFCOUNT_OVERFLOW',
|
||||
'HSA_STATUS_ERROR_RESOURCE_BUSY',
|
||||
'HSA_STATUS_ERROR_RESOURCE_FREE',
|
||||
'HSA_STATUS_ERROR_VARIABLE_ALREADY_DEFINED',
|
||||
'HSA_STATUS_ERROR_VARIABLE_UNDEFINED', 'HSA_STATUS_INFO_BREAK',
|
||||
@@ -5496,12 +5531,13 @@ __all__ = \
|
||||
'c__EA_hsa_machine_model_t', 'c__EA_hsa_packet_header_t',
|
||||
'c__EA_hsa_packet_header_width_t', 'c__EA_hsa_packet_type_t',
|
||||
'c__EA_hsa_profile_t', 'c__EA_hsa_queue_feature_t',
|
||||
'c__EA_hsa_queue_type_t', 'c__EA_hsa_region_global_flag_t',
|
||||
'c__EA_hsa_region_info_t', 'c__EA_hsa_region_segment_t',
|
||||
'c__EA_hsa_round_method_t', 'c__EA_hsa_signal_condition_t',
|
||||
'c__EA_hsa_status_t', 'c__EA_hsa_symbol_kind_t',
|
||||
'c__EA_hsa_symbol_linkage_t', 'c__EA_hsa_system_info_t',
|
||||
'c__EA_hsa_variable_allocation_t', 'c__EA_hsa_variable_segment_t',
|
||||
'c__EA_hsa_queue_info_attribute_t', 'c__EA_hsa_queue_type_t',
|
||||
'c__EA_hsa_region_global_flag_t', 'c__EA_hsa_region_info_t',
|
||||
'c__EA_hsa_region_segment_t', 'c__EA_hsa_round_method_t',
|
||||
'c__EA_hsa_signal_condition_t', 'c__EA_hsa_status_t',
|
||||
'c__EA_hsa_symbol_kind_t', 'c__EA_hsa_symbol_linkage_t',
|
||||
'c__EA_hsa_system_info_t', 'c__EA_hsa_variable_allocation_t',
|
||||
'c__EA_hsa_variable_segment_t',
|
||||
'c__EA_hsa_ven_amd_aqlprofile_att_marker_channel_t',
|
||||
'c__EA_hsa_ven_amd_aqlprofile_block_name_t',
|
||||
'c__EA_hsa_ven_amd_aqlprofile_event_type_t',
|
||||
@@ -5595,7 +5631,8 @@ __all__ = \
|
||||
'hsa_amd_profiling_get_dispatch_time',
|
||||
'hsa_amd_profiling_set_profiler_enabled',
|
||||
'hsa_amd_queue_cu_get_mask', 'hsa_amd_queue_cu_set_mask',
|
||||
'hsa_amd_queue_priority_s', 'hsa_amd_queue_priority_t',
|
||||
'hsa_amd_queue_get_info', 'hsa_amd_queue_priority_s',
|
||||
'hsa_amd_queue_priority_t',
|
||||
'hsa_amd_queue_priority_t__enumvalues',
|
||||
'hsa_amd_queue_set_priority', 'hsa_amd_region_info_s',
|
||||
'hsa_amd_region_info_t', 'hsa_amd_region_info_t__enumvalues',
|
||||
@@ -5616,7 +5653,9 @@ __all__ = \
|
||||
'hsa_amd_svm_model_t__enumvalues', 'hsa_amd_svm_prefetch_async',
|
||||
'hsa_amd_system_event_callback_t',
|
||||
'hsa_amd_vendor_packet_header_t', 'hsa_amd_vmem_address_free',
|
||||
'hsa_amd_vmem_address_reserve', 'hsa_amd_vmem_alloc_handle_t',
|
||||
'hsa_amd_vmem_address_reserve',
|
||||
'hsa_amd_vmem_address_reserve_align',
|
||||
'hsa_amd_vmem_alloc_handle_t',
|
||||
'hsa_amd_vmem_export_shareable_handle', 'hsa_amd_vmem_get_access',
|
||||
'hsa_amd_vmem_get_alloc_properties_from_handle',
|
||||
'hsa_amd_vmem_handle_create', 'hsa_amd_vmem_handle_release',
|
||||
@@ -5741,6 +5780,8 @@ __all__ = \
|
||||
'hsa_queue_cas_write_index_screlease', 'hsa_queue_create',
|
||||
'hsa_queue_destroy', 'hsa_queue_feature_t',
|
||||
'hsa_queue_feature_t__enumvalues', 'hsa_queue_inactivate',
|
||||
'hsa_queue_info_attribute_t',
|
||||
'hsa_queue_info_attribute_t__enumvalues',
|
||||
'hsa_queue_load_read_index_acquire',
|
||||
'hsa_queue_load_read_index_relaxed',
|
||||
'hsa_queue_load_read_index_scacquire',
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -135,7 +135,7 @@ class Union(ctypes.Union, AsDictMixin):
|
||||
|
||||
KFD_IOCTL_H_INCLUDED = True # macro
|
||||
KFD_IOCTL_MAJOR_VERSION = 1 # macro
|
||||
KFD_IOCTL_MINOR_VERSION = 6 # macro
|
||||
KFD_IOCTL_MINOR_VERSION = 14 # macro
|
||||
KFD_IOC_QUEUE_TYPE_COMPUTE = 0x0 # macro
|
||||
KFD_IOC_QUEUE_TYPE_SDMA = 0x1 # macro
|
||||
KFD_IOC_QUEUE_TYPE_COMPUTE_AQL = 0x2 # macro
|
||||
@@ -148,6 +148,7 @@ NUM_OF_SUPPORTED_GPUS = 7 # macro
|
||||
MAX_ALLOWED_NUM_POINTS = 100 # macro
|
||||
MAX_ALLOWED_AW_BUFF_SIZE = 4096 # macro
|
||||
MAX_ALLOWED_WAC_BUFF_SIZE = 128 # macro
|
||||
KFD_INVALID_FD = 0xffffffff # macro
|
||||
KFD_IOC_EVENT_SIGNAL = 0 # macro
|
||||
KFD_IOC_EVENT_NODECHANGE = 1 # macro
|
||||
KFD_IOC_EVENT_DEVICESTATECHANGE = 2 # macro
|
||||
@@ -181,14 +182,26 @@ KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE = (1<<28) # macro
|
||||
KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM = (1<<27) # macro
|
||||
KFD_IOC_ALLOC_MEM_FLAGS_COHERENT = (1<<26) # macro
|
||||
KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED = (1<<25) # macro
|
||||
KFD_IOC_ALLOC_MEM_FLAGS_EXT_COHERENT = (1<<24) # macro
|
||||
def KFD_SMI_EVENT_MASK_FROM_INDEX(i): # macro
|
||||
return (1<<((i)-1))
|
||||
KFD_SMI_EVENT_MSG_SIZE = 96 # macro
|
||||
KFD_IOCTL_SVM_FLAG_HOST_ACCESS = 0x00000001 # macro
|
||||
KFD_IOCTL_SVM_FLAG_COHERENT = 0x00000002 # macro
|
||||
KFD_IOCTL_SVM_FLAG_HIVE_LOCAL = 0x00000004 # macro
|
||||
KFD_IOCTL_SVM_FLAG_GPU_RO = 0x00000008 # macro
|
||||
KFD_IOCTL_SVM_FLAG_GPU_EXEC = 0x00000010 # macro
|
||||
KFD_IOCTL_SVM_FLAG_GPU_READ_MOSTLY = 0x00000020 # macro
|
||||
KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED = 0x00000040 # macro
|
||||
KFD_IOCTL_SVM_FLAG_EXT_COHERENT = 0x00000080 # macro
|
||||
def KFD_EC_MASK(ecode): # macro
|
||||
return (1<<(ecode-1))
|
||||
KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK = 1 # macro
|
||||
KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK = 2 # macro
|
||||
KFD_DBG_QUEUE_ERROR_BIT = 30 # macro
|
||||
KFD_DBG_QUEUE_INVALID_BIT = 31 # macro
|
||||
KFD_DBG_QUEUE_ERROR_MASK = (1<<30) # macro
|
||||
KFD_DBG_QUEUE_INVALID_MASK = (1<<31) # macro
|
||||
AMDKFD_IOCTL_BASE = 'K' # macro
|
||||
def AMDKFD_IO(nr): # macro
|
||||
return _IO('K',nr)
|
||||
@@ -199,7 +212,7 @@ def AMDKFD_IOW(nr, type): # macro
|
||||
def AMDKFD_IOWR(nr, type): # macro
|
||||
return _IOWR('K',nr,type)
|
||||
AMDKFD_COMMAND_START = 0x01 # macro
|
||||
AMDKFD_COMMAND_END = 0x22 # macro
|
||||
AMDKFD_COMMAND_END = 0x27 # macro
|
||||
class struct_kfd_ioctl_get_version_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -280,6 +293,47 @@ struct_kfd_ioctl_get_queue_wave_state_args._fields_ = [
|
||||
]
|
||||
|
||||
AMDKFD_IOC_GET_QUEUE_WAVE_STATE = AMDKFD_IOWR ( 0x1B , struct_kfd_ioctl_get_queue_wave_state_args ) # macro (from list)
|
||||
class struct_kfd_ioctl_get_available_memory_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_get_available_memory_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_get_available_memory_args._fields_ = [
|
||||
('available', ctypes.c_uint64),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_AVAILABLE_MEMORY = AMDKFD_IOWR ( 0x23 , struct_kfd_ioctl_get_available_memory_args ) # macro (from list)
|
||||
class struct_kfd_dbg_device_info_entry(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_dbg_device_info_entry._pack_ = 1 # source:False
|
||||
struct_kfd_dbg_device_info_entry._fields_ = [
|
||||
('exception_status', ctypes.c_uint64),
|
||||
('lds_base', ctypes.c_uint64),
|
||||
('lds_limit', ctypes.c_uint64),
|
||||
('scratch_base', ctypes.c_uint64),
|
||||
('scratch_limit', ctypes.c_uint64),
|
||||
('gpuvm_base', ctypes.c_uint64),
|
||||
('gpuvm_limit', ctypes.c_uint64),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('location_id', ctypes.c_uint32),
|
||||
('vendor_id', ctypes.c_uint32),
|
||||
('device_id', ctypes.c_uint32),
|
||||
('revision_id', ctypes.c_uint32),
|
||||
('subsystem_vendor_id', ctypes.c_uint32),
|
||||
('subsystem_device_id', ctypes.c_uint32),
|
||||
('fw_version', ctypes.c_uint32),
|
||||
('gfx_target_version', ctypes.c_uint32),
|
||||
('simd_count', ctypes.c_uint32),
|
||||
('max_waves_per_simd', ctypes.c_uint32),
|
||||
('array_count', ctypes.c_uint32),
|
||||
('simd_arrays_per_engine', ctypes.c_uint32),
|
||||
('num_xcc', ctypes.c_uint32),
|
||||
('capability', ctypes.c_uint32),
|
||||
('debug_prop', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_set_memory_policy_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -354,7 +408,7 @@ struct_kfd_ioctl_dbg_register_args._fields_ = [
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_DBG_REGISTER = AMDKFD_IOW ( 0x0D , struct_kfd_ioctl_dbg_register_args ) # macro (from list)
|
||||
AMDKFD_IOC_DBG_REGISTER_DEPRECATED = AMDKFD_IOW ( 0x0D , struct_kfd_ioctl_dbg_register_args ) # macro (from list)
|
||||
class struct_kfd_ioctl_dbg_unregister_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -364,7 +418,7 @@ struct_kfd_ioctl_dbg_unregister_args._fields_ = [
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_DBG_UNREGISTER = AMDKFD_IOW ( 0x0E , struct_kfd_ioctl_dbg_unregister_args ) # macro (from list)
|
||||
AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED = AMDKFD_IOW ( 0x0E , struct_kfd_ioctl_dbg_unregister_args ) # macro (from list)
|
||||
class struct_kfd_ioctl_dbg_address_watch_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -375,7 +429,7 @@ struct_kfd_ioctl_dbg_address_watch_args._fields_ = [
|
||||
('buf_size_in_bytes', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_DBG_ADDRESS_WATCH = AMDKFD_IOW ( 0x0F , struct_kfd_ioctl_dbg_address_watch_args ) # macro (from list)
|
||||
AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED = AMDKFD_IOW ( 0x0F , struct_kfd_ioctl_dbg_address_watch_args ) # macro (from list)
|
||||
class struct_kfd_ioctl_dbg_wave_control_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -386,7 +440,7 @@ struct_kfd_ioctl_dbg_wave_control_args._fields_ = [
|
||||
('buf_size_in_bytes', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_DBG_WAVE_CONTROL = AMDKFD_IOW ( 0x10 , struct_kfd_ioctl_dbg_wave_control_args ) # macro (from list)
|
||||
AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED = AMDKFD_IOW ( 0x10 , struct_kfd_ioctl_dbg_wave_control_args ) # macro (from list)
|
||||
class struct_kfd_ioctl_create_event_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -465,6 +519,14 @@ struct_kfd_hsa_hw_exception_data._fields_ = [
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_hsa_signal_event_data(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_hsa_signal_event_data._pack_ = 1 # source:False
|
||||
struct_kfd_hsa_signal_event_data._fields_ = [
|
||||
('last_event_age', ctypes.c_uint64),
|
||||
]
|
||||
|
||||
class struct_kfd_event_data(Structure):
|
||||
pass
|
||||
|
||||
@@ -475,7 +537,8 @@ union_kfd_event_data_0._pack_ = 1 # source:False
|
||||
union_kfd_event_data_0._fields_ = [
|
||||
('memory_exception_data', struct_kfd_hsa_memory_exception_data),
|
||||
('hw_exception_data', struct_kfd_hsa_hw_exception_data),
|
||||
('PADDING_0', ctypes.c_ubyte * 16),
|
||||
('signal_event_data', struct_kfd_hsa_signal_event_data),
|
||||
('PADDING_0', ctypes.c_ubyte * 24),
|
||||
]
|
||||
|
||||
struct_kfd_event_data._pack_ = 1 # source:False
|
||||
@@ -634,6 +697,17 @@ struct_kfd_ioctl_import_dmabuf_args._fields_ = [
|
||||
]
|
||||
|
||||
AMDKFD_IOC_IMPORT_DMABUF = AMDKFD_IOWR ( 0x1D , struct_kfd_ioctl_import_dmabuf_args ) # macro (from list)
|
||||
class struct_kfd_ioctl_export_dmabuf_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_export_dmabuf_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_export_dmabuf_args._fields_ = [
|
||||
('handle', ctypes.c_uint64),
|
||||
('flags', ctypes.c_uint32),
|
||||
('dmabuf_fd', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_EXPORT_DMABUF = AMDKFD_IOWR ( 0x24 , struct_kfd_ioctl_export_dmabuf_args ) # macro (from list)
|
||||
|
||||
# values for enumeration 'kfd_smi_event'
|
||||
kfd_smi_event__enumvalues = {
|
||||
@@ -642,13 +716,70 @@ kfd_smi_event__enumvalues = {
|
||||
2: 'KFD_SMI_EVENT_THERMAL_THROTTLE',
|
||||
3: 'KFD_SMI_EVENT_GPU_PRE_RESET',
|
||||
4: 'KFD_SMI_EVENT_GPU_POST_RESET',
|
||||
5: 'KFD_SMI_EVENT_MIGRATE_START',
|
||||
6: 'KFD_SMI_EVENT_MIGRATE_END',
|
||||
7: 'KFD_SMI_EVENT_PAGE_FAULT_START',
|
||||
8: 'KFD_SMI_EVENT_PAGE_FAULT_END',
|
||||
9: 'KFD_SMI_EVENT_QUEUE_EVICTION',
|
||||
10: 'KFD_SMI_EVENT_QUEUE_RESTORE',
|
||||
11: 'KFD_SMI_EVENT_UNMAP_FROM_GPU',
|
||||
64: 'KFD_SMI_EVENT_ALL_PROCESS',
|
||||
}
|
||||
KFD_SMI_EVENT_NONE = 0
|
||||
KFD_SMI_EVENT_VMFAULT = 1
|
||||
KFD_SMI_EVENT_THERMAL_THROTTLE = 2
|
||||
KFD_SMI_EVENT_GPU_PRE_RESET = 3
|
||||
KFD_SMI_EVENT_GPU_POST_RESET = 4
|
||||
KFD_SMI_EVENT_MIGRATE_START = 5
|
||||
KFD_SMI_EVENT_MIGRATE_END = 6
|
||||
KFD_SMI_EVENT_PAGE_FAULT_START = 7
|
||||
KFD_SMI_EVENT_PAGE_FAULT_END = 8
|
||||
KFD_SMI_EVENT_QUEUE_EVICTION = 9
|
||||
KFD_SMI_EVENT_QUEUE_RESTORE = 10
|
||||
KFD_SMI_EVENT_UNMAP_FROM_GPU = 11
|
||||
KFD_SMI_EVENT_ALL_PROCESS = 64
|
||||
kfd_smi_event = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'KFD_MIGRATE_TRIGGERS'
|
||||
KFD_MIGRATE_TRIGGERS__enumvalues = {
|
||||
0: 'KFD_MIGRATE_TRIGGER_PREFETCH',
|
||||
1: 'KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU',
|
||||
2: 'KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU',
|
||||
3: 'KFD_MIGRATE_TRIGGER_TTM_EVICTION',
|
||||
}
|
||||
KFD_MIGRATE_TRIGGER_PREFETCH = 0
|
||||
KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU = 1
|
||||
KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU = 2
|
||||
KFD_MIGRATE_TRIGGER_TTM_EVICTION = 3
|
||||
KFD_MIGRATE_TRIGGERS = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'KFD_QUEUE_EVICTION_TRIGGERS'
|
||||
KFD_QUEUE_EVICTION_TRIGGERS__enumvalues = {
|
||||
0: 'KFD_QUEUE_EVICTION_TRIGGER_SVM',
|
||||
1: 'KFD_QUEUE_EVICTION_TRIGGER_USERPTR',
|
||||
2: 'KFD_QUEUE_EVICTION_TRIGGER_TTM',
|
||||
3: 'KFD_QUEUE_EVICTION_TRIGGER_SUSPEND',
|
||||
4: 'KFD_QUEUE_EVICTION_CRIU_CHECKPOINT',
|
||||
5: 'KFD_QUEUE_EVICTION_CRIU_RESTORE',
|
||||
}
|
||||
KFD_QUEUE_EVICTION_TRIGGER_SVM = 0
|
||||
KFD_QUEUE_EVICTION_TRIGGER_USERPTR = 1
|
||||
KFD_QUEUE_EVICTION_TRIGGER_TTM = 2
|
||||
KFD_QUEUE_EVICTION_TRIGGER_SUSPEND = 3
|
||||
KFD_QUEUE_EVICTION_CRIU_CHECKPOINT = 4
|
||||
KFD_QUEUE_EVICTION_CRIU_RESTORE = 5
|
||||
KFD_QUEUE_EVICTION_TRIGGERS = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'KFD_SVM_UNMAP_TRIGGERS'
|
||||
KFD_SVM_UNMAP_TRIGGERS__enumvalues = {
|
||||
0: 'KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY',
|
||||
1: 'KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE',
|
||||
2: 'KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU',
|
||||
}
|
||||
KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY = 0
|
||||
KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE = 1
|
||||
KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU = 2
|
||||
KFD_SVM_UNMAP_TRIGGERS = ctypes.c_uint32 # enum
|
||||
class struct_kfd_ioctl_smi_events_args(Structure):
|
||||
pass
|
||||
|
||||
@@ -660,6 +791,65 @@ struct_kfd_ioctl_smi_events_args._fields_ = [
|
||||
|
||||
AMDKFD_IOC_SMI_EVENTS = AMDKFD_IOWR ( 0x1F , struct_kfd_ioctl_smi_events_args ) # macro (from list)
|
||||
|
||||
# values for enumeration 'kfd_criu_op'
|
||||
kfd_criu_op__enumvalues = {
|
||||
0: 'KFD_CRIU_OP_PROCESS_INFO',
|
||||
1: 'KFD_CRIU_OP_CHECKPOINT',
|
||||
2: 'KFD_CRIU_OP_UNPAUSE',
|
||||
3: 'KFD_CRIU_OP_RESTORE',
|
||||
4: 'KFD_CRIU_OP_RESUME',
|
||||
}
|
||||
KFD_CRIU_OP_PROCESS_INFO = 0
|
||||
KFD_CRIU_OP_CHECKPOINT = 1
|
||||
KFD_CRIU_OP_UNPAUSE = 2
|
||||
KFD_CRIU_OP_RESTORE = 3
|
||||
KFD_CRIU_OP_RESUME = 4
|
||||
kfd_criu_op = ctypes.c_uint32 # enum
|
||||
class struct_kfd_ioctl_criu_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_criu_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_criu_args._fields_ = [
|
||||
('devices', ctypes.c_uint64),
|
||||
('bos', ctypes.c_uint64),
|
||||
('priv_data', ctypes.c_uint64),
|
||||
('priv_data_size', ctypes.c_uint64),
|
||||
('num_devices', ctypes.c_uint32),
|
||||
('num_bos', ctypes.c_uint32),
|
||||
('num_objects', ctypes.c_uint32),
|
||||
('pid', ctypes.c_uint32),
|
||||
('op', ctypes.c_uint32),
|
||||
('PADDING_0', ctypes.c_ubyte * 4),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_CRIU_OP = AMDKFD_IOWR ( 0x22 , struct_kfd_ioctl_criu_args ) # macro (from list)
|
||||
class struct_kfd_criu_device_bucket(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_criu_device_bucket._pack_ = 1 # source:False
|
||||
struct_kfd_criu_device_bucket._fields_ = [
|
||||
('user_gpu_id', ctypes.c_uint32),
|
||||
('actual_gpu_id', ctypes.c_uint32),
|
||||
('drm_fd', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_criu_bo_bucket(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_criu_bo_bucket._pack_ = 1 # source:False
|
||||
struct_kfd_criu_bo_bucket._fields_ = [
|
||||
('addr', ctypes.c_uint64),
|
||||
('size', ctypes.c_uint64),
|
||||
('offset', ctypes.c_uint64),
|
||||
('restored_offset', ctypes.c_uint64),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('alloc_flags', ctypes.c_uint32),
|
||||
('dmabuf_fd', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
|
||||
# values for enumeration 'kfd_mmio_remap'
|
||||
kfd_mmio_remap__enumvalues = {
|
||||
0: 'KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL',
|
||||
@@ -738,18 +928,484 @@ struct_kfd_ioctl_set_xnack_mode_args._fields_ = [
|
||||
]
|
||||
|
||||
AMDKFD_IOC_SET_XNACK_MODE = AMDKFD_IOWR ( 0x21 , struct_kfd_ioctl_set_xnack_mode_args ) # macro (from list)
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_override_mode'
|
||||
kfd_dbg_trap_override_mode__enumvalues = {
|
||||
0: 'KFD_DBG_TRAP_OVERRIDE_OR',
|
||||
1: 'KFD_DBG_TRAP_OVERRIDE_REPLACE',
|
||||
}
|
||||
KFD_DBG_TRAP_OVERRIDE_OR = 0
|
||||
KFD_DBG_TRAP_OVERRIDE_REPLACE = 1
|
||||
kfd_dbg_trap_override_mode = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_mask'
|
||||
kfd_dbg_trap_mask__enumvalues = {
|
||||
1: 'KFD_DBG_TRAP_MASK_FP_INVALID',
|
||||
2: 'KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL',
|
||||
4: 'KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO',
|
||||
8: 'KFD_DBG_TRAP_MASK_FP_OVERFLOW',
|
||||
16: 'KFD_DBG_TRAP_MASK_FP_UNDERFLOW',
|
||||
32: 'KFD_DBG_TRAP_MASK_FP_INEXACT',
|
||||
64: 'KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO',
|
||||
128: 'KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH',
|
||||
256: 'KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION',
|
||||
1073741824: 'KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START',
|
||||
-2147483648: 'KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END',
|
||||
}
|
||||
KFD_DBG_TRAP_MASK_FP_INVALID = 1
|
||||
KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL = 2
|
||||
KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO = 4
|
||||
KFD_DBG_TRAP_MASK_FP_OVERFLOW = 8
|
||||
KFD_DBG_TRAP_MASK_FP_UNDERFLOW = 16
|
||||
KFD_DBG_TRAP_MASK_FP_INEXACT = 32
|
||||
KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO = 64
|
||||
KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH = 128
|
||||
KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION = 256
|
||||
KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START = 1073741824
|
||||
KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END = -2147483648
|
||||
kfd_dbg_trap_mask = ctypes.c_int32 # enum
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_wave_launch_mode'
|
||||
kfd_dbg_trap_wave_launch_mode__enumvalues = {
|
||||
0: 'KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL',
|
||||
1: 'KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT',
|
||||
3: 'KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG',
|
||||
}
|
||||
KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL = 0
|
||||
KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT = 1
|
||||
KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG = 3
|
||||
kfd_dbg_trap_wave_launch_mode = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_address_watch_mode'
|
||||
kfd_dbg_trap_address_watch_mode__enumvalues = {
|
||||
0: 'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ',
|
||||
1: 'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD',
|
||||
2: 'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC',
|
||||
3: 'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL',
|
||||
}
|
||||
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ = 0
|
||||
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD = 1
|
||||
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC = 2
|
||||
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL = 3
|
||||
kfd_dbg_trap_address_watch_mode = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_flags'
|
||||
kfd_dbg_trap_flags__enumvalues = {
|
||||
1: 'KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP',
|
||||
}
|
||||
KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1
|
||||
kfd_dbg_trap_flags = ctypes.c_uint32 # enum
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_exception_code'
|
||||
kfd_dbg_trap_exception_code__enumvalues = {
|
||||
0: 'EC_NONE',
|
||||
1: 'EC_QUEUE_WAVE_ABORT',
|
||||
2: 'EC_QUEUE_WAVE_TRAP',
|
||||
3: 'EC_QUEUE_WAVE_MATH_ERROR',
|
||||
4: 'EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION',
|
||||
5: 'EC_QUEUE_WAVE_MEMORY_VIOLATION',
|
||||
6: 'EC_QUEUE_WAVE_APERTURE_VIOLATION',
|
||||
16: 'EC_QUEUE_PACKET_DISPATCH_DIM_INVALID',
|
||||
17: 'EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID',
|
||||
18: 'EC_QUEUE_PACKET_DISPATCH_CODE_INVALID',
|
||||
19: 'EC_QUEUE_PACKET_RESERVED',
|
||||
20: 'EC_QUEUE_PACKET_UNSUPPORTED',
|
||||
21: 'EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID',
|
||||
22: 'EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID',
|
||||
23: 'EC_QUEUE_PACKET_VENDOR_UNSUPPORTED',
|
||||
30: 'EC_QUEUE_PREEMPTION_ERROR',
|
||||
31: 'EC_QUEUE_NEW',
|
||||
32: 'EC_DEVICE_QUEUE_DELETE',
|
||||
33: 'EC_DEVICE_MEMORY_VIOLATION',
|
||||
34: 'EC_DEVICE_RAS_ERROR',
|
||||
35: 'EC_DEVICE_FATAL_HALT',
|
||||
36: 'EC_DEVICE_NEW',
|
||||
48: 'EC_PROCESS_RUNTIME',
|
||||
49: 'EC_PROCESS_DEVICE_REMOVE',
|
||||
50: 'EC_MAX',
|
||||
}
|
||||
EC_NONE = 0
|
||||
EC_QUEUE_WAVE_ABORT = 1
|
||||
EC_QUEUE_WAVE_TRAP = 2
|
||||
EC_QUEUE_WAVE_MATH_ERROR = 3
|
||||
EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION = 4
|
||||
EC_QUEUE_WAVE_MEMORY_VIOLATION = 5
|
||||
EC_QUEUE_WAVE_APERTURE_VIOLATION = 6
|
||||
EC_QUEUE_PACKET_DISPATCH_DIM_INVALID = 16
|
||||
EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID = 17
|
||||
EC_QUEUE_PACKET_DISPATCH_CODE_INVALID = 18
|
||||
EC_QUEUE_PACKET_RESERVED = 19
|
||||
EC_QUEUE_PACKET_UNSUPPORTED = 20
|
||||
EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID = 21
|
||||
EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID = 22
|
||||
EC_QUEUE_PACKET_VENDOR_UNSUPPORTED = 23
|
||||
EC_QUEUE_PREEMPTION_ERROR = 30
|
||||
EC_QUEUE_NEW = 31
|
||||
EC_DEVICE_QUEUE_DELETE = 32
|
||||
EC_DEVICE_MEMORY_VIOLATION = 33
|
||||
EC_DEVICE_RAS_ERROR = 34
|
||||
EC_DEVICE_FATAL_HALT = 35
|
||||
EC_DEVICE_NEW = 36
|
||||
EC_PROCESS_RUNTIME = 48
|
||||
EC_PROCESS_DEVICE_REMOVE = 49
|
||||
EC_MAX = 50
|
||||
kfd_dbg_trap_exception_code = ctypes.c_uint32 # enum
|
||||
KFD_EC_MASK_QUEUE = (KFD_EC_MASK(EC_QUEUE_WAVE_ABORT)|KFD_EC_MASK(EC_QUEUE_WAVE_TRAP)|KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR)|KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION)|KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION)|KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED)|KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED)|KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR)|KFD_EC_MASK(EC_QUEUE_NEW)) # macro
|
||||
KFD_EC_MASK_DEVICE = (KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE)|KFD_EC_MASK(EC_DEVICE_RAS_ERROR)|KFD_EC_MASK(EC_DEVICE_FATAL_HALT)|KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)|KFD_EC_MASK(EC_DEVICE_NEW)) # macro
|
||||
KFD_EC_MASK_PROCESS = (KFD_EC_MASK(EC_PROCESS_RUNTIME)|KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE)) # macro
|
||||
KFD_EC_MASK_PACKET = (KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED)|KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED)) # macro
|
||||
def KFD_DBG_EC_IS_VALID(ecode): # macro
|
||||
return (ecode>EC_NONE and ecode<EC_MAX)
|
||||
def KFD_DBG_EC_TYPE_IS_QUEUE(ecode): # macro
|
||||
return (KFD_DBG_EC_IS_VALID(ecode) and not not (KFD_EC_MASK(ecode)&(KFD_EC_MASK(EC_QUEUE_WAVE_ABORT)|KFD_EC_MASK(EC_QUEUE_WAVE_TRAP)|KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR)|KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION)|KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION)|KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED)|KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED)|KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR)|KFD_EC_MASK(EC_QUEUE_NEW))))
|
||||
def KFD_DBG_EC_TYPE_IS_DEVICE(ecode): # macro
|
||||
return (KFD_DBG_EC_IS_VALID(ecode) and not not (KFD_EC_MASK(ecode)&(KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE)|KFD_EC_MASK(EC_DEVICE_RAS_ERROR)|KFD_EC_MASK(EC_DEVICE_FATAL_HALT)|KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)|KFD_EC_MASK(EC_DEVICE_NEW))))
|
||||
def KFD_DBG_EC_TYPE_IS_PROCESS(ecode): # macro
|
||||
return (KFD_DBG_EC_IS_VALID(ecode) and not not (KFD_EC_MASK(ecode)&(KFD_EC_MASK(EC_PROCESS_RUNTIME)|KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE))))
|
||||
def KFD_DBG_EC_TYPE_IS_PACKET(ecode): # macro
|
||||
return (KFD_DBG_EC_IS_VALID(ecode) and not not (KFD_EC_MASK(ecode)&(KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED)|KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID)|KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED))))
|
||||
|
||||
# values for enumeration 'kfd_dbg_runtime_state'
|
||||
kfd_dbg_runtime_state__enumvalues = {
|
||||
0: 'DEBUG_RUNTIME_STATE_DISABLED',
|
||||
1: 'DEBUG_RUNTIME_STATE_ENABLED',
|
||||
2: 'DEBUG_RUNTIME_STATE_ENABLED_BUSY',
|
||||
3: 'DEBUG_RUNTIME_STATE_ENABLED_ERROR',
|
||||
}
|
||||
DEBUG_RUNTIME_STATE_DISABLED = 0
|
||||
DEBUG_RUNTIME_STATE_ENABLED = 1
|
||||
DEBUG_RUNTIME_STATE_ENABLED_BUSY = 2
|
||||
DEBUG_RUNTIME_STATE_ENABLED_ERROR = 3
|
||||
kfd_dbg_runtime_state = ctypes.c_uint32 # enum
|
||||
class struct_kfd_runtime_info(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_runtime_info._pack_ = 1 # source:False
|
||||
struct_kfd_runtime_info._fields_ = [
|
||||
('r_debug', ctypes.c_uint64),
|
||||
('runtime_state', ctypes.c_uint32),
|
||||
('ttmp_setup', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_runtime_enable_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_runtime_enable_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_runtime_enable_args._fields_ = [
|
||||
('r_debug', ctypes.c_uint64),
|
||||
('mode_mask', ctypes.c_uint32),
|
||||
('capabilities_mask', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_RUNTIME_ENABLE = AMDKFD_IOWR ( 0x25 , struct_kfd_ioctl_runtime_enable_args ) # macro (from list)
|
||||
class struct_kfd_queue_snapshot_entry(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_queue_snapshot_entry._pack_ = 1 # source:False
|
||||
struct_kfd_queue_snapshot_entry._fields_ = [
|
||||
('exception_status', ctypes.c_uint64),
|
||||
('ring_base_address', ctypes.c_uint64),
|
||||
('write_pointer_address', ctypes.c_uint64),
|
||||
('read_pointer_address', ctypes.c_uint64),
|
||||
('ctx_save_restore_address', ctypes.c_uint64),
|
||||
('queue_id', ctypes.c_uint32),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('ring_size', ctypes.c_uint32),
|
||||
('queue_type', ctypes.c_uint32),
|
||||
('ctx_save_restore_area_size', ctypes.c_uint32),
|
||||
('reserved', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_context_save_area_header(Structure):
|
||||
pass
|
||||
|
||||
class struct_kfd_context_save_area_header_wave_state(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_context_save_area_header_wave_state._pack_ = 1 # source:False
|
||||
struct_kfd_context_save_area_header_wave_state._fields_ = [
|
||||
('control_stack_offset', ctypes.c_uint32),
|
||||
('control_stack_size', ctypes.c_uint32),
|
||||
('wave_state_offset', ctypes.c_uint32),
|
||||
('wave_state_size', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
struct_kfd_context_save_area_header._pack_ = 1 # source:False
|
||||
struct_kfd_context_save_area_header._fields_ = [
|
||||
('wave_state', struct_kfd_context_save_area_header_wave_state),
|
||||
('debug_offset', ctypes.c_uint32),
|
||||
('debug_size', ctypes.c_uint32),
|
||||
('err_payload_addr', ctypes.c_uint64),
|
||||
('err_event_id', ctypes.c_uint32),
|
||||
('reserved1', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
|
||||
# values for enumeration 'kfd_dbg_trap_operations'
|
||||
kfd_dbg_trap_operations__enumvalues = {
|
||||
0: 'KFD_IOC_DBG_TRAP_ENABLE',
|
||||
1: 'KFD_IOC_DBG_TRAP_DISABLE',
|
||||
2: 'KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT',
|
||||
3: 'KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED',
|
||||
4: 'KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE',
|
||||
5: 'KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE',
|
||||
6: 'KFD_IOC_DBG_TRAP_SUSPEND_QUEUES',
|
||||
7: 'KFD_IOC_DBG_TRAP_RESUME_QUEUES',
|
||||
8: 'KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH',
|
||||
9: 'KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH',
|
||||
10: 'KFD_IOC_DBG_TRAP_SET_FLAGS',
|
||||
11: 'KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT',
|
||||
12: 'KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO',
|
||||
13: 'KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT',
|
||||
14: 'KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT',
|
||||
}
|
||||
KFD_IOC_DBG_TRAP_ENABLE = 0
|
||||
KFD_IOC_DBG_TRAP_DISABLE = 1
|
||||
KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT = 2
|
||||
KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED = 3
|
||||
KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE = 4
|
||||
KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE = 5
|
||||
KFD_IOC_DBG_TRAP_SUSPEND_QUEUES = 6
|
||||
KFD_IOC_DBG_TRAP_RESUME_QUEUES = 7
|
||||
KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH = 8
|
||||
KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH = 9
|
||||
KFD_IOC_DBG_TRAP_SET_FLAGS = 10
|
||||
KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT = 11
|
||||
KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO = 12
|
||||
KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT = 13
|
||||
KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT = 14
|
||||
kfd_dbg_trap_operations = ctypes.c_uint32 # enum
|
||||
class struct_kfd_ioctl_dbg_trap_enable_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_enable_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_enable_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
('rinfo_ptr', ctypes.c_uint64),
|
||||
('rinfo_size', ctypes.c_uint32),
|
||||
('dbg_fd', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_send_runtime_event_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_send_runtime_event_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_send_runtime_event_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('queue_id', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_set_exceptions_enabled_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_set_exceptions_enabled_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_set_exceptions_enabled_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_set_wave_launch_override_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_set_wave_launch_override_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_set_wave_launch_override_args._fields_ = [
|
||||
('override_mode', ctypes.c_uint32),
|
||||
('enable_mask', ctypes.c_uint32),
|
||||
('support_request_mask', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_set_wave_launch_mode_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_set_wave_launch_mode_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_set_wave_launch_mode_args._fields_ = [
|
||||
('launch_mode', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_suspend_queues_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_suspend_queues_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_suspend_queues_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
('queue_array_ptr', ctypes.c_uint64),
|
||||
('num_queues', ctypes.c_uint32),
|
||||
('grace_period', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_resume_queues_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_resume_queues_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_resume_queues_args._fields_ = [
|
||||
('queue_array_ptr', ctypes.c_uint64),
|
||||
('num_queues', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_set_node_address_watch_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_set_node_address_watch_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_set_node_address_watch_args._fields_ = [
|
||||
('address', ctypes.c_uint64),
|
||||
('mode', ctypes.c_uint32),
|
||||
('mask', ctypes.c_uint32),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('id', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_clear_node_address_watch_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_clear_node_address_watch_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_clear_node_address_watch_args._fields_ = [
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('id', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_set_flags_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_set_flags_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_set_flags_args._fields_ = [
|
||||
('flags', ctypes.c_uint32),
|
||||
('pad', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_query_debug_event_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_query_debug_event_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_query_debug_event_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
('gpu_id', ctypes.c_uint32),
|
||||
('queue_id', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_query_exception_info_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_query_exception_info_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_query_exception_info_args._fields_ = [
|
||||
('info_ptr', ctypes.c_uint64),
|
||||
('info_size', ctypes.c_uint32),
|
||||
('source_id', ctypes.c_uint32),
|
||||
('exception_code', ctypes.c_uint32),
|
||||
('clear_exception', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_queue_snapshot_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_queue_snapshot_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_queue_snapshot_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
('snapshot_buf_ptr', ctypes.c_uint64),
|
||||
('num_queues', ctypes.c_uint32),
|
||||
('entry_size', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_device_snapshot_args(Structure):
|
||||
pass
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_device_snapshot_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_device_snapshot_args._fields_ = [
|
||||
('exception_mask', ctypes.c_uint64),
|
||||
('snapshot_buf_ptr', ctypes.c_uint64),
|
||||
('num_devices', ctypes.c_uint32),
|
||||
('entry_size', ctypes.c_uint32),
|
||||
]
|
||||
|
||||
class struct_kfd_ioctl_dbg_trap_args(Structure):
|
||||
pass
|
||||
|
||||
class union_kfd_ioctl_dbg_trap_args_0(Union):
|
||||
_pack_ = 1 # source:False
|
||||
_fields_ = [
|
||||
('enable', struct_kfd_ioctl_dbg_trap_enable_args),
|
||||
('send_runtime_event', struct_kfd_ioctl_dbg_trap_send_runtime_event_args),
|
||||
('set_exceptions_enabled', struct_kfd_ioctl_dbg_trap_set_exceptions_enabled_args),
|
||||
('launch_override', struct_kfd_ioctl_dbg_trap_set_wave_launch_override_args),
|
||||
('launch_mode', struct_kfd_ioctl_dbg_trap_set_wave_launch_mode_args),
|
||||
('suspend_queues', struct_kfd_ioctl_dbg_trap_suspend_queues_args),
|
||||
('resume_queues', struct_kfd_ioctl_dbg_trap_resume_queues_args),
|
||||
('set_node_address_watch', struct_kfd_ioctl_dbg_trap_set_node_address_watch_args),
|
||||
('clear_node_address_watch', struct_kfd_ioctl_dbg_trap_clear_node_address_watch_args),
|
||||
('set_flags', struct_kfd_ioctl_dbg_trap_set_flags_args),
|
||||
('query_debug_event', struct_kfd_ioctl_dbg_trap_query_debug_event_args),
|
||||
('query_exception_info', struct_kfd_ioctl_dbg_trap_query_exception_info_args),
|
||||
('queue_snapshot', struct_kfd_ioctl_dbg_trap_queue_snapshot_args),
|
||||
('device_snapshot', struct_kfd_ioctl_dbg_trap_device_snapshot_args),
|
||||
]
|
||||
|
||||
struct_kfd_ioctl_dbg_trap_args._pack_ = 1 # source:False
|
||||
struct_kfd_ioctl_dbg_trap_args._anonymous_ = ('_0',)
|
||||
struct_kfd_ioctl_dbg_trap_args._fields_ = [
|
||||
('pid', ctypes.c_uint32),
|
||||
('op', ctypes.c_uint32),
|
||||
('_0', union_kfd_ioctl_dbg_trap_args_0),
|
||||
]
|
||||
|
||||
AMDKFD_IOC_DBG_TRAP = AMDKFD_IOWR ( 0x26 , struct_kfd_ioctl_dbg_trap_args ) # macro (from list)
|
||||
__all__ = \
|
||||
['AMDKFD_COMMAND_END', 'AMDKFD_COMMAND_START',
|
||||
'AMDKFD_IOCTL_BASE', 'KFD_HW_EXCEPTION_ECC',
|
||||
'KFD_HW_EXCEPTION_GPU_HANG', 'KFD_HW_EXCEPTION_PER_ENGINE_RESET',
|
||||
'KFD_HW_EXCEPTION_WHOLE_GPU_RESET', 'KFD_IOCTL_H_INCLUDED',
|
||||
'KFD_IOCTL_MAJOR_VERSION', 'KFD_IOCTL_MINOR_VERSION',
|
||||
'KFD_IOCTL_SVM_ATTR_ACCESS', 'KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE',
|
||||
'AMDKFD_IOCTL_BASE', 'DEBUG_RUNTIME_STATE_DISABLED',
|
||||
'DEBUG_RUNTIME_STATE_ENABLED', 'DEBUG_RUNTIME_STATE_ENABLED_BUSY',
|
||||
'DEBUG_RUNTIME_STATE_ENABLED_ERROR', 'EC_DEVICE_FATAL_HALT',
|
||||
'EC_DEVICE_MEMORY_VIOLATION', 'EC_DEVICE_NEW',
|
||||
'EC_DEVICE_QUEUE_DELETE', 'EC_DEVICE_RAS_ERROR', 'EC_MAX',
|
||||
'EC_NONE', 'EC_PROCESS_DEVICE_REMOVE', 'EC_PROCESS_RUNTIME',
|
||||
'EC_QUEUE_NEW', 'EC_QUEUE_PACKET_DISPATCH_CODE_INVALID',
|
||||
'EC_QUEUE_PACKET_DISPATCH_DIM_INVALID',
|
||||
'EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID',
|
||||
'EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID',
|
||||
'EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID',
|
||||
'EC_QUEUE_PACKET_RESERVED', 'EC_QUEUE_PACKET_UNSUPPORTED',
|
||||
'EC_QUEUE_PACKET_VENDOR_UNSUPPORTED', 'EC_QUEUE_PREEMPTION_ERROR',
|
||||
'EC_QUEUE_WAVE_ABORT', 'EC_QUEUE_WAVE_APERTURE_VIOLATION',
|
||||
'EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION', 'EC_QUEUE_WAVE_MATH_ERROR',
|
||||
'EC_QUEUE_WAVE_MEMORY_VIOLATION', 'EC_QUEUE_WAVE_TRAP',
|
||||
'KFD_CRIU_OP_CHECKPOINT', 'KFD_CRIU_OP_PROCESS_INFO',
|
||||
'KFD_CRIU_OP_RESTORE', 'KFD_CRIU_OP_RESUME',
|
||||
'KFD_CRIU_OP_UNPAUSE', 'KFD_DBG_QUEUE_ERROR_BIT',
|
||||
'KFD_DBG_QUEUE_ERROR_MASK', 'KFD_DBG_QUEUE_INVALID_BIT',
|
||||
'KFD_DBG_QUEUE_INVALID_MASK',
|
||||
'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL',
|
||||
'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC',
|
||||
'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD',
|
||||
'KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ',
|
||||
'KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP',
|
||||
'KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH',
|
||||
'KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION',
|
||||
'KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO',
|
||||
'KFD_DBG_TRAP_MASK_FP_INEXACT',
|
||||
'KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL',
|
||||
'KFD_DBG_TRAP_MASK_FP_INVALID', 'KFD_DBG_TRAP_MASK_FP_OVERFLOW',
|
||||
'KFD_DBG_TRAP_MASK_FP_UNDERFLOW',
|
||||
'KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO',
|
||||
'KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END',
|
||||
'KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START',
|
||||
'KFD_DBG_TRAP_OVERRIDE_OR', 'KFD_DBG_TRAP_OVERRIDE_REPLACE',
|
||||
'KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG',
|
||||
'KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT',
|
||||
'KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL', 'KFD_EC_MASK_DEVICE',
|
||||
'KFD_EC_MASK_PACKET', 'KFD_EC_MASK_PROCESS', 'KFD_EC_MASK_QUEUE',
|
||||
'KFD_HW_EXCEPTION_ECC', 'KFD_HW_EXCEPTION_GPU_HANG',
|
||||
'KFD_HW_EXCEPTION_PER_ENGINE_RESET',
|
||||
'KFD_HW_EXCEPTION_WHOLE_GPU_RESET', 'KFD_INVALID_FD',
|
||||
'KFD_IOCTL_H_INCLUDED', 'KFD_IOCTL_MAJOR_VERSION',
|
||||
'KFD_IOCTL_MINOR_VERSION', 'KFD_IOCTL_SVM_ATTR_ACCESS',
|
||||
'KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE',
|
||||
'KFD_IOCTL_SVM_ATTR_CLR_FLAGS', 'KFD_IOCTL_SVM_ATTR_GRANULARITY',
|
||||
'KFD_IOCTL_SVM_ATTR_NO_ACCESS',
|
||||
'KFD_IOCTL_SVM_ATTR_PREFERRED_LOC',
|
||||
'KFD_IOCTL_SVM_ATTR_PREFETCH_LOC', 'KFD_IOCTL_SVM_ATTR_SET_FLAGS',
|
||||
'KFD_IOCTL_SVM_FLAG_COHERENT', 'KFD_IOCTL_SVM_FLAG_GPU_EXEC',
|
||||
'KFD_IOCTL_SVM_FLAG_COHERENT', 'KFD_IOCTL_SVM_FLAG_EXT_COHERENT',
|
||||
'KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED',
|
||||
'KFD_IOCTL_SVM_FLAG_GPU_EXEC',
|
||||
'KFD_IOCTL_SVM_FLAG_GPU_READ_MOSTLY', 'KFD_IOCTL_SVM_FLAG_GPU_RO',
|
||||
'KFD_IOCTL_SVM_FLAG_HIVE_LOCAL', 'KFD_IOCTL_SVM_FLAG_HOST_ACCESS',
|
||||
'KFD_IOCTL_SVM_LOCATION_SYSMEM',
|
||||
@@ -759,6 +1415,7 @@ __all__ = \
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_COHERENT',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_EXT_COHERENT',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_GTT',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE',
|
||||
@@ -767,7 +1424,21 @@ __all__ = \
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_USERPTR', 'KFD_IOC_ALLOC_MEM_FLAGS_VRAM',
|
||||
'KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE',
|
||||
'KFD_IOC_CACHE_POLICY_COHERENT',
|
||||
'KFD_IOC_CACHE_POLICY_NONCOHERENT', 'KFD_IOC_EVENT_DEBUG_EVENT',
|
||||
'KFD_IOC_CACHE_POLICY_NONCOHERENT',
|
||||
'KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH',
|
||||
'KFD_IOC_DBG_TRAP_DISABLE', 'KFD_IOC_DBG_TRAP_ENABLE',
|
||||
'KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT',
|
||||
'KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT',
|
||||
'KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT',
|
||||
'KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO',
|
||||
'KFD_IOC_DBG_TRAP_RESUME_QUEUES',
|
||||
'KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT',
|
||||
'KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED',
|
||||
'KFD_IOC_DBG_TRAP_SET_FLAGS',
|
||||
'KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH',
|
||||
'KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE',
|
||||
'KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE',
|
||||
'KFD_IOC_DBG_TRAP_SUSPEND_QUEUES', 'KFD_IOC_EVENT_DEBUG_EVENT',
|
||||
'KFD_IOC_EVENT_DEVICESTATECHANGE', 'KFD_IOC_EVENT_HW_EXCEPTION',
|
||||
'KFD_IOC_EVENT_MEMORY', 'KFD_IOC_EVENT_NODECHANGE',
|
||||
'KFD_IOC_EVENT_PROFILE_EVENT', 'KFD_IOC_EVENT_QUEUE_EVENT',
|
||||
@@ -778,29 +1449,77 @@ __all__ = \
|
||||
'KFD_IOC_WAIT_RESULT_TIMEOUT', 'KFD_MAX_QUEUE_PERCENTAGE',
|
||||
'KFD_MAX_QUEUE_PRIORITY', 'KFD_MEM_ERR_GPU_HANG',
|
||||
'KFD_MEM_ERR_NO_RAS', 'KFD_MEM_ERR_POISON_CONSUMED',
|
||||
'KFD_MEM_ERR_SRAM_ECC', 'KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL',
|
||||
'KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL', 'KFD_SIGNAL_EVENT_LIMIT',
|
||||
'KFD_MEM_ERR_SRAM_ECC', 'KFD_MIGRATE_TRIGGERS',
|
||||
'KFD_MIGRATE_TRIGGER_PAGEFAULT_CPU',
|
||||
'KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU',
|
||||
'KFD_MIGRATE_TRIGGER_PREFETCH',
|
||||
'KFD_MIGRATE_TRIGGER_TTM_EVICTION',
|
||||
'KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL',
|
||||
'KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL',
|
||||
'KFD_QUEUE_EVICTION_CRIU_CHECKPOINT',
|
||||
'KFD_QUEUE_EVICTION_CRIU_RESTORE', 'KFD_QUEUE_EVICTION_TRIGGERS',
|
||||
'KFD_QUEUE_EVICTION_TRIGGER_SUSPEND',
|
||||
'KFD_QUEUE_EVICTION_TRIGGER_SVM',
|
||||
'KFD_QUEUE_EVICTION_TRIGGER_TTM',
|
||||
'KFD_QUEUE_EVICTION_TRIGGER_USERPTR',
|
||||
'KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK',
|
||||
'KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK',
|
||||
'KFD_SIGNAL_EVENT_LIMIT', 'KFD_SMI_EVENT_ALL_PROCESS',
|
||||
'KFD_SMI_EVENT_GPU_POST_RESET', 'KFD_SMI_EVENT_GPU_PRE_RESET',
|
||||
'KFD_SMI_EVENT_NONE', 'KFD_SMI_EVENT_THERMAL_THROTTLE',
|
||||
'KFD_SMI_EVENT_VMFAULT', 'MAX_ALLOWED_AW_BUFF_SIZE',
|
||||
'MAX_ALLOWED_NUM_POINTS', 'MAX_ALLOWED_WAC_BUFF_SIZE',
|
||||
'NUM_OF_SUPPORTED_GPUS', '_IO', '_IOR', '_IOW', '_IOWR',
|
||||
'kfd_ioctl_svm_attr_type', 'kfd_ioctl_svm_location',
|
||||
'kfd_ioctl_svm_op', 'kfd_mmio_remap', 'kfd_smi_event',
|
||||
'struct_kfd_event_data', 'struct_kfd_hsa_hw_exception_data',
|
||||
'KFD_SMI_EVENT_MIGRATE_END', 'KFD_SMI_EVENT_MIGRATE_START',
|
||||
'KFD_SMI_EVENT_MSG_SIZE', 'KFD_SMI_EVENT_NONE',
|
||||
'KFD_SMI_EVENT_PAGE_FAULT_END', 'KFD_SMI_EVENT_PAGE_FAULT_START',
|
||||
'KFD_SMI_EVENT_QUEUE_EVICTION', 'KFD_SMI_EVENT_QUEUE_RESTORE',
|
||||
'KFD_SMI_EVENT_THERMAL_THROTTLE', 'KFD_SMI_EVENT_UNMAP_FROM_GPU',
|
||||
'KFD_SMI_EVENT_VMFAULT', 'KFD_SVM_UNMAP_TRIGGERS',
|
||||
'KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY',
|
||||
'KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE',
|
||||
'KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU',
|
||||
'MAX_ALLOWED_AW_BUFF_SIZE', 'MAX_ALLOWED_NUM_POINTS',
|
||||
'MAX_ALLOWED_WAC_BUFF_SIZE', 'NUM_OF_SUPPORTED_GPUS', '_IO',
|
||||
'_IOR', '_IOW', '_IOWR', 'kfd_criu_op', 'kfd_dbg_runtime_state',
|
||||
'kfd_dbg_trap_address_watch_mode', 'kfd_dbg_trap_exception_code',
|
||||
'kfd_dbg_trap_flags', 'kfd_dbg_trap_mask',
|
||||
'kfd_dbg_trap_operations', 'kfd_dbg_trap_override_mode',
|
||||
'kfd_dbg_trap_wave_launch_mode', 'kfd_ioctl_svm_attr_type',
|
||||
'kfd_ioctl_svm_location', 'kfd_ioctl_svm_op', 'kfd_mmio_remap',
|
||||
'kfd_smi_event', 'struct_kfd_context_save_area_header',
|
||||
'struct_kfd_context_save_area_header_wave_state',
|
||||
'struct_kfd_criu_bo_bucket', 'struct_kfd_criu_device_bucket',
|
||||
'struct_kfd_dbg_device_info_entry', 'struct_kfd_event_data',
|
||||
'struct_kfd_hsa_hw_exception_data',
|
||||
'struct_kfd_hsa_memory_exception_data',
|
||||
'struct_kfd_hsa_signal_event_data',
|
||||
'struct_kfd_ioctl_acquire_vm_args',
|
||||
'struct_kfd_ioctl_alloc_memory_of_gpu_args',
|
||||
'struct_kfd_ioctl_alloc_queue_gws_args',
|
||||
'struct_kfd_ioctl_create_event_args',
|
||||
'struct_kfd_ioctl_create_queue_args',
|
||||
'struct_kfd_ioctl_criu_args',
|
||||
'struct_kfd_ioctl_dbg_address_watch_args',
|
||||
'struct_kfd_ioctl_dbg_register_args',
|
||||
'struct_kfd_ioctl_dbg_trap_args',
|
||||
'struct_kfd_ioctl_dbg_trap_clear_node_address_watch_args',
|
||||
'struct_kfd_ioctl_dbg_trap_device_snapshot_args',
|
||||
'struct_kfd_ioctl_dbg_trap_enable_args',
|
||||
'struct_kfd_ioctl_dbg_trap_query_debug_event_args',
|
||||
'struct_kfd_ioctl_dbg_trap_query_exception_info_args',
|
||||
'struct_kfd_ioctl_dbg_trap_queue_snapshot_args',
|
||||
'struct_kfd_ioctl_dbg_trap_resume_queues_args',
|
||||
'struct_kfd_ioctl_dbg_trap_send_runtime_event_args',
|
||||
'struct_kfd_ioctl_dbg_trap_set_exceptions_enabled_args',
|
||||
'struct_kfd_ioctl_dbg_trap_set_flags_args',
|
||||
'struct_kfd_ioctl_dbg_trap_set_node_address_watch_args',
|
||||
'struct_kfd_ioctl_dbg_trap_set_wave_launch_mode_args',
|
||||
'struct_kfd_ioctl_dbg_trap_set_wave_launch_override_args',
|
||||
'struct_kfd_ioctl_dbg_trap_suspend_queues_args',
|
||||
'struct_kfd_ioctl_dbg_unregister_args',
|
||||
'struct_kfd_ioctl_dbg_wave_control_args',
|
||||
'struct_kfd_ioctl_destroy_event_args',
|
||||
'struct_kfd_ioctl_destroy_queue_args',
|
||||
'struct_kfd_ioctl_export_dmabuf_args',
|
||||
'struct_kfd_ioctl_free_memory_of_gpu_args',
|
||||
'struct_kfd_ioctl_get_available_memory_args',
|
||||
'struct_kfd_ioctl_get_clock_counters_args',
|
||||
'struct_kfd_ioctl_get_dmabuf_info_args',
|
||||
'struct_kfd_ioctl_get_process_apertures_args',
|
||||
@@ -811,6 +1530,7 @@ __all__ = \
|
||||
'struct_kfd_ioctl_import_dmabuf_args',
|
||||
'struct_kfd_ioctl_map_memory_to_gpu_args',
|
||||
'struct_kfd_ioctl_reset_event_args',
|
||||
'struct_kfd_ioctl_runtime_enable_args',
|
||||
'struct_kfd_ioctl_set_cu_mask_args',
|
||||
'struct_kfd_ioctl_set_event_args',
|
||||
'struct_kfd_ioctl_set_memory_policy_args',
|
||||
@@ -823,4 +1543,6 @@ __all__ = \
|
||||
'struct_kfd_ioctl_update_queue_args',
|
||||
'struct_kfd_ioctl_wait_events_args',
|
||||
'struct_kfd_memory_exception_failure',
|
||||
'struct_kfd_process_device_apertures', 'union_kfd_event_data_0']
|
||||
'struct_kfd_process_device_apertures',
|
||||
'struct_kfd_queue_snapshot_entry', 'struct_kfd_runtime_info',
|
||||
'union_kfd_event_data_0', 'union_kfd_ioctl_dbg_trap_args_0']
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -414,7 +414,6 @@ CL_Rx = 0x10BA # macro
|
||||
CL_RGx = 0x10BB # macro
|
||||
CL_RGBx = 0x10BC # macro
|
||||
CL_DEPTH = 0x10BD # macro
|
||||
CL_DEPTH_STENCIL = 0x10BE # macro
|
||||
CL_sRGB = 0x10BF # macro
|
||||
CL_sRGBx = 0x10C0 # macro
|
||||
CL_sRGBA = 0x10C1 # macro
|
||||
@@ -435,7 +434,6 @@ CL_UNSIGNED_INT16 = 0x10DB # macro
|
||||
CL_UNSIGNED_INT32 = 0x10DC # macro
|
||||
CL_HALF_FLOAT = 0x10DD # macro
|
||||
CL_FLOAT = 0x10DE # macro
|
||||
CL_UNORM_INT24 = 0x10DF # macro
|
||||
CL_UNORM_INT_101010_2 = 0x10E0 # macro
|
||||
CL_MEM_OBJECT_BUFFER = 0x10F0 # macro
|
||||
CL_MEM_OBJECT_IMAGE2D = 0x10F1 # macro
|
||||
@@ -1477,7 +1475,7 @@ __all__ = \
|
||||
'CL_COMPILE_PROGRAM_FAILURE', 'CL_COMPLETE', 'CL_CONTEXT_DEVICES',
|
||||
'CL_CONTEXT_INTEROP_USER_SYNC', 'CL_CONTEXT_NUM_DEVICES',
|
||||
'CL_CONTEXT_PLATFORM', 'CL_CONTEXT_PROPERTIES',
|
||||
'CL_CONTEXT_REFERENCE_COUNT', 'CL_DEPTH', 'CL_DEPTH_STENCIL',
|
||||
'CL_CONTEXT_REFERENCE_COUNT', 'CL_DEPTH',
|
||||
'CL_DEVICE_ADDRESS_BITS', 'CL_DEVICE_AFFINITY_DOMAIN_L1_CACHE',
|
||||
'CL_DEVICE_AFFINITY_DOMAIN_L2_CACHE',
|
||||
'CL_DEVICE_AFFINITY_DOMAIN_L3_CACHE',
|
||||
@@ -1704,7 +1702,7 @@ __all__ = \
|
||||
'CL_SAMPLER_PROPERTIES', 'CL_SAMPLER_REFERENCE_COUNT',
|
||||
'CL_SIGNED_INT16', 'CL_SIGNED_INT32', 'CL_SIGNED_INT8',
|
||||
'CL_SNORM_INT16', 'CL_SNORM_INT8', 'CL_SUBMITTED', 'CL_SUCCESS',
|
||||
'CL_TRUE', 'CL_UNORM_INT16', 'CL_UNORM_INT24', 'CL_UNORM_INT8',
|
||||
'CL_TRUE', 'CL_UNORM_INT16', 'CL_UNORM_INT8',
|
||||
'CL_UNORM_INT_101010', 'CL_UNORM_INT_101010_2',
|
||||
'CL_UNORM_SHORT_555', 'CL_UNORM_SHORT_565', 'CL_UNSIGNED_INT16',
|
||||
'CL_UNSIGNED_INT32', 'CL_UNSIGNED_INT8', 'CL_VERSION_MAJOR_BITS',
|
||||
|
||||
Reference in New Issue
Block a user