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nv: remove hardcoded expansion_rom_off (#13180)
* nv: remove hardcoded expansion_rom_off * to max size
This commit is contained in:
nimlgen
@@ -188,6 +188,7 @@ nv_status_codes = {}
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extra/nv_gpu_driver/g_rpc-message-header.h \
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extra/nv_gpu_driver/gsp_static_config.h \
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extra/nv_gpu_driver/vbios.h \
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extra/nv_gpu_driver/pci_exp_table.h \
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--clang-args="-DRPC_MESSAGE_STRUCTURES -DRPC_STRUCTURES -include $NVKERN_SRC/src/common/sdk/nvidia/inc/nvtypes.h -I$NVKERN_SRC/src/nvidia/generated -I$NVKERN_SRC/src/common/inc -I$NVKERN_SRC/src/nvidia/inc -I$NVKERN_SRC/src/nvidia/interface/ -I$NVKERN_SRC/src/nvidia/inc/kernel -I$NVKERN_SRC/src/nvidia/inc/libraries -I$NVKERN_SRC/src/nvidia/arch/nvalloc/common/inc -I$NVKERN_SRC/kernel-open/nvidia-uvm -I$NVKERN_SRC/kernel-open/common/inc -I$NVKERN_SRC/src/common/sdk/nvidia/inc -I$NVKERN_SRC/src/nvidia/arch/nvalloc/unix/include -I$NVKERN_SRC/src/common/sdk/nvidia/inc/ctrl" \
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-o $BASE/nv/nv.py
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@@ -549,7 +550,6 @@ elif [ "$1" == "kfd" ]; then generate_kfd
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elif [ "$1" == "nv" ]; then generate_nv
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elif [ "$1" == "amd" ]; then generate_amd
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elif [ "$1" == "am" ]; then generate_am
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elif [ "$1" == "nvdrv" ]; then generate_nvdrv
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elif [ "$1" == "sqtt" ]; then generate_sqtt
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elif [ "$1" == "qcom" ]; then generate_qcom
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elif [ "$1" == "io_uring" ]; then generate_io_uring
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134
extra/nv_gpu_driver/pci_exp_table.h
Normal file
134
extra/nv_gpu_driver/pci_exp_table.h
Normal file
@@ -0,0 +1,134 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef PCIEXPTBL_H
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#define PCIEXPTBL_H
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#define NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_BASE 0x00
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#define NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_EXT 0xE0
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//
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// The VBIOS object comes from walking the PCI expansion code block
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// The following structure holds the expansion code format.
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//
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#define PCI_EXP_ROM_SIGNATURE 0xaa55
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#define PCI_EXP_ROM_SIGNATURE_NV 0x4e56 // "VN" in word format
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#define PCI_EXP_ROM_SIGNATURE_NV2 0xbb77
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#define IS_VALID_PCI_ROM_SIG(sig) ((sig == PCI_EXP_ROM_SIGNATURE) || \
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(sig == PCI_EXP_ROM_SIGNATURE_NV) || \
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(sig == PCI_EXP_ROM_SIGNATURE_NV2))
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#define OFFSETOF_PCI_EXP_ROM_SIG 0x0
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#define OFFSETOF_PCI_EXP_ROM_NBSI_DATA_OFFSET 0x16
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#define OFFSETOF_PCI_EXP_ROM_PCI_DATA_STRUCT_PTR 0x18
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#pragma pack(1)
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typedef struct _PCI_EXP_ROM_STANDARD
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{
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NvU16 sig; // 00h: ROM Signature 0xaa55
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NvU8 reserved [0x16]; // 02h: Reserved (processor architecture unique data)
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NvU16 pciDataStrucPtr; // 18h: Pointer to PCI Data Structure
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NvU32 sizeOfBlock; // 1Ah: <NBSI-specific appendage>
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} PCI_EXP_ROM_STANDARD, *PPCI_EXP_ROM_STANDARD;
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#pragma pack()
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#pragma pack(1)
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typedef struct _PCI_EXP_ROM_NBSI
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{
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NvU16 sig; // 00h: ROM Signature 0xaa55
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NvU8 reserved [0x14]; // 02h: Reserved (processor architecture unique data)
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NvU16 nbsiDataOffset; // 16h: Offset from header to NBSI image
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NvU16 pciDataStrucPtr; // 18h: Pointer to PCI Data Structure
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NvU32 sizeOfBlock; // 1Ah: <NBSI-specific appendage>
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} PCI_EXP_ROM_NBSI, *PPCI_EXP_ROM_NBSI;
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#pragma pack()
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typedef union _PCI_EXP_ROM {
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PCI_EXP_ROM_STANDARD standard;
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PCI_EXP_ROM_NBSI nbsi;
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} PCI_EXP_ROM, *PPCI_EXP_ROM;
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#define PCI_DATA_STRUCT_SIGNATURE 0x52494350 // "PCIR" in dword format
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#define PCI_DATA_STRUCT_SIGNATURE_NV 0x5344504E // "NPDS" in dword format
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#define PCI_DATA_STRUCT_SIGNATURE_NV2 0x53494752 // "RGIS" in dword format
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#define IS_VALID_PCI_DATA_SIG(sig) ((sig == PCI_DATA_STRUCT_SIGNATURE) || \
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(sig == PCI_DATA_STRUCT_SIGNATURE_NV) || \
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(sig == PCI_DATA_STRUCT_SIGNATURE_NV2))
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#define PCI_LAST_IMAGE NVBIT(7)
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#define PCI_ROM_IMAGE_BLOCK_SIZE 512U
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#define OFFSETOF_PCI_DATA_STRUCT_SIG 0x0
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#define OFFSETOF_PCI_DATA_STRUCT_VENDOR_ID 0x4
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#define OFFSETOF_PCI_DATA_STRUCT_LEN 0xa
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#define OFFSETOF_PCI_DATA_STRUCT_CLASS_CODE 0xd
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#define OFFSETOF_PCI_DATA_STRUCT_CODE_TYPE 0x14
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#define OFFSETOF_PCI_DATA_STRUCT_IMAGE_LEN 0x10
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#define OFFSETOF_PCI_DATA_STRUCT_LAST_IMAGE 0x15
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#pragma pack(1)
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typedef struct _PCI_DATA_STRUCT
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{
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NvU32 sig; // 00h: Signature, the string "PCIR" or NVIDIA's alternate "NPDS"
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NvU16 vendorID; // 04h: Vendor Identification
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NvU16 deviceID; // 06h: Device Identification
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NvU16 deviceListPtr; // 08h: Device List Pointer
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NvU16 pciDataStructLen; // 0Ah: PCI Data Structure Length
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NvU8 pciDataStructRev; // 0Ch: PCI Data Structure Revision
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NvU8 classCode[3]; // 0Dh: Class Code
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NvU16 imageLen; // 10h: Image Length (units of 512 bytes)
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NvU16 vendorRomRev; // 12h: Revision Level of the Vendor's ROM
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NvU8 codeType; // 14h: holds NBSI_OBJ_CODE_TYPE (0x70) and others
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NvU8 lastImage; // 15h: Last Image Indicator: bit7=1 is lastImage
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NvU16 maxRunTimeImageLen; // 16h: Maximum Run-time Image Length (units of 512 bytes)
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} PCI_DATA_STRUCT, *PPCI_DATA_STRUCT;
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#pragma pack()
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#define NV_PCI_DATA_EXT_SIG 0x4544504E // "NPDE" in dword format
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#define NV_PCI_DATA_EXT_REV_10 0x100 // 1.0
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#define NV_PCI_DATA_EXT_REV_11 0x101 // 1.1
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_SIG 0x0
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_LEN 0x6
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_REV 0x4
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_SUBIMAGE_LEN 0x8
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_LAST_IMAGE 0xa
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_FLAGS 0xb
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#define PCI_DATA_EXT_STRUCT_FLAGS_CHECKSUM_DISABLED 0x04
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#pragma pack(1)
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typedef struct _NV_PCI_DATA_EXT_STRUCT
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{
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NvU32 signature; // 00h: Signature, the string "NPDE"
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NvU16 nvPciDataExtRev; // 04h: NVIDIA PCI Data Extension Revision
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NvU16 nvPciDataExtLen; // 06h: NVIDIA PCI Data Extension Length
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NvU16 subimageLen; // 08h: Sub-image Length
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NvU8 privLastImage; // 0Ah: Private Last Image Indicator
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NvU8 flags; // 0Bh: Private images enabled if bit0=1
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} NV_PCI_DATA_EXT_STRUCT, *PNV_PCI_DATA_EXT_STRUCT;
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#pragma pack()
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#endif // PCIEXPTBL_H
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@@ -7357,6 +7357,113 @@ class struct_c__SA_FWSECLIC_FRTS_CMD(Structure):
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]
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FWSECLIC_FRTS_CMD = struct_c__SA_FWSECLIC_FRTS_CMD
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PCIEXPTBL_H = True # macro
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NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_BASE = 0x00 # macro
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NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_EXT = 0xE0 # macro
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PCI_EXP_ROM_SIGNATURE = 0xaa55 # macro
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PCI_EXP_ROM_SIGNATURE_NV = 0x4e56 # macro
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PCI_EXP_ROM_SIGNATURE_NV2 = 0xbb77 # macro
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def IS_VALID_PCI_ROM_SIG(sig): # macro
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return ((sig==0xaa55) or (sig==0x4e56) or (sig==0xbb77))
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OFFSETOF_PCI_EXP_ROM_SIG = 0x0 # macro
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OFFSETOF_PCI_EXP_ROM_NBSI_DATA_OFFSET = 0x16 # macro
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OFFSETOF_PCI_EXP_ROM_PCI_DATA_STRUCT_PTR = 0x18 # macro
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PCI_DATA_STRUCT_SIGNATURE = 0x52494350 # macro
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PCI_DATA_STRUCT_SIGNATURE_NV = 0x5344504E # macro
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PCI_DATA_STRUCT_SIGNATURE_NV2 = 0x53494752 # macro
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def IS_VALID_PCI_DATA_SIG(sig): # macro
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return ((sig==0x52494350) or (sig==0x5344504E) or (sig==0x53494752))
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# PCI_LAST_IMAGE = NVBIT ( 7 ) # macro
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PCI_ROM_IMAGE_BLOCK_SIZE = 512 # macro
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OFFSETOF_PCI_DATA_STRUCT_SIG = 0x0 # macro
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OFFSETOF_PCI_DATA_STRUCT_VENDOR_ID = 0x4 # macro
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OFFSETOF_PCI_DATA_STRUCT_LEN = 0xa # macro
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OFFSETOF_PCI_DATA_STRUCT_CLASS_CODE = 0xd # macro
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OFFSETOF_PCI_DATA_STRUCT_CODE_TYPE = 0x14 # macro
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OFFSETOF_PCI_DATA_STRUCT_IMAGE_LEN = 0x10 # macro
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OFFSETOF_PCI_DATA_STRUCT_LAST_IMAGE = 0x15 # macro
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NV_PCI_DATA_EXT_SIG = 0x4544504E # macro
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NV_PCI_DATA_EXT_REV_10 = 0x100 # macro
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NV_PCI_DATA_EXT_REV_11 = 0x101 # macro
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OFFSETOF_PCI_DATA_EXT_STRUCT_SIG = 0x0 # macro
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OFFSETOF_PCI_DATA_EXT_STRUCT_LEN = 0x6 # macro
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OFFSETOF_PCI_DATA_EXT_STRUCT_REV = 0x4 # macro
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OFFSETOF_PCI_DATA_EXT_STRUCT_SUBIMAGE_LEN = 0x8 # macro
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OFFSETOF_PCI_DATA_EXT_STRUCT_LAST_IMAGE = 0xa # macro
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OFFSETOF_PCI_DATA_EXT_STRUCT_FLAGS = 0xb # macro
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PCI_DATA_EXT_STRUCT_FLAGS_CHECKSUM_DISABLED = 0x04 # macro
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class struct__PCI_EXP_ROM_STANDARD(Structure):
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pass
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struct__PCI_EXP_ROM_STANDARD._pack_ = 1 # source:False
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struct__PCI_EXP_ROM_STANDARD._fields_ = [
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('sig', ctypes.c_uint16),
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('reserved', ctypes.c_ubyte * 22),
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('pciDataStrucPtr', ctypes.c_uint16),
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('sizeOfBlock', ctypes.c_uint32),
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]
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PCI_EXP_ROM_STANDARD = struct__PCI_EXP_ROM_STANDARD
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PPCI_EXP_ROM_STANDARD = ctypes.POINTER(struct__PCI_EXP_ROM_STANDARD)
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class struct__PCI_EXP_ROM_NBSI(Structure):
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pass
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struct__PCI_EXP_ROM_NBSI._pack_ = 1 # source:False
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struct__PCI_EXP_ROM_NBSI._fields_ = [
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('sig', ctypes.c_uint16),
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('reserved', ctypes.c_ubyte * 20),
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('nbsiDataOffset', ctypes.c_uint16),
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('pciDataStrucPtr', ctypes.c_uint16),
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('sizeOfBlock', ctypes.c_uint32),
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]
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PCI_EXP_ROM_NBSI = struct__PCI_EXP_ROM_NBSI
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PPCI_EXP_ROM_NBSI = ctypes.POINTER(struct__PCI_EXP_ROM_NBSI)
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class union__PCI_EXP_ROM(Union):
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_pack_ = 1 # source:False
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_fields_ = [
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('standard', PCI_EXP_ROM_STANDARD),
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('nbsi', PCI_EXP_ROM_NBSI),
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]
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PCI_EXP_ROM = union__PCI_EXP_ROM
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PPCI_EXP_ROM = ctypes.POINTER(union__PCI_EXP_ROM)
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class struct__PCI_DATA_STRUCT(Structure):
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pass
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struct__PCI_DATA_STRUCT._pack_ = 1 # source:False
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struct__PCI_DATA_STRUCT._fields_ = [
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('sig', ctypes.c_uint32),
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('vendorID', ctypes.c_uint16),
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('deviceID', ctypes.c_uint16),
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('deviceListPtr', ctypes.c_uint16),
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('pciDataStructLen', ctypes.c_uint16),
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('pciDataStructRev', ctypes.c_ubyte),
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('classCode', ctypes.c_ubyte * 3),
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('imageLen', ctypes.c_uint16),
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('vendorRomRev', ctypes.c_uint16),
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('codeType', ctypes.c_ubyte),
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('lastImage', ctypes.c_ubyte),
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('maxRunTimeImageLen', ctypes.c_uint16),
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]
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PCI_DATA_STRUCT = struct__PCI_DATA_STRUCT
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PPCI_DATA_STRUCT = ctypes.POINTER(struct__PCI_DATA_STRUCT)
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class struct__NV_PCI_DATA_EXT_STRUCT(Structure):
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pass
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struct__NV_PCI_DATA_EXT_STRUCT._pack_ = 1 # source:False
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struct__NV_PCI_DATA_EXT_STRUCT._fields_ = [
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('signature', ctypes.c_uint32),
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('nvPciDataExtRev', ctypes.c_uint16),
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('nvPciDataExtLen', ctypes.c_uint16),
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('subimageLen', ctypes.c_uint16),
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('privLastImage', ctypes.c_ubyte),
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('flags', ctypes.c_ubyte),
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]
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NV_PCI_DATA_EXT_STRUCT = struct__NV_PCI_DATA_EXT_STRUCT
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PNV_PCI_DATA_EXT_STRUCT = ctypes.POINTER(struct__NV_PCI_DATA_EXT_STRUCT)
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__all__ = \
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['ACPI_DATA', 'ACPI_DSM_CACHE', 'ACPI_DSM_FUNCTION_COUNT',
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'ACPI_DSM_FUNCTION_CURRENT', 'ACPI_DSM_FUNCTION_GPS',
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@@ -7480,12 +7587,16 @@ __all__ = \
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'NVDM_TYPE_UEFI_XTL_DEBUG_INTR',
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'NVGPU_ENGINE_CAPS_MASK_ARRAY_MAX', 'NVGPU_ENGINE_CAPS_MASK_BITS',
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'NV_ACPI_GENERIC_FUNC_COUNT',
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'NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_BASE',
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'NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_EXT',
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'NV_BIT_FALCON_UCODE_DESC_HEADER_VDESC_FLAGS_VERSION_AVAILABLE',
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'NV_BIT_FALCON_UCODE_DESC_HEADER_VDESC_FLAGS_VERSION_UNAVAILABLE',
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'NV_BIT_FALCON_UCODE_DESC_HEADER_VDESC_VERSION_V1',
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'NV_BIT_FALCON_UCODE_DESC_HEADER_VDESC_VERSION_V2',
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'NV_BIT_FALCON_UCODE_DESC_HEADER_VDESC_VERSION_V3',
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'NV_BIT_FALCON_UCODE_DESC_HEADER_VDESC_VERSION_V4',
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'NV_PCI_DATA_EXT_REV_10', 'NV_PCI_DATA_EXT_REV_11',
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'NV_PCI_DATA_EXT_SIG', 'NV_PCI_DATA_EXT_STRUCT',
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'NV_RPC_UPDATE_PDE_BAR_1', 'NV_RPC_UPDATE_PDE_BAR_2',
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'NV_RPC_UPDATE_PDE_BAR_INVALID', 'NV_RPC_UPDATE_PDE_BAR_TYPE',
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'NV_RPC_UPDATE_PDE_BAR_TYPE__enumvalues',
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@@ -7775,8 +7886,31 @@ __all__ = \
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'NV_VGPU_PTE_64_INDEX_SHIFT', 'NV_VGPU_PTE_64_PAGE_SIZE',
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'NV_VGPU_PTE_64_SIZE', 'NV_VGPU_PTE_INDEX_MASK',
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'NV_VGPU_PTE_INDEX_SHIFT', 'NV_VGPU_PTE_PAGE_SIZE',
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'NV_VGPU_PTE_SIZE', 'PACKED_REGISTRY_ENTRY',
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'PACKED_REGISTRY_TABLE', 'REGISTRY_TABLE_ENTRY_TYPE_BINARY',
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'NV_VGPU_PTE_SIZE', 'OFFSETOF_PCI_DATA_EXT_STRUCT_FLAGS',
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'OFFSETOF_PCI_DATA_EXT_STRUCT_LAST_IMAGE',
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'OFFSETOF_PCI_DATA_EXT_STRUCT_LEN',
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'OFFSETOF_PCI_DATA_EXT_STRUCT_REV',
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'OFFSETOF_PCI_DATA_EXT_STRUCT_SIG',
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'OFFSETOF_PCI_DATA_EXT_STRUCT_SUBIMAGE_LEN',
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'OFFSETOF_PCI_DATA_STRUCT_CLASS_CODE',
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'OFFSETOF_PCI_DATA_STRUCT_CODE_TYPE',
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'OFFSETOF_PCI_DATA_STRUCT_IMAGE_LEN',
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'OFFSETOF_PCI_DATA_STRUCT_LAST_IMAGE',
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'OFFSETOF_PCI_DATA_STRUCT_LEN', 'OFFSETOF_PCI_DATA_STRUCT_SIG',
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'OFFSETOF_PCI_DATA_STRUCT_VENDOR_ID',
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'OFFSETOF_PCI_EXP_ROM_NBSI_DATA_OFFSET',
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'OFFSETOF_PCI_EXP_ROM_PCI_DATA_STRUCT_PTR',
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'OFFSETOF_PCI_EXP_ROM_SIG', 'PACKED_REGISTRY_ENTRY',
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'PACKED_REGISTRY_TABLE', 'PCIEXPTBL_H',
|
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'PCI_DATA_EXT_STRUCT_FLAGS_CHECKSUM_DISABLED', 'PCI_DATA_STRUCT',
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'PCI_DATA_STRUCT_SIGNATURE', 'PCI_DATA_STRUCT_SIGNATURE_NV',
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'PCI_DATA_STRUCT_SIGNATURE_NV2', 'PCI_EXP_ROM',
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'PCI_EXP_ROM_NBSI', 'PCI_EXP_ROM_SIGNATURE',
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'PCI_EXP_ROM_SIGNATURE_NV', 'PCI_EXP_ROM_SIGNATURE_NV2',
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'PCI_EXP_ROM_STANDARD', 'PCI_ROM_IMAGE_BLOCK_SIZE',
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'PNV_PCI_DATA_EXT_STRUCT', 'PPCI_DATA_STRUCT', 'PPCI_EXP_ROM',
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'PPCI_EXP_ROM_NBSI', 'PPCI_EXP_ROM_STANDARD',
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'REGISTRY_TABLE_ENTRY_TYPE_BINARY',
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'REGISTRY_TABLE_ENTRY_TYPE_DWORD',
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'REGISTRY_TABLE_ENTRY_TYPE_STRING',
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'REGISTRY_TABLE_ENTRY_TYPE_UNKNOWN', 'RM_ENGINE_TYPE',
|
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@@ -8343,6 +8477,8 @@ __all__ = \
|
||||
'struct_UpdateBarPde_v15_00',
|
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'struct_VIRTUAL_DISPLAY_GET_MAX_RESOLUTION_PARAMS',
|
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'struct_VIRTUAL_DISPLAY_GET_NUM_HEADS_PARAMS',
|
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'struct__NV_PCI_DATA_EXT_STRUCT', 'struct__PCI_DATA_STRUCT',
|
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'struct__PCI_EXP_ROM_NBSI', 'struct__PCI_EXP_ROM_STANDARD',
|
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'struct_alloc_object_FERMI_CONTEXT_SHARE_A_v04_00',
|
||||
'struct_alloc_object_FERMI_VASPACE_A_v03_00',
|
||||
'struct_alloc_object_GF100_DISP_SW_v03_00',
|
||||
@@ -8595,7 +8731,7 @@ __all__ = \
|
||||
'union_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04',
|
||||
'union_NV2080_CTRL_GRMGR_GR_FS_INFO_QUERY_DATA_v1A_1D',
|
||||
'union_NV2080_CTRL_INTERNAL_PFM_REQ_HNDLR_STATE_SYNC_DATA_type_v21_04',
|
||||
'union_alloc_object_params_v25_08',
|
||||
'union__PCI_EXP_ROM', 'union_alloc_object_params_v25_08',
|
||||
'union_alloc_object_params_v26_00',
|
||||
'union_alloc_object_params_v27_00',
|
||||
'union_alloc_object_params_v29_06', 'union_c__SA_GspFwWprMeta_0',
|
||||
|
||||
@@ -89,10 +89,18 @@ class NV_FLCN(NV_IP):
|
||||
self.prep_booter()
|
||||
|
||||
def prep_ucode(self):
|
||||
expansion_rom_off, bit_addr = {"GA": 0x16600, "AD": 0x14e00}[self.nvdev.chip_name[:2]], 0x1b0
|
||||
vbios_bytes = bytes(array.array('I', self.nvdev.mmio[0x00300000//4:(0x00300000+0x98e00)//4]))
|
||||
vbios_bytes, vbios_off = memoryview(bytes(array.array('I', self.nvdev.mmio[0x00300000//4:(0x00300000+0x100000)//4]))), 0
|
||||
while True:
|
||||
pci_blck = vbios_bytes[vbios_off + nv.OFFSETOF_PCI_EXP_ROM_PCI_DATA_STRUCT_PTR:].cast('H')[0]
|
||||
imglen = vbios_bytes[vbios_off + pci_blck + nv.OFFSETOF_PCI_DATA_STRUCT_IMAGE_LEN:].cast('H')[0] * nv.PCI_ROM_IMAGE_BLOCK_SIZE
|
||||
match vbios_bytes[vbios_off + pci_blck + nv.OFFSETOF_PCI_DATA_STRUCT_CODE_TYPE]:
|
||||
case nv.NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_BASE: block_size = imglen
|
||||
case nv.NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_EXT:
|
||||
expansion_rom_off = vbios_off - block_size
|
||||
break
|
||||
vbios_off += imglen
|
||||
|
||||
bit_header = nv.BIT_HEADER_V1_00.from_buffer_copy(vbios_bytes[bit_addr:bit_addr + ctypes.sizeof(nv.BIT_HEADER_V1_00)])
|
||||
bit_header = nv.BIT_HEADER_V1_00.from_buffer_copy(vbios_bytes[(bit_addr:=0x1b0):bit_addr + ctypes.sizeof(nv.BIT_HEADER_V1_00)])
|
||||
assert bit_header.Signature == 0x00544942, f"Invalid BIT header signature {hex(bit_header.Signature)}"
|
||||
|
||||
for i in range(bit_header.TokenEntries):
|
||||
|
||||
Reference in New Issue
Block a user