github/tinygrad
1
1
Fork 0
mirror of https://github.com/tinygrad/tinygrad.git synced 2026-04-29 03:00:14 -04:00
Code Issues Packages Projects Releases Wiki Activity

update test_assign_slice_then_read (#14687)

Browse Source 
passes locally now
This commit is contained in:
chenyu
2026-02-11 15:02:44 -05:00
committed by GitHub
parent 7465b22ba0
commit cbbc2fdea5
1 changed files with 1 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
test/unit/test_assign.py
View File

@@ -535,16 +535,10 @@ class TestAssign(unittest.TestCase):
This is the KV cache pattern from llm.py.
"""
v_pos = Variable("pos", 0, 3).bind(0)
# without .realize() after assign, the read doesn't see the assigned values
cache = Tensor.zeros(4, 4).contiguous().realize()
cache[v_pos:v_pos+1, :].assign(Tensor.ones(1, 4))
self.assertEqual(cache.sum().item(), 0.0) # should be 4.0!
self.assertEqual(cache.sum().item(), 4.0)
# TODO: remove .realize() workaround once assign-read dependency is fixed
cache2 = Tensor.zeros(4, 4).contiguous().realize()
cache2[v_pos:v_pos+1, :].assign(Tensor.ones(1, 4)).realize()
self.assertEqual(cache2.sum().item(), 4.0)
class TestAssignOrdering(unittest.TestCase):
"""Tests for complex assign orderings that could differ between lazy and eager execution.