lil cleanup

This commit is contained in:
George Hotz
2025-11-16 09:48:19 -08:00
parent 5fba9ccb85
commit ddaaeb16de
3 changed files with 16 additions and 13 deletions

View File

@@ -37,7 +37,7 @@ def save_sqtt():
if isinstance(e, ProfileSQTTEvent):
print(replace(e, blob=b''))
if e.se == 0:
parse_sqtt_print_packets(e.blob, filter=[0xf, 0x11, 0x12, 0x14, 0x16])
parse_sqtt_print_packets(e.blob, filter=[0xf, 0x11, 0x12, 0x14])
template = """.text
@@ -88,10 +88,10 @@ def run_asm(src):
if __name__ == "__main__":
with save_sqtt() as sqtt:
run_asm([
"v_rcp_f32 v1, v0"
#"v_add_f32_e32 v1 v0 v0",
#"v_rcp_f32 v1, v0"
"v_add_f32_e32 v1 v0 v0",
#"v_add_f32_e32 v1 v0 v0",
#"v_add_f32_e32 v3 v2 v2",
#"v_add_f32_e32 v2 v1 v1",
#"s_nop 1"
]*1)
]*10)

View File

@@ -1,7 +1,5 @@
import pickle
from hexdump import hexdump
from extra.sqtt.roc import decode, ProfileSQTTEvent
from tinygrad.helpers import getenv
# Instruction packets (one per ISA op)
# NOTE: these are bad guesses and may be wrong! feel free to update if you know better
@@ -467,18 +465,22 @@ def parse_sqtt_print_packets(data: bytes, max_tokens: int = 100000, filter=None)
if two_bits == 1:
flags |= 0x01
# Common 36-bit field at bits [12..47]
val36 = (reg >> 12) & ((1 << 36) - 1)
if (reg & 0x200) == 0:
# delta mode: 36-bit delta at bits [12..47]
delta = (reg >> 12) & ((1 << 36) - 1)
# delta mode: add 36-bit delta to time
delta = val36
time += delta
note = "0x16-delta"
else:
# marker mode if bit9==1 and bit8==0
if (reg & 0x100) == 0:
val = (reg >> 12) & ((1 << 36) - 1)
# marker / other modes: no time advance
if (reg & 0x100) == 0 and val36 != 0:
# real marker: bit9=1, bit8=0, non-zero payload
delta = 0
note = f"0x16-marker val=0x{val:x}"
note = f"0x16-marker val=0x{val36:x}"
else:
# "other" 0x16 variants, ignored for timing
delta = 0
note = "0x16-other"
else:

View File

@@ -5,7 +5,8 @@ from typing import Generator
from tinygrad.uop.ops import UOp, UPat, Ops, PatternMatcher, TrackedPatternMatcher, graph_rewrite, track_rewrites, TRACK_MATCH_STATS, profile_matches
from tinygrad.uop.symbolic import sym
from tinygrad.dtype import dtypes
from tinygrad.helpers import PROFILE, colored, ansistrip, flatten, TracingKey, ProfileRangeEvent, ProfileEvent, Context, cpu_events, profile_marker, VIZ
from tinygrad.helpers import PROFILE, colored, ansistrip, flatten, TracingKey, ProfileRangeEvent, ProfileEvent, Context, cpu_events, profile_marker
from tinygrad.helpers import VIZ
from tinygrad.device import Buffer
@track_rewrites(name=True)