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Author SHA1 Message Date
Francis Lata
4bebe61a9c add dataloader + test 2024-10-16 15:38:47 -04:00
Francis Lata
3d857d758e Merge branch 'master' into retinanet_mlperf 2024-10-16 15:36:37 -04:00
chenyu
9d109c5382 remove outdated symbolic comments (#7105) 2024-10-16 14:51:59 -04:00
Francis Lata
90eff347e2 tinytqdm write support (#6359) 
* add write support

* add test

* update test case to compare write outputs

* assert final write output

* flush when using write

* update write logic

* Revert "update write logic"

This reverts commit 5e0e611b46.

---------

Co-authored-by: chenyu <chenyu@fastmail.com>
 2024-10-16 14:51:41 -04:00
nimlgen
d1094fce5e amd reports on hang (#7101) 2024-10-16 21:32:44 +03:00
nimlgen
39ab67e9ef beam capture and replay in fuzz (#7099) 
* beam capture and reply in fuzz

* clean a bit
 2024-10-16 20:26:58 +03:00
George Hotz
eac58eaaba no SIGALRM on windows [pr] (#7104) 2024-10-17 00:21:04 +08:00
qazal
9d5342976e skip TestSetitem.test_setitem_inplace_operator (#7103) 2024-10-16 18:59:08 +03:00
nimlgen
83e7dbd89e nv fix reallocation local memory when oom (#7098) 2024-10-16 18:17:50 +03:00
George Hotz
cd61e81f55 beautiful mnist works on windows (#7100) 
* beautiful mnist works on windows [pr]

* add comment for that (no pr)
 2024-10-16 23:00:05 +08:00
Francis Lata
498141c579 Merge branch 'master' into retinanet_mlperf 2024-10-16 10:14:39 -04:00
qazal
fc306ba89d simple to_uop [pr] (#7096) 
* simple to_uop [pr]

* fix metadata
 2024-10-16 15:52:11 +03:00
qazal
568a4b5d92 viz touchups [pr] (#7095) 
* viz touchups [pr]

* check if port busy

* url
 2024-10-16 15:14:47 +03:00
qazal
6172b42140 all views are UOps.VIEW [pr] (#7090) 
* all views are UOps.VIEW

* is it you

* don't recreate st uop [pr]

* first rewrite all elementwise
 2024-10-16 13:46:33 +03:00
qazal
6acda43a2c test a rewrite of permuted reduce [pr] (#7093) 
* test a rewrite of permuted reduce [pr]

* addd rewrite tracker

* expected

* passes
 2024-10-16 12:49:54 +03:00
qazal
56fbd408a1 viz print the sink tree as it's rewritten [pr] (#7094) 2024-10-16 11:38:27 +03:00
qazal
aadc95c2b0 don't recreate st uop [pr] (#7092) 2024-10-16 08:43:19 +03:00
qazal
9c9c241e58 track et in viz [pr] (#7088) 2024-10-16 07:53:08 +03:00
qazal
40f33c110b big graph var_vals as rewrite context (#7007) 
* var_vals as rewrite context

* no default arg

* add st var_vals

* delete some stuff

* add the rewrite rule again

* extra

* this whole part is preschedule

* test with a second context

* redo

* i always forget tensor variable
 2024-10-16 07:31:44 +03:00
qazal
390171d686 delete SAVE_SCHEDULE=1 [pr] (#7087) 2024-10-16 07:13:20 +03:00
George Hotz
3169cb386d remove graph [pr] (#7085) 2024-10-16 11:40:07 +08:00
qazal
53586eac56 late assert post permuted assign [pr] (#7084) 
* late assert post permuted assign [pr]

* a lil earlier
 2024-10-16 06:26:04 +03:00
George Hotz
023b77cc6e move MultiGraphRunner logic to GraphRunner [pr] (#7083) 
* move MultiGraphRunner logic to GraphRunner [pr]

* _access_resources
 2024-10-16 11:04:30 +08:00
qazal
207fbc4bc7 cleanup view on reduce [pr] (#7081) 2024-10-16 05:22:52 +03:00
qazal
067b35e915 add UOp.r [pr] (#7080) 2024-10-16 05:06:02 +03:00
George Hotz
26df50cf43 move memory_planner to memory.py [pr] (#7079) 2024-10-16 10:04:35 +08:00
qazal
bddba5897a generic elementwise view rewrite rule + merge_views (#7078) 
* generic elementwise view rewrite rule + merge_views [pr]

* no pr, views merge
 2024-10-16 04:36:21 +03:00
qazal
fb29de6cc3 split schedule to view_left and view_right [pr] (#7077) 
* split schedule to view_left and view_right [pr]

* move valid
 2024-10-16 03:39:38 +03:00
chenyu
8601115976 _get_chain -> split_uop [pr] (#7075) 2024-10-15 17:31:25 -04:00
chenyu
e136cea027 cleanups around idx_given_valid [pr] (#7074) 2024-10-15 16:59:01 -04:00
qazal
545e79969f always record matches in viz (#7073) 
* always record matches in viz

* simpler
 2024-10-15 23:03:12 +03:00
nimlgen
b025495e5c fuzz nv vs cuda (#7066) 
* fuzz nv vs cuda

* fixes

* smth

* um

* cmp the same

* dnrt

* correct gpfifo scan

* fix
 2024-10-15 22:22:40 +03:00
qazal
8ff6514ba3 delete extra/ops.py [pr] (#7072) 2024-10-15 22:14:21 +03:00
qazal
09de958855 move print_diff to test/helpers (#7071) 2024-10-15 22:00:39 +03:00
qazal
1a45e94f5d viz late to_json [pr] (#7070) 2024-10-15 21:36:45 +03:00
qazal
52d8afde2b new viz unittests, isolate the ctx bug (#7069) 
* start new test_viz

* test_rewrite_twice

* test_rewrite_with_ctx

* add back some of the old tests

* lints
 2024-10-15 18:53:56 +03:00
nimlgen
9f00eacde5 nv tagged memory + resnet failed kernel (#7061) 
* nv tagged memory

* linter

* metal fix?
 2024-10-15 18:19:58 +03:00
hikettei
0f0c3934b1 refactor: improved the consistency of the frexp in transcendental (#7060) 
* clarify the intetntion of bias

* Improved the consistency of m2

* int16

---------

Co-authored-by: chenyu <chenyu@fastmail.com>
 2024-10-15 10:18:38 -04:00
chenyu
d12c87dc8e use ubuntu-22.04 in CI (#7068) 
ubuntu-latest points to 24.04 now, maybe it's this?
 2024-10-15 09:44:59 -04:00
nimlgen
586ff4c910 nv record uvm mappings (#7059) 
* nv record uvm mappings

* linteeer

* smth

* ooops
 2024-10-15 00:12:49 +03:00
chenyu
2008bac6bf use validhack logic to rewrite buffer idx (#6740) 
* use validhack logic to rewrite buffer idx

saved a whopping one mod in the conv backward kernel...

* cleanup more
 2024-10-14 16:47:31 -04:00
qazal
968a79b56c lint viz with eslint (#6988) 
* lint viz

* green

* move config

* space

* meh, laterg
 2024-10-14 22:40:56 +03:00
chenyu
a99e42cf2f clean up test_uop_symbolic.py (#7058) 
enable more tests and remove dead tests
 2024-10-14 15:35:58 -04:00
nimlgen
8094340221 nv print info about faults (#7057) 
* nv print info about faults

* unrelated changes

* nv_gpu.GT200_DEBUGGER in mockgpu

* regen with ocrrect version

* spacing
 2024-10-14 21:49:38 +03:00
Francis Lata
b2ac1a4b98 create mock data samples for test 2024-10-14 13:35:18 -04:00
Francis Lata
2cb4f1d45f Merge branch 'master' into retinanet_mlperf 2024-10-14 12:15:12 -04:00
chenyu
fbaab30fe3 add timing to fuzz_linearizer (#7056) 
and applied smaller FUZZ_MAX_SIZE. this is getting quite slow in CI
 2024-10-14 11:57:41 -04:00
chenyu
0d2462cbdf use more resolve in View merge add [pr] (#7055) 2024-10-14 11:31:13 -04:00
qazal
8428244c30 gates are always bool [pr] (#7054) 2024-10-14 17:55:08 +03:00
qazal
7a28d50320 small st_fixup changes [pr] (#7053) 2024-10-14 16:53:10 +03:00