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135 lines
6.0 KiB
C
135 lines
6.0 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef PCIEXPTBL_H
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#define PCIEXPTBL_H
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#define NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_BASE 0x00
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#define NV_BCRT_HASH_INFO_BASE_CODE_TYPE_VBIOS_EXT 0xE0
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//
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// The VBIOS object comes from walking the PCI expansion code block
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// The following structure holds the expansion code format.
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//
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#define PCI_EXP_ROM_SIGNATURE 0xaa55
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#define PCI_EXP_ROM_SIGNATURE_NV 0x4e56 // "VN" in word format
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#define PCI_EXP_ROM_SIGNATURE_NV2 0xbb77
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#define IS_VALID_PCI_ROM_SIG(sig) ((sig == PCI_EXP_ROM_SIGNATURE) || \
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(sig == PCI_EXP_ROM_SIGNATURE_NV) || \
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(sig == PCI_EXP_ROM_SIGNATURE_NV2))
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#define OFFSETOF_PCI_EXP_ROM_SIG 0x0
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#define OFFSETOF_PCI_EXP_ROM_NBSI_DATA_OFFSET 0x16
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#define OFFSETOF_PCI_EXP_ROM_PCI_DATA_STRUCT_PTR 0x18
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#pragma pack(1)
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typedef struct _PCI_EXP_ROM_STANDARD
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{
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NvU16 sig; // 00h: ROM Signature 0xaa55
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NvU8 reserved [0x16]; // 02h: Reserved (processor architecture unique data)
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NvU16 pciDataStrucPtr; // 18h: Pointer to PCI Data Structure
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NvU32 sizeOfBlock; // 1Ah: <NBSI-specific appendage>
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} PCI_EXP_ROM_STANDARD, *PPCI_EXP_ROM_STANDARD;
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#pragma pack()
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#pragma pack(1)
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typedef struct _PCI_EXP_ROM_NBSI
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{
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NvU16 sig; // 00h: ROM Signature 0xaa55
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NvU8 reserved [0x14]; // 02h: Reserved (processor architecture unique data)
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NvU16 nbsiDataOffset; // 16h: Offset from header to NBSI image
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NvU16 pciDataStrucPtr; // 18h: Pointer to PCI Data Structure
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NvU32 sizeOfBlock; // 1Ah: <NBSI-specific appendage>
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} PCI_EXP_ROM_NBSI, *PPCI_EXP_ROM_NBSI;
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#pragma pack()
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typedef union _PCI_EXP_ROM {
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PCI_EXP_ROM_STANDARD standard;
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PCI_EXP_ROM_NBSI nbsi;
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} PCI_EXP_ROM, *PPCI_EXP_ROM;
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#define PCI_DATA_STRUCT_SIGNATURE 0x52494350 // "PCIR" in dword format
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#define PCI_DATA_STRUCT_SIGNATURE_NV 0x5344504E // "NPDS" in dword format
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#define PCI_DATA_STRUCT_SIGNATURE_NV2 0x53494752 // "RGIS" in dword format
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#define IS_VALID_PCI_DATA_SIG(sig) ((sig == PCI_DATA_STRUCT_SIGNATURE) || \
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(sig == PCI_DATA_STRUCT_SIGNATURE_NV) || \
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(sig == PCI_DATA_STRUCT_SIGNATURE_NV2))
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#define PCI_LAST_IMAGE NVBIT(7)
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#define PCI_ROM_IMAGE_BLOCK_SIZE 512U
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#define OFFSETOF_PCI_DATA_STRUCT_SIG 0x0
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#define OFFSETOF_PCI_DATA_STRUCT_VENDOR_ID 0x4
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#define OFFSETOF_PCI_DATA_STRUCT_LEN 0xa
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#define OFFSETOF_PCI_DATA_STRUCT_CLASS_CODE 0xd
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#define OFFSETOF_PCI_DATA_STRUCT_CODE_TYPE 0x14
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#define OFFSETOF_PCI_DATA_STRUCT_IMAGE_LEN 0x10
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#define OFFSETOF_PCI_DATA_STRUCT_LAST_IMAGE 0x15
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#pragma pack(1)
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typedef struct _PCI_DATA_STRUCT
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{
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NvU32 sig; // 00h: Signature, the string "PCIR" or NVIDIA's alternate "NPDS"
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NvU16 vendorID; // 04h: Vendor Identification
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NvU16 deviceID; // 06h: Device Identification
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NvU16 deviceListPtr; // 08h: Device List Pointer
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NvU16 pciDataStructLen; // 0Ah: PCI Data Structure Length
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NvU8 pciDataStructRev; // 0Ch: PCI Data Structure Revision
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NvU8 classCode[3]; // 0Dh: Class Code
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NvU16 imageLen; // 10h: Image Length (units of 512 bytes)
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NvU16 vendorRomRev; // 12h: Revision Level of the Vendor's ROM
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NvU8 codeType; // 14h: holds NBSI_OBJ_CODE_TYPE (0x70) and others
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NvU8 lastImage; // 15h: Last Image Indicator: bit7=1 is lastImage
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NvU16 maxRunTimeImageLen; // 16h: Maximum Run-time Image Length (units of 512 bytes)
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} PCI_DATA_STRUCT, *PPCI_DATA_STRUCT;
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#pragma pack()
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#define NV_PCI_DATA_EXT_SIG 0x4544504E // "NPDE" in dword format
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#define NV_PCI_DATA_EXT_REV_10 0x100 // 1.0
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#define NV_PCI_DATA_EXT_REV_11 0x101 // 1.1
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_SIG 0x0
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_LEN 0x6
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_REV 0x4
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_SUBIMAGE_LEN 0x8
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_LAST_IMAGE 0xa
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#define OFFSETOF_PCI_DATA_EXT_STRUCT_FLAGS 0xb
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#define PCI_DATA_EXT_STRUCT_FLAGS_CHECKSUM_DISABLED 0x04
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#pragma pack(1)
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typedef struct _NV_PCI_DATA_EXT_STRUCT
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{
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NvU32 signature; // 00h: Signature, the string "NPDE"
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NvU16 nvPciDataExtRev; // 04h: NVIDIA PCI Data Extension Revision
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NvU16 nvPciDataExtLen; // 06h: NVIDIA PCI Data Extension Length
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NvU16 subimageLen; // 08h: Sub-image Length
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NvU8 privLastImage; // 0Ah: Private Last Image Indicator
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NvU8 flags; // 0Bh: Private images enabled if bit0=1
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} NV_PCI_DATA_EXT_STRUCT, *PNV_PCI_DATA_EXT_STRUCT;
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#pragma pack()
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#endif // PCIEXPTBL_H
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