Adjust 5.7.0 highlights (#2473)

* adjust 5.7.0 highlights

* adjust important highlights phrasing

.github/CODEOWNERS

@@ -0,0 +1 @@
+* @saadrahim @Rmalavally @amd-aakash @zhang2amd @jlgreathouse @samjwu @MathiasMagnus

.github/dependabot.yml

@@ -0,0 +1,12 @@
+# To get started with Dependabot version updates, you'll need to specify which
+# package ecosystems to update and where the package manifests are located.
+# Please see the documentation for all configuration options:
+# https://docs.github.com/github/administering-a-repository/configuration-options-for-dependency-updates
+
+version: 2
+updates:
+  - package-ecosystem: "pip" # See documentation for possible values
+    directory: "/docs/sphinx" # Location of package manifests
+    open-pull-requests-limit: 10
+    schedule:
+      interval: "daily"

.github/workflows/linting.yml

@@ -0,0 +1,20 @@
+name: Linting
+
+on:
+  push:
+    branches: 
+    - develop
+    - main
+    - 'docs/*'
+    - 'roc**'
+  pull_request:
+    branches: 
+    - develop
+    - main
+    - 'docs/*'
+    - 'roc**'
+
+jobs:
+  call-workflow-passing-data:
+    name: Documentation
+    uses: RadeonOpenCompute/rocm-docs-core/.github/workflows/linting.yml@develop

.gitignore

@@ -0,0 +1,18 @@
+.venv
+.vscode
+build
+
+# documentation artifacts
+_build/
+_images/
+_static/
+_templates/
+_toc.yml
+docBin/
+_doxygen/
+_readthedocs/
+
+# avoid duplicating contributing.md due to conf.py
+docs/contributing.md
+docs/release.md
+docs/CHANGELOG.md

.markdownlint-cli2.yaml

@@ -0,0 +1,14 @@
+config:
+  default: true
+  MD013: false
+  MD026:
+    punctuation: '.,;:!'
+  MD029:
+    style: ordered
+  MD033: false
+  MD034: false
+  MD041: false
+ignores:
+  - CHANGELOG.md
+  - "{,docs/}{RELEASE,release}.md"
+  - tools/autotag/templates/**/*.md

.readthedocs.yaml

@@ -0,0 +1,18 @@
+# Read the Docs configuration file
+# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
+
+version: 2
+
+sphinx:
+   configuration: docs/conf.py
+
+formats: [htmlzip, pdf, epub]
+
+python:
+   install:
+   - requirements: docs/sphinx/requirements.txt
+
+build:
+   os: ubuntu-20.04
+   tools:
+      python: "3.8"

.wordlist.txt

@@ -0,0 +1,122 @@
+# building
+matchers
+# file_reorg
+FHS
+incrementing
+Filesystem
+filesystem
+rocm
+# gpu_aware_mpi
+DMA
+GDR
+HCA
+MPI
+MVAPICH
+Mellanox's
+NIC
+OFED
+OSU
+OpenFabrics
+PeerDirect
+RDMA
+UCX
+ib_core
+# isv_deployment_win
+ABI
+# linear algebra
+LAPACK
+MMA
+backends
+cuSOLVER
+cuSPARSE
+# mi200_performance_counters
+ALU
+Arb
+CP
+CPC
+CPF
+CSC
+CSn
+DW
+DWORD
+GDS
+GMI
+GPR
+GRBM
+IOP
+LDS
+MEM
+MFMA
+Noncoherently
+Qcycles
+RW
+Req
+SALU
+SCA
+SENDMSG
+SGPRs
+SMEM
+SPI
+SQs
+TCA
+TCC
+TCI
+TCIU
+TCP
+TCR
+TrapStatus
+UC
+UTCL
+Uncached
+VALU
+VMEM
+VSkipped
+Workgroups
+Writebacks
+addr
+alloc
+cmd
+coalescable
+csn
+endpgm
+inflight
+mtypes
+perfcounter
+preq
+req
+sL
+sendmsg
+tagram
+tg
+uncached
+vL
+workgroups
+writeback
+writebacks
+wrreq
+# openmp
+ICV
+Multithreaded
+# tuning_guides
+BMC
+DGEMM
+HPCG
+HPL
+IOPM
+# windows
+SKU
+SKUs
+PowerShell
+UAC
+# pytorch_install
+kdb
+precompiled
+# gpu_os_support
+HWE
+el
+# using_gpu_sanitizer
+LSAN
+deallocation
+detections
+tracebacks
+workgroup

CONTRIBUTING.md

@@ -0,0 +1,71 @@
+# Contributing to ROCm Docs
+
+AMD values and encourages the ROCm community to contribute to our code and
+documentation. This repository is focused on ROCm documentation and this
+contribution guide describes the recommended method for creating and modifying our
+documentation.
+
+While interacting with ROCm Documentation, we encourage you to be polite and
+respectful in your contributions, content or otherwise. Authors, maintainers of
+these docs act on good intentions and to the best of their knowledge.
+Keep that in mind while you engage. Should you have issues with contributing
+itself, refer to
+[discussions](https://github.com/RadeonOpenCompute/ROCm/discussions) on the
+GitHub repository.
+
+For additional information on documentation functionalities,
+see the user and developer guides for rocm-docs-core
+at {doc}`rocm-docs-core documentation <rocm-docs-core:index>`.
+
+## Supported Formats
+
+Our documentation includes both Markdown and RST files. Markdown is encouraged
+over RST due to the lower barrier to participation. GitHub-flavored Markdown is preferred
+for all submissions as it renders accurately on our GitHub repositories. For existing documentation,
+[MyST](https://myst-parser.readthedocs.io/en/latest/intro.html) Markdown
+is used to implement certain features unsupported in GitHub Markdown. This is
+not encouraged for new documentation. AMD will transition
+to stricter use of GitHub-flavored Markdown with a few caveats. ROCm documentation
+also uses [Sphinx Design](https://sphinx-design.readthedocs.io/en/latest/index.html)
+in our Markdown and RST files. We also use Breathe syntax for Doxygen documentation
+in our Markdown files. See
+[GitHub](https://docs.github.com/en/get-started/writing-on-github/getting-started-with-writing-and-formatting-on-github)'s
+guide on writing and formatting on GitHub as a starting point.
+
+ROCm documentation adds additional requirements to Markdown and RST based files
+as follows:
+
+- Level one headers are only used for page titles. There must be only one level
+  1 header per file for both Markdown and Restructured Text.
+- Pass [markdownlint](https://github.com/markdownlint/markdownlint) check via
+  our automated GitHub action on a Pull Request (PR).
+  See the {doc}`rocm-docs-core linting user guide <rocm-docs-core:user_guide/linting>` for more details.
+
+## Filenames and folder structure
+
+Please use snake case (all lower case letters and underscores instead of spaces)
+for file names. For example, `example_file_name.md`.
+Our documentation follows Pitchfork for folder structure.
+All documentation is in `/docs` except for special files like
+the contributing guide in the `/` folder. All images used in the documentation are
+placed in the `/docs/data` folder.
+
+## Language and Style
+
+Adopt Microsoft CPP-Docs guidelines for
+[Voice and Tone](https://github.com/MicrosoftDocs/cpp-docs/blob/main/styleguide/voice-tone.md).
+
+ROCm documentation templates to be made public shortly. ROCm templates dictate
+the recommended structure and flow of the documentation. Guidelines on how to
+integrate figures, equations, and tables are all based off
+[MyST](https://myst-parser.readthedocs.io/en/latest/intro.html).
+
+Font size and selection, page layout, white space control, and other formatting
+details are controlled via [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core).
+Raise issues in `rocm-docs-core` for any formatting concerns and changes requested.
+
+## More
+
+For more topics, such as submitting feedback and ways to build documentation,
+see the [Contributing Section](https://rocm.docs.amd.com/en/latest/contributing.html)
+at [rocm.docs.amd.com](https://rocm.docs.amd.com)

LICENSE

@@ -0,0 +1,21 @@
+MIT License
+
+Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

README.md

@@ -1,744 +1,50 @@
+# AMD ROCm™ Platform
 
-New AMD ROCm Information Portal ROCm v4.5 and Above
------------------------------------------------------
+ROCm is an open-source stack, composed primarily of open-source software (OSS), designed for
+graphics processing unit (GPU) computation. ROCm consists of a collection of drivers, development
+tools, and APIs that enable GPU programming from low-level kernel to end-user applications.
 
-Beginning ROCm release v5.0, AMD ROCm documentation has a new portal at https://docs.amd.com  This portal consists of ROCm documentation v4.5 and above.
+With ROCm, you can customize your GPU software to meet your specific needs. You can develop,
+collaborate, test, and deploy your applications in a free, open-source, integrated, and secure software
+ecosystem. ROCm is particularly well-suited to GPU-accelerated high-performance computing (HPC),
+artificial intelligence (AI), scientific computing, and computer aided design (CAD).
 
-For documentation prior to ROCm v4.5, you may continue to access https://rocmdocs.amd.com.
+ROCm is powered by AMD’s
+[Heterogeneous-computing Interface for Portability (HIP)](https://github.com/ROCm-Developer-Tools/HIP),
+an OSS C++ GPU programming environment and its corresponding runtime. HIP allows ROCm
+developers to create portable applications on different platforms by deploying code on a range of
+platforms, from dedicated gaming GPUs to exascale HPC clusters.
 
-# AMD ROCm™ v5.0.2 Release Notes
+ROCm supports programming models, such as OpenMP and OpenCL, and includes all necessary OSS
+compilers, debuggers, and libraries. ROCm is fully integrated into machine learning (ML) frameworks,
+such as PyTorch and TensorFlow.
 
-## Fixed Defects in This Release
+## ROCm Documentation
 
-The following defects are fixed in the ROCm v5.0.2 release.
+The ROCm Documentation site is [rocm.docs.amd.com](https://rocm.docs.amd.com).
 
-### Issue with hostcall Facility in HIP Runtime
+Source code for the documentation is located in the docs folder of most repositories that are part of
+ROCm.
 
-In ROCm v5.0, when using the “assert()” call in a HIP kernel, the compiler may sometimes fail to emit kernel metadata related to the hostcall facility, which results in incomplete initialization of the hostcall facility in the HIP runtime. This can cause the HIP kernel to crash when it attempts to execute the “assert()” call. 
-The root cause was an incorrect check in the compiler to determine whether the hostcall facility is required by the kernel. This is fixed in the ROCm v5.0.2 release. 
-The resolution includes a compiler change, which emits the required metadata by default, unless the compiler can prove that the hostcall facility is not required by the kernel. This ensures that the “assert()” call never fails. 
+This repository contains the manifest file for ROCm releases, changelogs, and release information.
+The file `default.xml` contains information for all repositories and the associated commit used to build
+the current ROCm release.
 
-**Note**: This fix may lead to breakage in some OpenMP offload use cases, which use print inside a target region and result in an abort in device code. The issue will be fixed in a future release. 
+The `default.xml` file uses the repo Manifest Format.
 
-### Compatibility Matrix Updates to ROCm Deep Learning Guide
+The develop branch of this repository contains content for the next ROCm release.
 
-The compatibility matrix in the AMD Deep Learning Guide is updated for ROCm v5.0.2.
+### How to build documentation via Sphinx
 
-For more information and documentation updates, refer to https://docs.amd.com.
+```bash
+cd docs
 
+pip3 install -r sphinx/requirements.txt
 
-
-# AMD ROCm™ v5.0.1 Release Notes
-
-## Deprecations and Warnings
-
-### Refactor of HIPCC/HIPCONFIG
-
-In prior ROCm releases, by default, the hipcc/hipconfig Perl scripts were used to identify and set target compiler options, target platform, compiler, and runtime appropriately.
-In ROCm v5.0.1, hipcc.bin and hipconfig.bin have been added as the compiled binary implementations of the hipcc and hipconfig. These new binaries are currently a work-in-progress, considered, and marked as experimental. ROCm plans to fully transition to hipcc.bin and hipconfig.bin in the a future ROCm release. The existing hipcc and hipconfig Perl scripts are renamed to hipcc.pl and hipconfig.pl respectively. New top-level hipcc and hipconfig Perl scripts are created, which can switch between the Perl script or the compiled binary based on the environment variable HIPCC_USE_PERL_SCRIPT. 
-In ROCm 5.0.1, by default, this environment variable is set to use hipcc and hipconfig through the Perl scripts.
-Subsequently, Perl scripts will no longer be available in ROCm in a future release.
-
-
-## ROCM DOCUMENTATION UPDATES FOR ROCM 5.0.1
-
-* ROCm Downloads Guide
-
-* ROCm Installation Guide
-
-* ROCm Release Notes
-
-For more information, see https://docs.amd.com.
-
-
-
-# AMD ROCm™ v5.0 Release Notes
-
-
-# ROCm Installation Updates
-
-This document describes the features, fixed issues, and information about downloading and installing the AMD ROCm™ software.
-
-It also covers known issues and deprecations in this release.
-
-## Notice for Open-source and Closed-source ROCm Repositories in Future Releases
-
-To make a distinction between open-source and closed-source components, all ROCm repositories will consist of sub-folders in future releases.
-
-- All open-source components will be placed in the `base-url/<rocm-ver>/main` sub-folder
-- All closed-source components will reside in the `base-url/<rocm-ver>/proprietary`  sub-folder
-
-## List of Supported Operating Systems
-
-The AMD ROCm platform supports the following operating systems:
-
-| **OS-Version (64-bit)** | **Kernel Versions** |
-| --- | --- |
-| CentOS 8.3 | 4.18.0-193.el8 |
-| CentOS 7.9 | 3.10.0-1127 |
-| RHEL 8.5 | 4.18.0-348.7.1.el8\_5.x86\_64 |
-| RHEL 8.4 | 4.18.0-305.el8.x86\_64 |
-| RHEL 7.9 | 3.10.0-1160.6.1.el7 |
-| SLES 15 SP3 | 5.3.18-59.16-default |
-| Ubuntu 20.04.3 | 5.8.0 LTS / 5.11 HWE |
-| Ubuntu 18.04.5 [5.4 HWE kernel] | 5.4.0-71-generic |
-
-### Support for RHEL v8.5
-
-This release extends support for RHEL v8.5.
-
-### Supported GPUs
-
-#### Radeon Pro V620 and W6800 Workstation GPUs
-
-This release extends ROCm support for Radeon Pro V620 and W6800 Workstation GPUs.
-
-- SRIOV virtualization support for Radeon Pro V620
-- KVM Hypervisor (1VF support only) on Ubuntu Host OS with Ubuntu, CentOs, and RHEL Guest
-- Support for ROCm-SMI in an SRIOV environment. For more details, refer to the ROCm SMI API documentation.
-
-**Note:** Radeon Pro v620 is not supported on SLES.
-
-## ROCm Installation Updates for ROCm v5.0
-
-This release has the following ROCm installation enhancements.
-
-### Support for Kernel Mode Driver
-
-In this release, users can install the kernel-mode driver using the Installer method. Some of the ROCm-specific use cases that the installer currently supports are:
-
-- OpenCL (ROCr/KFD based) runtime
-- HIP runtimes
-- ROCm libraries and applications
-- ROCm Compiler and device libraries
-- ROCr runtime and thunk
-- Kernel-mode driver
-
-### Support for Multi-version ROCm Installation and Uninstallation
-
-Users now can install multiple ROCm releases simultaneously on a system using the newly introduced installer script and package manager install mechanism.
-
-Users can also uninstall multi-version ROCm releases using the `amdgpu-uninstall` script and package manager.
-
-### Support for Updating Information on Local Repositories
-
-In this release, the `amdgpu-install` script automates the process of updating local repository information before proceeding to ROCm installation.
-
-### Support for Release Upgrades
-
-Users can now upgrade the existing ROCm installation to specific or latest ROCm releases.
-
-For more details, refer to the AMD ROCm Installation Guide v5.0.
-
-# AMD ROCm V5.0 Documentation Updates
-
-## New AMD ROCm Information Portal – ROCm v4.5 and Above
-
-Beginning ROCm release v5.0, AMD ROCm documentation has a new portal at https://docs.amd.com. This portal consists of ROCm documentation v4.5 and above.
-
-For documentation prior to ROCm v4.5, you may continue to access https://rocmdocs.amd.com.
-
-## Documentation Updates for ROCm 5.0
-
-### Deployment Tools
-
-#### ROCm Data Center Tool Documentation Updates
-
-- ROCm Data Center Tool User Guide
-- ROCm Data Center Tool API Guide
-
-#### ROCm System Management Interface Updates
-
-- System Management Interface Guide
-- System Management Interface API Guide
-
-#### ROCm Command Line Interface Updates
-
-- Command Line Interface Guide
-
-### Machine Learning/AI Documentation Updates
-
-- Deep Learning Guide
-- MIGraphX API Guide
-- MIOpen API Guide
-- MIVisionX API Guide
-
-### ROCm Libraries Documentation Updates
-
-- hipSOLVER User Guide
-- RCCL User Guide
-- rocALUTION User Guide
-- rocBLAS User Guide
-- rocFFT User Guide
-- rocRAND User Guide
-- rocSOLVER User Guide
-- rocSPARSE User Guide
-- rocThrust User Guide
-
-### Compilers and Tools
-
-#### ROCDebugger Documentation Updates
-
-- ROCDebugger User Guide
-- ROCDebugger API Guide
-
-#### ROCTracer
-
-- ROCTracer User Guide
-- ROCTracer API Guide
-
-#### Compilers
-
-- AMD Instinct High Performance Computing and Tuning Guide
-- AMD Compiler Reference Guide
-
-#### HIPify Documentation
-
-- HIPify User Guide
-- HIP Supported CUDA API Reference Guide
-
-#### ROCm Debug Agent
-
-- ROCm Debug Agent Guide
-- System Level Debug Guide
-- ROCm Validation Suite
-
-### Programming Models Documentation
-
-#### HIP Documentation
-
-- HIP Programming Guide
-- HIP API Guide
-- HIP FAQ Guide
-
-#### OpenMP Documentation
-
-- OpenMP Support Guide
-
-### ROCm Glossary
-
-- ROCm Glossary – Terms and Definitions
-
-## AMD ROCm Legacy Documentation Links – ROCm v4.3 and Prior
-
-- For AMD ROCm documentation, see
-
-https://rocmdocs.amd.com/en/latest/
-
-- For installation instructions on supported platforms, see
-
-https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation-Guide.html
-
-- For AMD ROCm binary structure, see
-
-https://rocmdocs.amd.com/en/latest/Installation_Guide/Software-Stack-for-AMD-GPU.html
-
-- For AMD ROCm release history, see
-
-https://rocmdocs.amd.com/en/latest/Current_Release_Notes/ROCm-Version-History.html
-
-# What's New in This Release
-
-## HIP Enhancements
-
-The ROCm v5.0 release consists of the following HIP enhancements.
-
-### HIP Installation Guide Updates
-
-The HIP Installation Guide is updated to include building HIP from source on the NVIDIA platform.
-
-Refer to the HIP Installation Guide v5.0 for more details.
-
-### Managed Memory Allocation
-
-Managed memory, including the `__managed__` keyword, is now supported in the HIP combined host/device compilation. Through unified memory allocation, managed memory allows data to be shared and accessible to both the CPU and GPU using a single pointer. The allocation is managed by the AMD GPU driver using the Linux Heterogeneous Memory Management (HMM) mechanism. The user can call managed memory API hipMallocManaged to allocate a large chunk of HMM memory, execute kernels on a device, and fetch data between the host and device as needed.
-
-**Note:** In a HIP application, it is recommended to do a capability check before calling the managed memory APIs. For example,
-
-```c
-int managed_memory = 0;
-HIPCHECK(hipDeviceGetAttribute(&managed_memory, hipDeviceAttributeManagedMemory, p_gpuDevice));
-
-if (!managed_memory) {
-  printf ("info: managed memory access not supported on the device %d\n Skipped\n", p_gpuDevice);
-} else {
-  HIPCHECK(hipSetDevice(p_gpuDevice));
-  HIPCHECK(hipMallocManaged(&Hmm, N * sizeof(T)));
-  . . .
-}
+python3 -m sphinx -T -E -b html -d _build/doctrees -D language=en . _build/html
 ```
 
-**Note:** The managed memory capability check may not be necessary; however, if HMM is not supported, managed malloc will fall back to using system memory. Other managed memory API calls will, then, have
+## Older ROCm Releases
 
-Refer to the HIP API documentation for more details on managed memory APIs.
-
-For the application, see [hipMallocManaged.cpp](https://github.com/ROCm-Developer-Tools/HIP/blob/rocm-4.5.x/tests/src/runtimeApi/memory/hipMallocManaged.cpp)
-
-## New Environment Variable
-
-The following new environment variable is added in this release:
-
-| **Environment Variable** | **Value** | **Description** |
-| --- | --- | --- |
-| **HSA\_COOP\_CU\_COUNT** | 0 or 1 (default is 0) | Some processors support more compute units than can reliably be used in a cooperative dispatch. Setting the environment variable HSA\_COOP\_CU\_COUNT to 1 will cause ROCr to return the correct CU count for cooperative groups through the HSA\_AMD\_AGENT\_INFO\_COOPERATIVE\_COMPUTE\_UNIT\_COUNT attribute of hsa\_agent\_get\_info(). Setting HSA\_COOP\_CU\_COUNT to other values, or leaving it unset, will cause ROCr to return the same CU count for the attributes HSA\_AMD\_AGENT\_INFO\_COOPERATIVE\_COMPUTE\_UNIT\_COUNT and HSA\_AMD\_AGENT\_INFO\_COMPUTE\_UNIT\_COUNT. Future ROCm releases will make HSA\_COOP\_CU\_COUNT=1 the default.
- |
-
-## ROCm Math and Communication Libraries
-
-| **Library** | **Changes** |
-| --- | --- |
-| **rocBLAS** | **Added** <ul><li>Added rocblas\_get\_version\_string\_size convenience function</li><li>Added rocblas\_xtrmm\_outofplace, an out-of-place version of rocblas\_xtrmm</li><li>Added hpl and trig initialization for gemm\_ex to rocblas-bench</li><li>Added source code gemm. It can be used as an alternative to Tensile for debugging and development</li><li>Added option `ROCM_MATHLIBS_API_USE_HIP_COMPLEX` to opt-in to use hipFloatComplex and hipDoubleComplex</li></ul> **Optimizations** <ul><li>Improved performance of non-batched and batched single-precision GER for size m > 1024. Performance enhanced by 5-10% measured on a MI100 (gfx908) GPU.</li><li>Improved performance of non-batched and batched HER for all sizes and data types. Performance enhanced by 2-17% measured on a MI100 (gfx908) GPU.</li></ul> **Changed** <ul><li>Instantiate templated rocBLAS functions to reduce size of librocblas.so</li><li>Removed static library dependency on msgpack</li><li>Removed boost dependencies for clients</li></ul> **Fixed** <ul><li>Option to install script to build only rocBLAS clients with a pre-built rocBLAS library</li><li>Correctly set output of nrm2\_batched\_ex and nrm2\_strided\_batched\_ex when given bad input</li><li>Fix for dgmm with side == rocblas\_side\_left and a negative incx</li><li>Fixed out-of-bounds read for small trsm</li><li>Fixed numerical checking for tbmv\_strided\_batched</li></ul> |
-| | |
-| **hipBLAS** | **Added** <ul><li>Added rocSOLVER functions to hipblas-bench</li><li>Added option `ROCM_MATHLIBS_API_USE_HIP_COMPLEX` to opt-in to use hipFloatComplex and hipDoubleComplex</li><li>Added compilation warning for future trmm changes</li><li>Added documentation to hipblas.h</li><li>Added option to forgo pivoting for getrf and getri when ipiv is nullptr</li><li>Added code coverage option</li></ul> **Fixed** <ul><li>Fixed use of incorrect `HIP_PATH` when building from source.</li><li>Fixed windows packaging</li><li>Allowing negative increments in hipblas-bench</li><li>Removed boost dependency</li></ul> |
-| | |
-| **rocFFT** | **Changed** <ul><li>Enabled runtime compilation of single FFT kernels > length 1024.</li><li>Re-aligned split device library into 4 roughly equal libraries.</li><li>Implemented the FuseShim framework to replace the original OptimizePlan</li><li>Implemented the generic buffer-assignment framework. The buffer assignment is no longer performed by each node. A generic algorithm is designed to test and pick the best assignment path. With the help of FuseShim, more kernel-fusions are achieved.</li><li>Do not read the imaginary part of the DC and Nyquist modes for even-length complex-to-real transforms.</li></ul> **Optimizations** <ul><li>Optimized twiddle-conjugation; complex-to-complex inverse transforms have similar performance to foward transforms now.</li><li>Improved performance of single-kernel small 2D transforms.</li></ul> |
-| | |
-| **hipFFT** | **Fixed** <ul><li>Fixed incorrect reporting of rocFFT version.</li></ul> **Changed** <ul><li>Unconditionally enabled callback functionality. On the CUDA backend, callbacks only run correctly when hipFFT is built as a static library, and is linked against the static cuFFT library.</li></ul> |
-| | |
-| **rocSPARSE** | **Added** <ul><li>csrmv, coomv, ellmv, hybmv for (conjugate) transposed matricescsrmv for symmetric matrices</li></ul> **Changed** <ul><li>spmm\_ex is now deprecated and will be removed in the next major release</li></ul> **Improved** <ul><li>Optimization for gtsv</li></ul> |
-| | |
-| **hipSPARSE** | **Added** <ul><li>Added (conjugate) transpose support for csrmv, hybmv and spmv routines</li></ul> |
-| | |
-| **rocALUTION** | **Changed** <ul><li>Removed deprecated GlobalPairwiseAMG class, please use PairwiseAMG instead.</li></ul> **Improved** <ul><li>Improved documentation</li></ul> |
-| | |
-| **rocTHRUST** | **Updates** <ul><li>Updated to match upstream Thrust 1.13.0</li><li>Updated to match upstream Thrust 1.14.0</li><li>Added async scan</li></ul> **Changed** <ul><li>Scan algorithms: inclusive\_scan now uses the input-type as accumulator-type, exclusive\_scan uses initial-value-type. This particularly changes behaviour of small-size input types with large-size output types (e.g. short input, int output). And low-res input with high-res output (e.g. float input, double output)</li></ul> |
-| | |
-| **rocSOLVER** | **Added** <ul><li>Symmetric matrix factorizations: <ul><li>LASYF</li><li>SYTF2, SYTRF (with batched and strided\_batched versions)</li></ul><li>Added rocsolver\_get\_version\_string\_size to help with version string queries</li><li>Added rocblas\_layer\_mode\_ex and the ability to print kernel calls in the trace and profile logs</li><li>Expanded batched and strided\_batched sample programs.</li></ul> **Optimizations** <ul><li>Improved general performance of LU factorization</li><li>Increased parallelism of specialized kernels when compiling from source, reducing build times on multi-core systems.</li></ul> **Changed** <ul><li>The rocsolver-test client now prints the rocSOLVER version used to run the tests, rather than the version used to build them</li><li>The rocsolver-bench client now prints the rocSOLVER version used in the benchmark</li></ul> **Fixed** <ul><li>Added missing stdint.h include to rocsolver.h</li></ul> |
-| | |
-| **hipSOLVER** | **Added** <ul><li>Added SYTRF functions: hipsolverSsytrf\_bufferSize, hipsolverDsytrf\_bufferSize, hipsolverCsytrf\_bufferSize, hipsolverZsytrf\_bufferSize, hipsolverSsytrf, hipsolverDsytrf, hipsolverCsytrf, hipsolverZsytrf</li></ul> **Fixed** <ul><li>Fixed use of incorrect `HIP_PATH` when building from source</li></ul> |
-| | |
-| **RCCL** | **Added** <ul><li>Compatibility with NCCL 2.10.3</li></ul> **Known issues** <ul><li>Managed memory is not currently supported for clique-based kernels</li></ul> |
-| | |
-| **hipCUB** | **Fixed** <ul><li>Added missing includes to hipcub.hpp</li></ul> **Added** <ul><li>Bfloat16 support to test cases (device\_reduce & device\_radix\_sort)</li><li>Device merge sort</li><li>Block merge sort</li><li>API update to CUB 1.14.0</li></ul> **Changed** <ul><li>The SetupNVCC.cmake automatic target selector select all of the capabalities of all available card for NVIDIA backend.</li></ul> |
-| | |
-| **rocPRIM** | **Fixed** <ul><li>Enable bfloat16 tests and reduce threshold for bfloat16</li><li>Fix device scan limit\_size feature</li><li>Non-optimized builds no longer trigger local memory limit errors</li></ul> **Added** <ul><li>Scan size limit feature</li><li>Reduce size limit feature</li><li>Transform size limit feature</li><li>Add block\_load\_striped and block\_store\_striped</li><li>Add gather\_to\_blocked to gather values from other threads into a blocked arrangement</li><li>The block sizes for device merge sorts initial block sort and its merge steps are now separate in its kernel config (the block sort step supports multiple items per thread)</li></ul> **Changed** <ul><li>size\_limit for scan, reduce and transform can now be set in the config struct instead of a parameter</li><li>device\_scan and device\_segmented\_scan: inclusive\_scan now uses the input-type as accumulator-type, exclusive\_scan uses initial-value-type. This particularly changes behaviour of small-size input types with large-size output types (e.g. short input, int output) and low-res input with high-res output (e.g. float input, double output)</li><li>Revert old Fiji workaround, because the issue was solved at compiler side</li><li>Update README cmake minimum version number</li><li>Block sort support multiple items per thread. Currently only powers of two block sizes, and items per threads are supported and only for full blocks</li><li>Bumped the minimum required version of CMake to 3.16</li></ul> **Known issues** <ul><li>Unit tests may soft hang on MI200 when running in hipMallocManaged mode.</li><li>device\_segmented\_radix\_sort, device\_scan unit tests failing for HIP on WindowsReduceEmptyInput cause random failure with bfloat16</li><li>Managed memory is not currently supported for clique-based kernels</li></ul> |
-
-## System Management Interface
-
-### Clock Throttling for GPU Events
-
-This feature lists GPU events as they occur in real-time and can be used with _kfdtest_ to produce _vm\_fault_ events for testing.
-
-The command can be called with either &quot; `-e` or `--showevents` like this:
-
-    -e [EVENT [EVENT ...]], --showevents [EVENT [EVENT ...]]  Show event list
-
-Where `EVENT` is any list combination of `VM_FAULT`, `THERMAL_THROTTLE`, or `GPU_RESET` and is NOT case sensitive.
-
-**Note:** If no event arguments are passed, all events will be watched by default.
-
-#### CLI Commands
-
-```
-$ rocm-smi --showevents vm_fault thermal_throttle gpu_reset
-
-======================= ROCm System Management Interface =======================
-================================= Show Events ==================================
-press 'q' or 'ctrl + c' to quit
-DEVICE		TIME		TYPE		DESCRIPTION	
-
-============================= End of ROCm SMI Log ==============================
-```
-
-(Run kfdtest in another window to test for vm\_fault events.)
-
-**Note:** Unlike other rocm-smi CLI commands, this command does not quit unless specified by the user. Users may press either `q` or `ctrl + c` to quit.
-
-### Display XGMI Bandwidth Between Nodes
-
-The _rsmi\_minmax\_bandwidth\_get_ API reads the HW Topology file and displays bandwidth (min-max) between any two NUMA nodes in a matrix format.
-
-The Command Line Interface (CLI) command can be called as follows:
-
-```
-$ rocm-smi --shownodesbw
-
-======================= ROCm System Management Interface =======================
-================================== Bandwidth ===================================
-GPU0 GPU1 GPU2 GPU3 GPU4 GPU5 GPU6 GPU7
-GPU0 N/A 50000-200000 50000-50000 0-0 0-0 0-0 50000-100000 0-0
-GPU1 50000-200000 N/A 0-0 50000-50000 0-0 50000-50000 0-0 0-0
-GPU2 50000-50000 0-0 N/A 50000-200000 50000-100000 0-0 0-0 0-0
-GPU3 0-0 50000-50000 50000-200000 N/A 0-0 0-0 0-0 50000-50000
-GPU4 0-0 0-0 50000-100000 0-0 N/A 50000-200000 50000-50000 0-0
-GPU5 0-0 50000-50000 0-0 0-0 50000-200000 N/A 0-0 50000-50000
-GPU6 50000-100000 0-0 0-0 0-0 50000-50000 0-0 N/A 50000-200000
-GPU7 0-0 0-0 0-0 50000-50000 0-0 50000-50000 50000-200000 N/A
-Format: min-max; Units: mps
-============================= End of ROCm SMI Log ==============================
-```
-
-The sample output above shows the maximum theoretical xgmi bandwidth between 2 numa nodes,
-
-**Note:** "0-0" min-max bandwidth indicates devices are not connected directly.
-
-### P2P Connection Status
-
-The _rsmi\_is\_p2p\_accessible_ API returns "True" if P2P can be implemented between two nodes, and returns "False" if P2P cannot be implemented between the two nodes.
-
-The Command Line Interface command can be called as follows:
-
-    rocm-smi --showtopoaccess
-
-Sample Output:
-
-```
-$ rocm-smi --showtopoaccess
-======================= ROCm System Management Interface =======================
-===================== Link accessibility between two GPUs ======================
-GPU0 GPU1
-GPU0 True True
-GPU1 True True
-============================= End of ROCm SMI Log ==============================
-```
-
-# Breaking Changes
-
-## Runtime Breaking Change
-
-Re-ordering of the enumerated type in hip\_runtime\_api.h to better match NV.  See below for the difference in enumerated types.
-
-ROCm software will be affected if any of the defined enums listed below are used in the code.  Applications built with ROCm v5.0 enumerated types will work with a ROCm 4.5.2 driver. However, an undefined behavior error will occur with a ROCm v4.5.2 application that uses these enumerated types with a ROCm 5.0 runtime.
-
-```c
-typedef enum hipDeviceAttribute_t {
-  hipDeviceAttributeMaxThreadsPerBlock, // Maximum number of threads per block.
-  hipDeviceAttributeMaxBlockDimX, // Maximum x-dimension of a block.
-  hipDeviceAttributeMaxBlockDimY, // Maximum y-dimension of a block.
-  hipDeviceAttributeMaxBlockDimZ, // Maximum z-dimension of a block.
-  hipDeviceAttributeMaxGridDimX, // Maximum x-dimension of a grid.
-  hipDeviceAttributeMaxGridDimY, // Maximum y-dimension of a grid.
-  hipDeviceAttributeMaxGridDimZ, // Maximum z-dimension of a grid.
-  hipDeviceAttributeMaxSharedMemoryPerBlock, // Maximum shared memory available per block in bytes.
-  hipDeviceAttributeTotalConstantMemory, // Constant memory size in bytes.
-  hipDeviceAttributeWarpSize, // Warp size in threads.
-  hipDeviceAttributeMaxRegistersPerBlock, // Maximum number of 32-bit registers available to a
-                                          // thread block. This number is shared by all thread
-                                          // blocks simultaneously resident on a
-                                          // multiprocessor.
-  hipDeviceAttributeClockRate, // Peak clock frequency in kilohertz.
-  hipDeviceAttributeMemoryClockRate, // Peak memory clock frequency in kilohertz.
-  hipDeviceAttributeMemoryBusWidth, // Global memory bus width in bits.
-  hipDeviceAttributeMultiprocessorCount, // Number of multiprocessors on the device.
-  hipDeviceAttributeComputeMode, // Compute mode that device is currently in.
-  hipDeviceAttributeL2CacheSize, // Size of L2 cache in bytes. 0 if the device doesn't have L2
-                                 // cache.
-  hipDeviceAttributeMaxThreadsPerMultiProcessor, // Maximum resident threads per
-                                                 // multiprocessor.
-  hipDeviceAttributeComputeCapabilityMajor, // Major compute capability version number.
-  hipDeviceAttributeComputeCapabilityMinor, // Minor compute capability version number.
-  hipDeviceAttributeConcurrentKernels, // Device can possibly execute multiple kernels
-                                       // concurrently.
-  hipDeviceAttributePciBusId, // PCI Bus ID.
-  hipDeviceAttributePciDeviceId, // PCI Device ID.
-  hipDeviceAttributeMaxSharedMemoryPerMultiprocessor, // Maximum Shared Memory Per
-                                                      // Multiprocessor.
-  hipDeviceAttributeIsMultiGpuBoard, // Multiple GPU devices.
-  hipDeviceAttributeIntegrated, // iGPU
-  hipDeviceAttributeCooperativeLaunch, // Support cooperative launch
-  hipDeviceAttributeCooperativeMultiDeviceLaunch, // Support cooperative launch on multiple devices
-  hipDeviceAttributeMaxTexture1DWidth, // Maximum number of elements in 1D images
-  hipDeviceAttributeMaxTexture2DWidth, // Maximum dimension width of 2D images in image elements
-  hipDeviceAttributeMaxTexture2DHeight, // Maximum dimension height of 2D images in image elements
-  hipDeviceAttributeMaxTexture3DWidth, // Maximum dimension width of 3D images in image elements
-  hipDeviceAttributeMaxTexture3DHeight, // Maximum dimensions height of 3D images in image elements
-  hipDeviceAttributeMaxTexture3DDepth, // Maximum dimensions depth of 3D images in image elements
-  hipDeviceAttributeCudaCompatibleBegin = 0,
-  hipDeviceAttributeHdpMemFlushCntl, // Address of the HDP\_MEM\_COHERENCY\_FLUSH\_CNTL register
-  hipDeviceAttributeHdpRegFlushCntl, // Address of the HDP\_REG\_COHERENCY\_FLUSH\_CNTL register
-  hipDeviceAttributeEccEnabled = hipDeviceAttributeCudaCompatibleBegin, // Whether ECC support is enabled.
-  hipDeviceAttributeAccessPolicyMaxWindowSize, // Cuda only. The maximum size of the window policy in bytes.
-  hipDeviceAttributeAsyncEngineCount, // Cuda only. Asynchronous engines number.
-  hipDeviceAttributeCanMapHostMemory, // Whether host memory can be mapped into device address space
-  hipDeviceAttributeCanUseHostPointerForRegisteredMem, // Cuda only. Device can access host registered memory
-  // at the same virtual address as the CPU
-  hipDeviceAttributeClockRate, // Peak clock frequency in kilohertz.
-  hipDeviceAttributeComputeMode, // Compute mode that device is currently in.
-  hipDeviceAttributeComputePreemptionSupported, // Cuda only. Device supports Compute Preemption.
-  hipDeviceAttributeConcurrentKernels, // Device can possibly execute multiple kernels concurrently.
-  hipDeviceAttributeConcurrentManagedAccess, // Device can coherently access managed memory concurrently with the CPU
-  hipDeviceAttributeCooperativeLaunch, // Support cooperative launch
-  hipDeviceAttributeCooperativeMultiDeviceLaunch, // Support cooperative launch on multiple devices
-  hipDeviceAttributeDeviceOverlap, // Cuda only. Device can concurrently copy memory and execute a kernel.
-                                   // Deprecated. Use instead asyncEngineCount.
-  hipDeviceAttributeDirectManagedMemAccessFromHost, // Host can directly access managed memory on
-                                                    // the device without migration
-  hipDeviceAttributeGlobalL1CacheSupported, // Cuda only. Device supports caching globals in L1
-  hipDeviceAttributeHostNativeAtomicSupported, // Cuda only. Link between the device and the host supports native atomic operations
-  hipDeviceAttributeIntegrated, // Device is integrated GPU
-  hipDeviceAttributeIsMultiGpuBoard, // Multiple GPU devices.
-  hipDeviceAttributeKernelExecTimeout, // Run time limit for kernels executed on the device
-  hipDeviceAttributeL2CacheSize, // Size of L2 cache in bytes. 0 if the device doesn&#39;t have L2 cache.
-  hipDeviceAttributeLocalL1CacheSupported, // caching locals in L1 is supported
-  hipDeviceAttributeLuid, // Cuda only. 8-byte locally unique identifier in 8 bytes. Undefined on TCC and non-Windows platforms
-  hipDeviceAttributeLuidDeviceNodeMask, // Cuda only. Luid device node mask. Undefined on TCC and non-Windows platforms
-  hipDeviceAttributeComputeCapabilityMajor, // Major compute capability version number.
-  hipDeviceAttributeManagedMemory, // Device supports allocating managed memory on this system
-  hipDeviceAttributeMaxBlocksPerMultiProcessor, // Cuda only. Max block size per multiprocessor
-  hipDeviceAttributeMaxBlockDimX, // Max block size in width.
-  hipDeviceAttributeMaxBlockDimY, // Max block size in height.
-  hipDeviceAttributeMaxBlockDimZ, // Max block size in depth.
-  hipDeviceAttributeMaxGridDimX, // Max grid size in width.
-  hipDeviceAttributeMaxGridDimY, // Max grid size in height.
-  hipDeviceAttributeMaxGridDimZ, // Max grid size in depth.
-  hipDeviceAttributeMaxSurface1D, // Maximum size of 1D surface.
-  hipDeviceAttributeMaxSurface1DLayered, // Cuda only. Maximum dimensions of 1D layered surface.
-  hipDeviceAttributeMaxSurface2D, // Maximum dimension (width, height) of 2D surface.
-  hipDeviceAttributeMaxSurface2DLayered, // Cuda only. Maximum dimensions of 2D layered surface.
-  hipDeviceAttributeMaxSurface3D, // Maximum dimension (width, height, depth) of 3D surface.
-  hipDeviceAttributeMaxSurfaceCubemap, // Cuda only. Maximum dimensions of Cubemap surface.
-  hipDeviceAttributeMaxSurfaceCubemapLayered, // Cuda only. Maximum dimension of Cubemap layered surface.
-  hipDeviceAttributeMaxTexture1DWidth, // Maximum size of 1D texture.
-  hipDeviceAttributeMaxTexture1DLayered, // Cuda only. Maximum dimensions of 1D layered texture.
-  hipDeviceAttributeMaxTexture1DLinear, // Maximum number of elements allocatable in a 1D linear texture.
-                                        // Use cudaDeviceGetTexture1DLinearMaxWidth() instead on Cuda.
-  hipDeviceAttributeMaxTexture1DMipmap, // Cuda only. Maximum size of 1D mipmapped texture.
-  hipDeviceAttributeMaxTexture2DWidth, // Maximum dimension width of 2D texture.
-  hipDeviceAttributeMaxTexture2DHeight, // Maximum dimension hight of 2D texture.
-  hipDeviceAttributeMaxTexture2DGather, // Cuda only. Maximum dimensions of 2D texture if gather operations performed.
-  hipDeviceAttributeMaxTexture2DLayered, // Cuda only. Maximum dimensions of 2D layered texture.
-  hipDeviceAttributeMaxTexture2DLinear, // Cuda only. Maximum dimensions (width, height, pitch) of 2D textures bound to pitched memory.
-  hipDeviceAttributeMaxTexture2DMipmap, // Cuda only. Maximum dimensions of 2D mipmapped texture.
-  hipDeviceAttributeMaxTexture3DWidth, // Maximum dimension width of 3D texture.
-  hipDeviceAttributeMaxTexture3DHeight, // Maximum dimension height of 3D texture.
-  hipDeviceAttributeMaxTexture3DDepth, // Maximum dimension depth of 3D texture.
-  hipDeviceAttributeMaxTexture3DAlt, // Cuda only. Maximum dimensions of alternate 3D texture.
-  hipDeviceAttributeMaxTextureCubemap, // Cuda only. Maximum dimensions of Cubemap texture
-  hipDeviceAttributeMaxTextureCubemapLayered, // Cuda only. Maximum dimensions of Cubemap layered texture.
-  hipDeviceAttributeMaxThreadsDim, // Maximum dimension of a block
-  hipDeviceAttributeMaxThreadsPerBlock, // Maximum number of threads per block.
-  hipDeviceAttributeMaxThreadsPerMultiProcessor, // Maximum resident threads per multiprocessor.
-  hipDeviceAttributeMaxPitch, // Maximum pitch in bytes allowed by memory copies
-  hipDeviceAttributeMemoryBusWidth, // Global memory bus width in bits.
-  hipDeviceAttributeMemoryClockRate, // Peak memory clock frequency in kilohertz.
-  hipDeviceAttributeComputeCapabilityMinor, // Minor compute capability version number.
-  hipDeviceAttributeMultiGpuBoardGroupID, // Cuda only. Unique ID of device group on the same multi-GPU board
-  hipDeviceAttributeMultiprocessorCount, // Number of multiprocessors on the device.
-  hipDeviceAttributeName, // Device name.
-  hipDeviceAttributePageableMemoryAccess, // Device supports coherently accessing pageable memory
-                                          // without calling hipHostRegister on it
-  hipDeviceAttributePageableMemoryAccessUsesHostPageTables, // Device accesses pageable memory via the host&#39;s page tables
-  hipDeviceAttributePciBusId, // PCI Bus ID.
-  hipDeviceAttributePciDeviceId, // PCI Device ID.
-  hipDeviceAttributePciDomainID, // PCI Domain ID.
-  hipDeviceAttributePersistingL2CacheMaxSize, // Cuda11 only. Maximum l2 persisting lines capacity in bytes
-  hipDeviceAttributeMaxRegistersPerBlock, // 32-bit registers available to a thread block. This number is shared
-                                          // by all thread blocks simultaneously resident on a multiprocessor.
-  hipDeviceAttributeMaxRegistersPerMultiprocessor, // 32-bit registers available per block.
-  hipDeviceAttributeReservedSharedMemPerBlock, // Cuda11 only. Shared memory reserved by CUDA driver per block.
-  hipDeviceAttributeMaxSharedMemoryPerBlock, // Maximum shared memory available per block in bytes.
-  hipDeviceAttributeSharedMemPerBlockOptin, // Cuda only. Maximum shared memory per block usable by special opt in.
-  hipDeviceAttributeSharedMemPerMultiprocessor, // Cuda only. Shared memory available per multiprocessor.
-  hipDeviceAttributeSingleToDoublePrecisionPerfRatio, // Cuda only. Performance ratio of single precision to double precision.
-  hipDeviceAttributeStreamPrioritiesSupported, // Cuda only. Whether to support stream priorities.
-  hipDeviceAttributeSurfaceAlignment, // Cuda only. Alignment requirement for surfaces
-  hipDeviceAttributeTccDriver, // Cuda only. Whether device is a Tesla device using TCC driver
-  hipDeviceAttributeTextureAlignment, // Alignment requirement for textures
-  hipDeviceAttributeTexturePitchAlignment, // Pitch alignment requirement for 2D texture references bound to pitched memory;
-  hipDeviceAttributeTotalConstantMemory, // Constant memory size in bytes.
-  hipDeviceAttributeTotalGlobalMem, // Global memory available on devicice.
-  hipDeviceAttributeUnifiedAddressing, // Cuda only. An unified address space shared with the host.
-  hipDeviceAttributeUuid, // Cuda only. Unique ID in 16 byte.
-  hipDeviceAttributeWarpSize, // Warp size in threads.
-  hipDeviceAttributeMaxPitch, // Maximum pitch in bytes allowed by memory copies
-  hipDeviceAttributeTextureAlignment, //Alignment requirement for textures
-  hipDeviceAttributeTexturePitchAlignment, //Pitch alignment requirement for 2D texture references bound to pitched memory;
-  hipDeviceAttributeKernelExecTimeout, //Run time limit for kernels executed on the device
-  hipDeviceAttributeCanMapHostMemory, //Device can map host memory into device address space
-  hipDeviceAttributeEccEnabled, //Device has ECC support enabled
-  hipDeviceAttributeCudaCompatibleEnd = 9999,
-  hipDeviceAttributeAmdSpecificBegin = 10000,
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedFunc, // Supports cooperative launch on multiple
-                                                         // devices with unmatched functions
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedGridDim, // Supports cooperative launch on multiple
-                                                            // devices with unmatched grid dimensions
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedBlockDim, // Supports cooperative launch on multiple
-                                                             // devices with unmatched block dimensions
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedSharedMem, // Supports cooperative launch on multiple
-                                                              // devices with unmatched shared memories
-  hipDeviceAttributeAsicRevision, // Revision of the GPU in this device
-  hipDeviceAttributeManagedMemory, // Device supports allocating managed memory on this system
-  hipDeviceAttributeDirectManagedMemAccessFromHost, // Host can directly access managed memory on
-                                                    //  the device without migration
-  hipDeviceAttributeConcurrentManagedAccess, // Device can coherently access managed memory
-                                             // concurrently with the CPU
-  hipDeviceAttributePageableMemoryAccess, // Device supports coherently accessing pageable memory
-                                          // without calling hipHostRegister on it
-  hipDeviceAttributePageableMemoryAccessUsesHostPageTables, // Device accesses pageable memory via
-                                                            // the host's page tables
-  hipDeviceAttributeCanUseStreamWaitValue // '1' if Device supports hipStreamWaitValue32() and
-                                          // hipStreamWaitValue64(), '0' otherwise.
-  hipDeviceAttributeClockInstructionRate = hipDeviceAttributeAmdSpecificBegin, // Frequency in khz of the timer used by the device-side "clock"
-  hipDeviceAttributeArch, // Device architecture
-  hipDeviceAttributeMaxSharedMemoryPerMultiprocessor, // Maximum Shared Memory PerMultiprocessor.
-  hipDeviceAttributeGcnArch, // Device gcn architecture
-  hipDeviceAttributeGcnArchName, // Device gcnArch name in 256 bytes
-  hipDeviceAttributeHdpMemFlushCntl, // Address of the HDP_MEM_COHERENCY_FLUSH_CNTL register
-  hipDeviceAttributeHdpRegFlushCntl, // Address of the HDP_REG_COHERENCY_FLUSH_CNTL register
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedFunc, // Supports cooperative launch on multiple
-                                                         // devices with unmatched functions
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedGridDim, // Supports cooperative launch on multiple
-                                                            // devices with unmatched grid dimensions
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedBlockDim, // Supports cooperative launch on multiple
-                                                             // devices with unmatched block dimensions
-  hipDeviceAttributeCooperativeMultiDeviceUnmatchedSharedMem, // Supports cooperative launch on multiple
-                                                              // devices with unmatched shared memories
-  hipDeviceAttributeIsLargeBar, // Whether it is LargeBar
-  hipDeviceAttributeAsicRevision, // Revision of the GPU in this device
-  hipDeviceAttributeCanUseStreamWaitValue, // '1' if Device supports hipStreamWaitValue32() and
-                                           // hipStreamWaitValue64() , '0' otherwise.
-  hipDeviceAttributeAmdSpecificEnd = 19999,
-  hipDeviceAttributeVendorSpecificBegin = 20000,   // Extended attributes for vendors
-} hipDeviceAttribute_t;
-```
-
-# Known Issues in This Release
-
-## Incorrect dGPU Behavior When Using AMDVBFlash Tool
-
-The AMDVBFlash tool, used for flashing the VBIOS image to dGPU, does not communicate with the ROM Controller specifically when the driver is present. This is because the driver, as part of its runtime power management feature, puts the dGPU to a sleep state.
-
-As a workaround, users can run `amdgpu.runpm=0`, which temporarily disables the runtime power management feature from the driver and dynamically changes some power control-related sysfs files.
-
-## Issue with START Timestamp in ROCProfiler
-
-Users may encounter an issue with the enabled timestamp functionality for monitoring one or multiple counters. ROCProfiler outputs the following four timestamps for each kernel:
-
-- Dispatch
-- Start
-- End
-- Complete
-
-**Issue**
-
-This defect is related to the Start timestamp functionality, which incorrectly shows an earlier time than the Dispatch timestamp.
-
-To reproduce the issue,
-
-1. Enable timing using the `--timestamp on` flag.
-2. Use the `-i` option with the input filename that contains the name of the counter(s) to monitor.
-3. Run the program.
-4. Check the output result file.
-
-**Current behavior**
-
-BeginNS is lower than DispatchNS, which is incorrect.
-
-**Expected behavior**
-
-The correct order is:
-
-_Dispatch < Start < End < Complete_
-
-Users cannot use ROCProfiler to measure the time spent on each kernel because of the incorrect timestamp with counter collection enabled.
-
-**Recommended Workaround**
-
-Users are recommended to collect kernel execution timestamps without monitoring counters, as follows:
-
-1. Enable timing using the `--timestamp on` flag, and run the application.
-2. Rerun the application using the `-i` option with the input filename that contains the name of the counter(s) to monitor, and save this to a different output file using the `-o` flag.
-3. Check the output result file from step 1.
-4. The order of timestamps correctly displays as:
-
-_DispathNS < BeginNS < EndNS < CompleteNS_
-
-1. Users can find the values of the collected counters in the output file generated in step 2.
-
-## Radeon Pro V620 and W6800 Workstation GPUs
-
-### No Support for SMI and ROCDebugger on SRIOV
-
-System Management Interface (SMI) and ROCDebugger are not supported in the SRIOV environment on any GPU. For more information, refer to the Systems Management Interface documentation.
-
-# Deprecations and Warnings in This Release
-
-## ROCm Libraries Changes – Deprecations and Deprecation Removal
-
-- The hipfft.h header is now provided only by the hipfft package.  Up to ROCm 5.0, users would get hipfft.h in the rocfft package too.
-- The GlobalPairwiseAMG class is now entirely removed, users should use the PairwiseAMG class instead.
-- The rocsparse\_spmm signature in 5.0 was changed to match that of rocsparse\_spmm\_ex.  In 5.0, rocsparse\_spmm\_ex is still present, but deprecated.  Signature diff for rocsparse\_spmm
-
-### _rocsparse\_spmm_ in 5.0
-
-```c
-rocsparse_status rocsparse_spmm(rocsparse_handle            handle,
-                                rocsparse_operation         trans_A,
-                                rocsparse_operation         trans_B,
-                                const void*                 alpha,
-                                const rocsparse_spmat_descr mat_A,
-                                const rocsparse_dnmat_descr mat_B,
-                                const void*                 beta,
-                                const rocsparse_dnmat_descr mat_C,
-                                rocsparse_datatype          compute_type,
-                                rocsparse_spmm_alg          alg,
-                                rocsparse_spmm_stage        stage,
-                                size_t*                     buffer_size,
-                                void*                       temp_buffer);
-```
-
-### _rocsparse\_spmm_ in 4.0
-
-```c
-rocsparse_status rocsparse_spmm(rocsparse_handle            handle,
-                                rocsparse_operation         trans_A,
-                                rocsparse_operation         trans_B,
-                                const void*                 alpha,
-                                const rocsparse_spmat_descr mat_A,
-                                const rocsparse_dnmat_descr mat_B,
-                                const void*                 beta,
-                                const rocsparse_dnmat_descr mat_C,
-                                rocsparse_datatype          compute_type,
-                                rocsparse_spmm_alg          alg,
-                                size_t*                     buffer_size,
-                                void*                       temp_buffer);
-```
-
-## HIP API Deprecations and Warnings
-
-### Warning - Arithmetic Operators of HIP Complex and Vector Types
-
-In this release, arithmetic operators of HIP complex and vector types are deprecated.
-
-- As alternatives to arithmetic operators of HIP complex types, users can use arithmetic operators of std::complex types.
-- As alternatives to arithmetic operators of HIP vector types, users can use the operators of the native clang vector type associated with the data member of HIP vector types.
-
-During the deprecation, two macros `__HIP_ENABLE_COMPLEX_OPERATORS` and `__HIP_ENABLE_VECTOR_OPERATORS` are provided to allow users to conditionally enable arithmetic operators of HIP complex or vector types.
-
-Note, the two macros are mutually exclusive and, by default, set to off.
-
-The arithmetic operators of HIP complex and vector types will be removed in a future release.
-
-Refer to the HIP API Guide for more information.
-
-### Refactor of HIPCC/HIPCONFIG
-
-In prior ROCm releases, by default, the hipcc/hipconfig Perl scripts were used to identify and set target compiler options, target platform, compiler, and runtime appropriately.
-
-In ROCm v5.0, hipcc.bin and hipconfig.bin have been added as the compiled binary implementations of the hipcc and hipconfig. These new binaries are currently a work-in-progress, considered, and marked as experimental. ROCm plans to fully transition to hipcc.bin and hipconfig.bin in the a future ROCm release. The existing hipcc and hipconfig Perl scripts are renamed to hipcc.pl and hipconfig.pl respectively. New top-level hipcc and hipconfig Perl scripts are created, which can switch between the Perl script or the compiled binary based on the environment variable `HIPCC_USE_PERL_SCRIPT`.
-
-In ROCm 5.0, by default, this environment variable is set to use hipcc and hipconfig through the Perl scripts.
-
-Subsequently, Perl scripts will no longer be available in ROCm in a future release.
-
-## Warning - Compiler-Generated Code Object Version 4 Deprecation
-
-Support for loading compiler-generated code object version 4 will be deprecated in a future release with no release announcement and replaced with code object 5 as the default version.
-
-The current default is code object version 4.
-
-## Warning - MIOpenTensile Deprecation
-
-MIOpenTensile will be deprecated in a future release.
-
-
-
-
-
-# Disclaimer
-
-The information presented in this document is for informational purposes only and may contain technical inaccuracies, omissions, and typographical errors.  The information contained herein is subject to change and may be rendered inaccurate for many reasons, including but not limited to product and roadmap changes, component and motherboard versionchanges, new  model and/or product releases, product differences between differing manufacturers, software changes, BIOS flashes, firmware upgrades, or the like. Any computer system has risks of security vulnerabilities that cannot be completely prevented or mitigated.AMD  assumes  no  obligation  to  update  or  otherwise  correct  or  revise  this  information.  However, AMD reserves the right to revise this information and to make changes from time to time to the content hereof without obligation of AMD to notify any person of such revisions or changes.THIS INFORMATION IS PROVIDED ‘AS IS.” AMD MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT  TO  THE  CONTENTS  HEREOF  AND  ASSUMES  NO  RESPONSIBILITY  FOR  ANY  INACCURACIES, ERRORS, OR OMISSIONS THAT MAY APPEAR IN THIS INFORMATION. AMD SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR ANY PARTICULAR PURPOSE.  IN NO EVENT WILL AMD BE LIABLE TO ANY PERSON FOR ANY RELIANCE, DIRECT, INDIRECT, SPECIAL,  OR  OTHER  CONSEQUENTIAL  DAMAGES  ARISING  FROM  THE  USE  OF  ANY  INFORMATION CONTAINED HEREIN, EVEN IF AMD IS EXPRESSLY ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.AMD,  the  AMD  Arrow  logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc.Other product names  used  in  this  publication  are  for  identification  purposes  only  and  may  be  trademarks  of  their respective  companies.
-©[2021]Advanced Micro Devices, Inc.All rights reserved.
-
-## Third-party Disclaimer
-Third-party content is licensed to you directly by the third party that owns the content and is not licensed to you by AMD.  ALL LINKED THIRD-PARTY CONTENT IS PROVIDED “AS IS” WITHOUT A WARRANTY OF ANY KIND.  USE OF SUCH THIRD-PARTY CONTENT IS DONE AT YOUR SOLE DISCRETION AND UNDER NO CIRCUMSTANCES WILL AMD BE LIABLE TO YOU FOR ANY THIRD-PARTY CONTENT.  YOU ASSUME ALL RISK AND ARE SOLELY RESPONSIBLE FOR ANY DAMAGES THAT MAY ARISE FROM YOUR USE OF THIRD-PARTY CONTENT. 
+For release information for older ROCm releases, refer to
+[`CHANGELOG`](./CHANGELOG.md).

RELEASE.md

@@ -0,0 +1,483 @@
+# Release Notes
+<!-- Do not edit this file! This file is autogenerated with -->
+<!--   tools/autotag/tag_script.py                          -->
+
+<!-- Disable lints since this is an auto-generated file.    -->
+<!-- markdownlint-disable blanks-around-headers             -->
+<!-- markdownlint-disable no-duplicate-header               -->
+<!-- markdownlint-disable no-blanks-blockquote              -->
+<!-- markdownlint-disable ul-indent                         -->
+<!-- markdownlint-disable no-trailing-spaces                -->
+
+<!-- spellcheck-disable -->
+
+The release notes for the ROCm platform.
+
+-------------------
+
+## ROCm 5.7.0
+<!-- markdownlint-disable first-line-h1 -->
+<!-- markdownlint-disable no-duplicate-header -->
+
+### Release Highlights for ROCm v5.7
+
+ROCm 5.7.0 includes many new features. These include: a new library (hipTensor), debugger (ROCgdb) support for Fortran and OMPD, and optimizations for rocRAND and MIVisionX. Address sanitizer for host and device code (GPU) is now available as a beta. Note that ROCm 5.7.0 is EOS for MI50. 5.7 versions of ROCm are the last major release in the ROCm 5 series. This release is Linux-only.
+
+Important: The next major ROCm release (ROCm 6.0) will not be backward compatible with the ROCm 5 series. Changes will include: splitting LLVM packages into more manageable sizes, changes to the HIP runtime API, splitting rocRAND and hipRAND into separate packages, and reorganizing our file structure.
+
+#### AMD Instinct™ MI50 End of Support Notice
+
+AMD Instinct MI50, Radeon Pro VII, and Radeon VII products (collectively gfx906 GPUs) will enter maintenance mode starting Q3 2023.
+
+As outlined in [5.6.0](https://rocm.docs.amd.com/en/docs-5.6.0/release.html), ROCm 5.7 will be the final release for gfx906 GPUs to be in a fully supported state.
+
+- ROCm 6.0 release will show MI50s as "under maintenance" mode for [Linux](./about/release/linux_support) and [Windows](./about/release/windows_support)
+
+- No new features and performance optimizations will be supported for the gfx906 GPUs beyond this major release (ROCm 5.7).
+
+- Bug fixes / critical security patches will continue to be supported for the gfx906 GPUs till Q2 2024 (EOM (End of Maintenance) will be aligned with the closest ROCm release).
+
+- Bug fixes during the maintenance will be made to the next ROCm point release.
+
+- Bug fixes will not be backported to older ROCm releases for gfx906.
+
+- Distro / Operating system updates will continue as per the ROCm release cadence for gfx906 GPUs till EOM.
+
+#### Feature Updates
+
+##### Non-hostcall HIP Printf
+
+**Current behavior**
+
+The current version of HIP printf relies on hostcalls, which, in turn, rely on PCIe atomics. However, PCle atomics are unavailable in some environments, and, as a result, HIP-printf does not work in those environments. Users may see the following error from runtime (with AMD_LOG_LEVEL 1 and above), 
+
+```
+    Pcie atomics not enabled, hostcall not supported
+```
+**Workaround**
+
+The ROCm 5.7 release introduces an alternative to the current hostcall-based implementation that leverages an older OpenCL-based printf scheme, which does not rely on hostcalls/PCIe atomics. 
+Note: This option is less robust than hostcall-based implementation and is intended to be a workaround when hostcalls do not work.	
+
+The printf variant is now controlled via a new compiler option -mprintf-kind=<value>. This is supported only for HIP programs and takes the following values,
+
+- “hostcall” – This currently available implementation relies on hostcalls, which require the system to support PCIe atomics. It is the default scheme.
+
+- “buffered” – This implementation leverages the older printf scheme used by OpenCL; it relies on a memory buffer where printf arguments are stored during the kernel execution, and then the runtime handles the actual printing once the kernel finishes execution. 
+
+**NOTE**: With the new workaround,
+
+- The printf buffer is fixed size and non-circular.  After the buffer is filled, calls to printf will not result in additional output.
+
+- The printf call returns either 0 (on success) or -1 (on failure, due to full buffer), unlike the hostcall scheme that returns the number of characters printed.
+
+##### Beta Release of LLVM Address Sanitizer (ASAN) with the GPU
+
+The ROCm v5.7 release introduces the beta release of LLVM Address Sanitizer (ASAN) with the GPU. The LLVM Address Sanitizer provides a process that allows developers to detect runtime addressing errors in applications and libraries. The detection is achieved using a combination of compiler-added instrumentation and runtime techniques, including function interception and replacement.
+Until now, the LLVM Address Sanitizer process was only available for traditional purely CPU applications. However, ROCm has extended this mechanism to additionally allow the detection of some addressing errors on the GPU in heterogeneous applications. Ideally, developers should treat heterogeneous HIP and OpenMP applications like pure CPU applications. However, this simplicity has not been achieved yet.
+
+Refer to the documentation on LLVM Address Sanitizer with the GPU at [LLVM Address Sanitizer User Guide](./docs/understand/using_gpu_sanitizer.md).
+
+**Note**: The beta release of LLVM Address Sanitizer for ROCm is currently tested and validated on Ubuntu 20.04.
+
+#### Fixed Defects
+
+The following defects are fixed in ROCm v5.7,
+
+- Test hangs observed in HMM RCCL
+
+- NoGpuTst test of Catch2 fails with Docker
+
+- Failures observed with non-HMM HIP directed catch2 tests with XNACK+
+
+- Multiple test failures and test hangs observed in hip-directed catch2 tests with xnack+
+
+#### HIP 5.7.0
+
+##### Optimizations
+
+##### Added
+
+- Added `meta_group_size`/`rank` for getting the number of tiles and rank of a tile in the partition
+
+- Added new APIs supporting Windows only, under development on Linux
+
+    - `hipMallocMipmappedArray` for allocating a mipmapped array on the device
+
+    - `hipFreeMipmappedArray` for freeing a mipmapped array on the device
+
+    - `hipGetMipmappedArrayLevel` for getting a mipmap level of a HIP mipmapped array
+
+    - `hipMipmappedArrayCreate` for creating a mipmapped array
+
+    - `hipMipmappedArrayDestroy` for destroy a mipmapped array
+
+    - `hipMipmappedArrayGetLevel` for getting a mipmapped array on a mipmapped level
+
+##### Changed
+
+##### Fixed
+
+##### Known Issues
+
+- HIP memory type enum values currently don't support equivalent value to `cudaMemoryTypeUnregistered`, due to HIP functionality backward compatibility.
+- HIP API `hipPointerGetAttributes` could return invalid value in case the input memory pointer was not allocated through any HIP API on device or host.
+
+##### Upcoming changes for HIP in ROCm 6.0 release
+
+- Removal of gcnarch from hipDeviceProp_t structure
+
+- Addition of new fields in hipDeviceProp_t structure
+
+    - maxTexture1D
+
+    - maxTexture2D
+
+    - maxTexture1DLayered
+
+    - maxTexture2DLayered
+    
+    - sharedMemPerMultiprocessor
+    
+    - deviceOverlap
+    
+    - asyncEngineCount
+    
+    - surfaceAlignment
+    
+    - unifiedAddressing
+    
+    - computePreemptionSupported
+    
+    - hostRegisterSupported
+    
+    - uuid
+    
+- Removal of deprecated code -hip-hcc codes from hip code tree
+
+- Correct hipArray usage in HIP APIs such as hipMemcpyAtoH and hipMemcpyHtoA
+
+- HIPMEMCPY_3D fields correction to avoid truncation of "size_t" to "unsigned int" inside hipMemcpy3D()
+
+- Renaming of 'memoryType' in hipPointerAttribute_t structure to 'type'
+
+- Correct hipGetLastError to return the last error instead of last API call's return code
+
+- Update hipExternalSemaphoreHandleDesc to add "unsigned int reserved[16]"
+
+- Correct handling of flag values in hipIpcOpenMemHandle for hipIpcMemLazyEnablePeerAccess
+
+- Remove hiparray* and make it opaque with hipArray_t
+
+### Library Changes in ROCM 5.7.0
+
+| Library | Version |
+|---------|---------|
+| hipBLAS |  ⇒ [1.1.0](https://github.com/ROCmSoftwarePlatform/hipBLAS/releases/tag/rocm-5.7.0) |
+| hipCUB |  ⇒ [2.13.1](https://github.com/ROCmSoftwarePlatform/hipCUB/releases/tag/rocm-5.7.0) |
+| hipFFT |  ⇒ [1.0.12](https://github.com/ROCmSoftwarePlatform/hipFFT/releases/tag/rocm-5.7.0) |
+| hipSOLVER |  ⇒ [1.8.1](https://github.com/ROCmSoftwarePlatform/hipSOLVER/releases/tag/rocm-5.7.0) |
+| hipSPARSE |  ⇒ [2.3.8](https://github.com/ROCmSoftwarePlatform/hipSPARSE/releases/tag/rocm-5.7.0) |
+| MIOpen |  ⇒ [2.19.0](https://github.com/ROCmSoftwarePlatform/MIOpen/releases/tag/rocm-5.7.0) |
+| rccl |  ⇒ [2.17.1-1](https://github.com/ROCmSoftwarePlatform/rccl/releases/tag/rocm-5.7.0) |
+| rocALUTION |  ⇒ [2.1.11](https://github.com/ROCmSoftwarePlatform/rocALUTION/releases/tag/rocm-5.7.0) |
+| rocBLAS |  ⇒ [3.1.0](https://github.com/ROCmSoftwarePlatform/rocBLAS/releases/tag/rocm-5.7.0) |
+| rocFFT |  ⇒ [1.0.24](https://github.com/ROCmSoftwarePlatform/rocFFT/releases/tag/rocm-5.7.0) |
+| rocm-cmake |  ⇒ [0.10.0](https://github.com/RadeonOpenCompute/rocm-cmake/releases/tag/rocm-5.7.0) |
+| rocPRIM |  ⇒ [2.13.1](https://github.com/ROCmSoftwarePlatform/rocPRIM/releases/tag/rocm-5.7.0) |
+| rocRAND |  ⇒ [2.10.17](https://github.com/ROCmSoftwarePlatform/rocRAND/releases/tag/rocm-5.7.0) |
+| rocSOLVER |  ⇒ [3.23.0](https://github.com/ROCmSoftwarePlatform/rocSOLVER/releases/tag/rocm-5.7.0) |
+| rocSPARSE |  ⇒ [2.5.4](https://github.com/ROCmSoftwarePlatform/rocSPARSE/releases/tag/rocm-5.7.0) |
+| rocThrust |  ⇒ [2.18.0](https://github.com/ROCmSoftwarePlatform/rocThrust/releases/tag/rocm-5.7.0) |
+| rocWMMA |  ⇒ [1.2.0](https://github.com/ROCmSoftwarePlatform/rocWMMA/releases/tag/rocm-5.7.0) |
+| Tensile |  ⇒ [4.38.0](https://github.com/ROCmSoftwarePlatform/Tensile/releases/tag/rocm-5.7.0) |
+
+#### hipBLAS 1.1.0
+
+hipBLAS 1.1.0 for ROCm 5.7.0
+
+##### Changed
+
+- updated documentation requirements
+
+##### Dependencies
+
+- dependency rocSOLVER now depends on rocSPARSE
+
+#### hipCUB 2.13.1
+
+hipCUB 2.13.1 for ROCm 5.7.0
+
+##### Changed
+
+- CUB backend references CUB and Thrust version 2.0.1.
+- Fixed `DeviceSegmentedReduce::ArgMin` and `DeviceSegmentedReduce::ArgMax` by returning the segment-relative index instead of the absolute one.
+- Fixed `DeviceSegmentedReduce::ArgMin` for inputs where the segment minimum is smaller than the value returned for empty segments. An equivalent fix is applied to `DeviceSegmentedReduce::ArgMax`.
+
+##### Known Issues
+
+- `debug_synchronous` no longer works on CUDA platform. `CUB_DEBUG_SYNC` should be used to enable those checks.
+- `DeviceReduce::Sum` does not compile on CUDA platform for mixed extended-floating-point/floating-point InputT and OutputT types.
+- `DeviceHistogram::HistogramEven` fails on CUDA platform for `[LevelT, SampleIteratorT] = [int, int]`.
+- `DeviceHistogram::MultiHistogramEven` fails on CUDA platform for `[LevelT, SampleIteratorT] = [int, int/unsigned short/float/double]` and `[LevelT, SampleIteratorT] = [float, double]`.
+
+#### hipFFT 1.0.12
+
+hipFFT 1.0.12 for ROCm 5.7.0
+
+##### Added
+
+- Implemented the hipfftXtMakePlanMany, hipfftXtGetSizeMany, hipfftXtExec APIs, to allow requesting half-precision transforms.
+
+##### Changed
+
+- Added --precision argument to benchmark/test clients.  --double is still accepted but is deprecated as a method to request a double-precision transform.
+
+#### hipSOLVER 1.8.1
+
+hipSOLVER 1.8.1 for ROCm 5.7.0
+
+##### Changed
+
+- Changed hipsolver-test sparse input data search paths to be relative to the test executable
+
+#### hipSPARSE 2.3.8
+
+hipSPARSE 2.3.8 for ROCm 5.7.0
+
+##### Improved
+
+- Fix compilation failures when using cusparse 12.1.0 backend
+- Fix compilation failures when using cusparse 12.0.0 backend
+- Fix compilation failures when using cusparse 10.1 (non-update versions) as backend
+- Minor improvements
+
+#### MIOpen 2.19.0
+
+MIOpen 2.19.0 for ROCm 5.7.0
+
+##### Added
+
+- ROCm 5.5 support for gfx1101 (Navi32)
+
+##### Changed
+
+- Tuning results for MLIR on ROCm 5.5
+- Bumping MLIR commit to 5.5.0 release tag
+
+##### Fixed
+
+- Fix 3d convolution Host API bug
+- [HOTFIX][MI200][FP16] Disabled ConvHipImplicitGemmBwdXdlops when FP16_ALT is required.
+
+#### RCCL 2.17.1-1
+
+RCCL 2.17.1-1 for ROCm 5.7.0
+
+##### Changed
+
+- Compatibility with NCCL 2.17.1-1
+- Performance tuning for some collective operations
+
+##### Added
+
+- Minor improvements to MSCCL codepath
+- NCCL_NCHANNELS_PER_PEER support
+- Improved compilation performance
+- Support for gfx94x
+
+##### Fixed
+
+- Potential race-condition during ncclSocketClose()
+
+#### rocALUTION 2.1.11
+
+rocALUTION 2.1.11 for ROCm 5.7.0
+
+##### Added
+
+- Added support for gfx940, gfx941 and gfx942
+
+##### Improved
+
+- Fixed OpenMP runtime issue with Windows toolchain
+
+#### rocBLAS 3.1.0
+
+rocBLAS 3.1.0 for ROCm 5.7.0
+
+##### Added
+
+- yaml lock step argument scanning for rocblas-bench and rocblas-test clients. See Programmers Guide for details.
+- rocblas-gemm-tune is used to find the best performing GEMM kernel for each of a given set of GEMM problems.
+
+##### Fixed
+
+- make offset calculations for rocBLAS functions 64 bit safe.  Fixes for very large leading dimensions or increments potentially causing overflow:
+  - Level 1: axpy, copy, rot, rotm, scal, swap, asum, dot, iamax, iamin, nrm2
+  - Level 2: gemv, symv, hemv, trmv, ger, syr, her, syr2, her2, trsv
+  - Level 3: gemm, symm, hemm, trmm, syrk, herk, syr2k, her2k, syrkx, herkx, trsm, trtri, dgmm, geam
+  - General: set_vector, get_vector, set_matrix, get_matrix
+  - Related fixes: internal scalar loads with &gt; 32bit offsets
+  - fix in-place functionality for all trtri sizes
+
+##### Changed
+
+- dot when using rocblas_pointer_mode_host is now synchronous to match legacy BLAS as it stores results in host memory
+- enhanced reporting of installation issues caused by runtime libraries (Tensile)
+- standardized internal rocblas C++ interface across most functions
+
+##### Deprecated
+
+- Removal of __STDC_WANT_IEC_60559_TYPES_EXT__ define in future release
+
+##### Dependencies
+
+- optional use of AOCL BLIS 4.0 on Linux for clients
+- optional build tool only dependency on python psutil
+
+#### rocFFT 1.0.24
+
+rocFFT 1.0.24 for ROCm 5.7.0
+
+##### Optimizations
+
+- Improved performance of complex forward/inverse 1D FFTs (2049 &lt;= length &lt;= 131071) that use Bluestein&#39;s algorithm.
+
+##### Added
+
+- Implemented a solution map version converter and finish the first conversion from ver.0 to ver.1. Where version 1 removes some incorrect kernels (sbrc/sbcr using half_lds)
+
+##### Changed
+
+- Moved rocfft_rtc_helper executable to lib/rocFFT directory on Linux.
+- Moved library kernel cache to lib/rocFFT directory.
+
+#### rocm-cmake 0.10.0
+
+rocm-cmake 0.10.0 for ROCm 5.7.0
+
+##### Added
+
+- Added ROCMTest module
+- ROCMCreatePackage: Added support for ASAN packages
+
+#### rocPRIM 2.13.1
+
+rocPRIM 2.13.1 for ROCm 5.7.0
+
+##### Changed
+
+- Deprecated configuration `radix_sort_config` for device-level radix sort as it no longer matches the algorithm&#39;s parameters. New configuration `radix_sort_config_v2` is preferred instead.
+- Removed erroneous implementation of device-level `inclusive_scan` and `exclusive_scan`. The prior default implementation using lookback-scan now is the only available implementation.
+- The benchmark metric indicating the bytes processed for `exclusive_scan_by_key` and `inclusive_scan_by_key` has been changed to incorporate the key type. Furthermore, the benchmark log has been changed such that these algorithms are reported as `scan` and `scan_by_key` instead of `scan_exclusive` and `scan_inclusive`.
+- Deprecated configurations `scan_config` and `scan_by_key_config` for device-level scans, as they no longer match the algorithm&#39;s parameters. New configurations `scan_config_v2` and `scan_by_key_config_v2` are preferred instead.
+
+##### Fixed
+
+- Fixed build issue caused by missing header in `thread/thread_search.hpp`.
+
+#### rocRAND 2.10.17
+
+rocRAND 2.10.17 for ROCm 5.7.0
+
+##### Added
+
+- MT19937 pseudo random number generator based on M. Matsumoto and T. Nishimura, 1998, Mersenne Twister: A 623-dimensionally equidistributed uniform pseudorandom number generator.
+- New benchmark for the device API using Google Benchmark, `benchmark_rocrand_device_api`, replacing `benchmark_rocrand_kernel`. `benchmark_rocrand_kernel` is deprecated and will be removed in a future version. Likewise, `benchmark_curand_host_api` is added to replace `benchmark_curand_generate` and `benchmark_curand_device_api` is added to replace `benchmark_curand_kernel`.
+- experimental HIP-CPU feature
+- ThreeFry pseudorandom number generator based on Salmon et al., 2011, &#34;Parallel random numbers: as easy as 1, 2, 3&#34;.
+
+##### Changed
+
+- Python 2.7 is no longer officially supported.
+
+#### rocSOLVER 3.23.0
+
+rocSOLVER 3.23.0 for ROCm 5.7.0
+
+##### Added
+
+- LU factorization without pivoting for block tridiagonal matrices:
+    - GEBLTTRF_NPVT now supports interleaved\_batched format
+- Linear system solver without pivoting for block tridiagonal matrices:
+    - GEBLTTRS_NPVT now supports interleaved\_batched format
+
+##### Fixed
+
+- Fixed stack overflow in sparse tests on Windows
+
+##### Changed
+
+- Changed rocsolver-test sparse input data search paths to be relative to the test executable
+- Changed build scripts to default to compressed debug symbols in Debug builds
+
+#### rocSPARSE 2.5.4
+
+rocSPARSE 2.5.4 for ROCm 5.7.0
+
+##### Added
+
+- Added more mixed precisions for SpMV, (matrix: float, vectors: double, calculation: double) and (matrix: rocsparse_float_complex, vectors: rocsparse_double_complex, calculation: rocsparse_double_complex)
+- Added support for gfx940, gfx941 and gfx942
+
+##### Improved
+
+- Fixed a bug in csrsm and bsrsm
+
+##### Known Issues
+
+In csritlu0, the algorithm rocsparse_itilu0_alg_sync_split_fusion has some accuracy issues to investigate with XNACK enabled. The fallback is rocsparse_itilu0_alg_sync_split.
+
+#### rocThrust 2.18.0
+
+rocThrust 2.18.0 for ROCm 5.7.0
+
+##### Fixed 
+
+- `lower_bound`, `upper_bound`, and `binary_search` failed to compile for certain types.
+- Fixed issue where `transform_iterator` would not compile with `__device__`-only operators.
+
+##### Changed
+
+- Updated `docs` directory structure to match the standard of [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core).
+- Removed references to and workarounds for deprecated hcc
+
+#### rocWMMA 1.2.0
+
+rocWMMA 1.2.0 for ROCm 5.7.0
+
+##### Changed
+
+- Fixed a bug with synchronization
+- Updated rocWMMA cmake versioning
+
+#### Tensile 4.38.0
+
+Tensile 4.38.0 for ROCm 5.7.0
+
+##### Added
+
+- Added support for FP16 Alt Round Near Zero Mode (this feature allows the generation of alternate kernels with intermediate rounding instead of truncation)
+- Added user-driven solution selection feature
+
+##### Optimizations
+
+- Enabled LocalSplitU with MFMA for I8 data type
+- Optimized K mask code in mfmaIter
+- Enabled TailLoop code in NoLoadLoop to prefetch global/local read
+- Enabled DirectToVgpr in TailLoop for NN, TN, and TT matrix orientations
+- Optimized DirectToLds test cases to reduce the test duration
+
+##### Changed
+
+- Removed DGEMM NT custom kernels and related test cases
+- Changed noTailLoop logic to apply noTailLoop only for NT
+- Changed the range of AssertFree0ElementMultiple and Free1
+- Unified aStr, bStr generation code in mfmaIter
+
+##### Fixed
+
+- Fixed LocalSplitU mismatch issue for SGEMM
+- Fixed BufferStore=0 and Ldc != Ldd case
+- Fixed mismatch issue with TailLoop + MatrixInstB &gt; 1

default.xml

@@ -12,61 +12,60 @@ fetch="https://github.com/GPUOpen-ProfessionalCompute-Libraries/" />
 fetch="https://github.com/GPUOpen-Tools/" />
     <remote name="KhronosGroup"
 fetch="https://github.com/KhronosGroup/" />
-    <default revision="refs/tags/rocm-5.0.2"
+    <default revision="refs/tags/rocm-5.6.1"
      remote="roc-github"
      sync-c="true"
      sync-j="4" />
 <!--list of projects for ROCM-->
-    <project name="ROCK-Kernel-Driver" />
-    <project name="ROCT-Thunk-Interface" />
-    <project name="ROCR-Runtime" />
-    <project name="rocm_smi_lib" />
-    <project name="rocm-cmake" />
-    <project name="rocminfo" />
+    <project name="ROCK-Kernel-Driver" remote="roc-github" />
+    <project name="ROCT-Thunk-Interface" remote="roc-github" />
+    <project name="ROCR-Runtime" remote="roc-github" />
+    <project name="rocm_smi_lib" remote="roc-github" />
+    <project name="rocm-core" remote="roc-github" />
+    <project name="rocm-cmake" remote="roc-github" />
+    <project name="rocminfo" remote="roc-github" />
     <project name="rocprofiler" remote="rocm-devtools" />
     <project name="roctracer" remote="rocm-devtools" />
-    <project name="ROCm-OpenCL-Runtime" />
     <project path="ROCm-OpenCL-Runtime/api/opencl/khronos/icd" name="OpenCL-ICD-Loader" remote="KhronosGroup" revision="6c03f8b58fafd9dd693eaac826749a5cfad515f8" />
-    <project name="clang-ocl" />
+    <project name="clang-ocl" remote="roc-github" />
 <!--HIP Projects-->
     <project name="HIP" remote="rocm-devtools" />
-    <project name="hipamd" remote="rocm-devtools" />
+    <project name="clr" remote="rocm-devtools" />
     <project name="HIP-Examples" remote="rocm-devtools" />
-    <project name="ROCclr" remote="rocm-devtools" />
     <project name="HIPIFY" remote="rocm-devtools" />
+    <project name="HIPCC" remote="rocm-devtools" />
 <!-- The following projects are all associated with the AMDGPU LLVM compiler -->
-    <project name="llvm-project" />
-    <project name="ROCm-Device-Libs" />
-    <project name="atmi" />
-    <project name="ROCm-CompilerSupport" />
+    <project name="llvm-project" remote="roc-github" />
+    <project name="ROCm-Device-Libs" remote="roc-github" />
+    <project name="ROCm-CompilerSupport" remote="roc-github" />
     <project name="rocr_debug_agent" remote="rocm-devtools" />
-    <project name="rocm_bandwidth_test" />
+    <project name="rocm_bandwidth_test" remote="roc-github" />
     <project name="half" remote="rocm-swplat" revision="37742ce15b76b44e4b271c1e66d13d2fa7bd003e" />
     <project name="RCP" remote="gpuopen-tools" revision="3a49405a1500067c49d181844ec90aea606055bb" />
 <!-- gdb projects -->
     <project name="ROCgdb" remote="rocm-devtools" />
     <project name="ROCdbgapi" remote="rocm-devtools" />
 <!-- ROCm Libraries -->
-    <project name="rdc" />
-    <project name="rocBLAS" remote="rocm-swplat" />
-    <project name="Tensile" remote="rocm-swplat" />
-    <project name="hipBLAS" remote="rocm-swplat" />
-    <project name="rocFFT" remote="rocm-swplat" />
-    <project name="hipFFT" remote="rocm-swplat" />
-    <project name="rocRAND" remote="rocm-swplat" />
-    <project name="rocSPARSE" remote="rocm-swplat" />
-    <project name="rocSOLVER" remote="rocm-swplat" />
-    <project name="hipSOLVER" remote="rocm-swplat" />
-    <project name="hipSPARSE" remote="rocm-swplat" />
-    <project name="rocALUTION" remote="rocm-swplat" />
-    <project name="MIOpenGEMM" remote="rocm-swplat" />
+    <project name="rdc" remote="roc-github" />
+    <project groups="mathlibs" name="rocBLAS" remote="rocm-swplat" />
+    <project groups="mathlibs" name="Tensile" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipBLAS" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocFFT" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipFFT" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocRAND" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocSPARSE" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocSOLVER" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSOLVER" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSPARSE" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSPARSELt" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocALUTION" remote="rocm-swplat" />
     <project name="MIOpen" remote="rocm-swplat" />
-    <project name="MIOpenTensile" remote="rocm-swplat" />
-    <project name="rccl" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rccl" remote="rocm-swplat" />
     <project name="MIVisionX" remote="gpuopen-libs" />
-    <project name="rocThrust" remote="rocm-swplat" />
-    <project name="hipCUB" remote="rocm-swplat" />
-    <project name="rocPRIM" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocThrust" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipCUB" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocPRIM" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocWMMA" remote="rocm-swplat" />
     <project name="hipfort" remote="rocm-swplat" />
     <project name="AMDMIGraphX" remote="rocm-swplat" />
     <project name="ROCmValidationSuite" remote="rocm-devtools" />

docs/404.md

@@ -0,0 +1,7 @@
+# 404 - Page Not Found
+
+```{figure} ./data/AMD-404.png
+:align: center
+```
+
+Return [home](./index) or use the sidebar navigation to get back on track.

docs/about.md

@@ -0,0 +1,74 @@
+# About ROCm Documentation
+
+ROCm documentation is made available under open source [licenses](licensing.md).
+Documentation is built using open source toolchains. Contributions to our
+documentation is encouraged and welcome. As a contributor, please familiarize
+yourself with our documentation toolchain.
+
+## `rocm-docs-core`
+
+[rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) is an AMD-maintained
+project that applies customization for our documentation. This
+project is the tool most ROCm repositories use as part of the documentation
+build. It is also available as a [pip package on PyPI](https://pypi.org/project/rocm-docs-core/).
+
+See the user and developer guides for rocm-docs-core at {doc}`rocm-docs-core documentation <rocm-docs-core:index>`.
+
+## Sphinx
+
+[Sphinx](https://www.sphinx-doc.org/en/master/) is a documentation generator
+originally used for Python. It is now widely used in the Open Source community.
+Originally, Sphinx supported reStructuredText (RST) based documentation, but
+Markdown support is now available.
+ROCm documentation plans to default to Markdown for new projects.
+Existing projects using RST are under no obligation to convert to Markdown. New
+projects that believe Markdown is not suitable should contact the documentation
+team prior to selecting RST.
+
+## Read the Docs
+
+[Read the Docs](https://docs.readthedocs.io/en/stable/) is the service that builds
+and hosts the HTML documentation generated using Sphinx to our end users.
+
+## Doxygen
+
+[Doxygen](https://www.doxygen.nl/) is a documentation generator that extracts
+information from inline code.
+ROCm projects typically use Doxygen for public API documentation unless the
+upstream project uses a different tool.
+
+### Breathe
+
+[Breathe](https://www.breathe-doc.org/) is a Sphinx plugin to integrate Doxygen
+content.
+
+### MyST
+
+[Markedly Structured Text (MyST)](https://myst-tools.org/docs/spec) is an extended
+flavor of Markdown ([CommonMark](https://commonmark.org/)) influenced by reStructuredText (RST) and Sphinx.
+It is integrated into ROCm documentation by the Sphinx extension [`myst-parser`](https://myst-parser.readthedocs.io/en/latest/).
+A cheat sheet that showcases how to use the MyST syntax is available over at
+the [Jupyter reference](https://jupyterbook.org/en/stable/reference/cheatsheet.html).
+
+### Sphinx External TOC
+
+[Sphinx External Table of Contents (TOC)](https://sphinx-external-toc.readthedocs.io/en/latest/intro.html)
+is a Sphinx extension used for ROCm documentation navigation. This tool generates a navigation menu on the left
+based on a YAML file that specifies the table of contents.
+It was selected due to its flexibility that allows scripts to operate on the
+YAML file. Please transition to this file for the project's navigation. You can
+see the `_toc.yml.in` file in this repository in the `docs/sphinx` folder for an
+example.
+
+### Sphinx Book Theme
+
+[Sphinx Book Theme](https://sphinx-book-theme.readthedocs.io/en/latest/) is a Sphinx theme
+that defines the base appearance for ROCm documentation.
+ROCm documentation applies some customization,
+such as a custom header and footer on top of the Sphinx Book Theme.
+
+### Sphinx Design
+
+[Sphinx Design](https://sphinx-design.readthedocs.io/en/latest/index.html) is a Sphinx extension that adds design
+functionality.
+ROCm documentation uses Sphinx Design for grids, cards, and synchronized tabs.

docs/conf.py

@@ -0,0 +1,97 @@
+# Configuration file for the Sphinx documentation builder.
+#
+# This file only contains a selection of the most common options. For a full
+# list see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+import shutil
+
+from rocm_docs import ROCmDocs
+
+
+shutil.copy2('../CONTRIBUTING.md','./contributing.md')
+shutil.copy2('../RELEASE.md','./release.md')
+# Keep capitalization due to similar linking on GitHub's markdown preview.
+shutil.copy2('../CHANGELOG.md','./CHANGELOG.md')
+
+latex_engine = "xelatex"
+
+# configurations for PDF output by Read the Docs
+project = "ROCm Documentation"
+author = "Advanced Micro Devices, Inc."
+copyright = "Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved."
+version = "5.7.0"
+release = "5.7.0"
+
+setting_all_article_info = True
+all_article_info_os = ["linux", "windows"]
+all_article_info_author = ""
+
+# pages with specific settings
+article_pages = [
+    {
+        "file":"release",
+        "os":["linux", "windows"],
+        "date":"2023-07-27"
+    },
+
+    {"file":"deploy/linux/index", "os":["linux"]},
+    {"file":"deploy/linux/install_overview", "os":["linux"]},
+    {"file":"deploy/linux/prerequisites", "os":["linux"]},
+    {"file":"deploy/linux/quick_start", "os":["linux"]},
+    {"file":"deploy/linux/install", "os":["linux"]},
+    {"file":"deploy/linux/upgrade", "os":["linux"]},
+    {"file":"deploy/linux/uninstall", "os":["linux"]},
+    {"file":"deploy/linux/package_manager_integration", "os":["linux"]},
+    {"file":"deploy/docker", "os":["linux"]},
+    
+    {"file":"deploy/windows/cli/index", "os":["windows"]},
+    {"file":"deploy/windows/cli/install", "os":["windows"]},
+    {"file":"deploy/windows/cli/uninstall", "os":["windows"]},
+    {"file":"deploy/windows/cli/upgrade", "os":["windows"]},
+    {"file":"deploy/windows/gui/index", "os":["windows"]},
+    {"file":"deploy/windows/gui/install", "os":["windows"]},
+    {"file":"deploy/windows/gui/uninstall", "os":["windows"]},
+    {"file":"deploy/windows/gui/upgrade", "os":["windows"]},
+    {"file":"deploy/windows/index", "os":["windows"]},
+    {"file":"deploy/windows/prerequisites", "os":["windows"]},
+    {"file":"deploy/windows/quick_start", "os":["windows"]},
+
+    {"file":"release/gpu_os_support", "os":["linux"]},
+    {"file":"release/windows_support", "os":["windows"]},
+    {"file":"release/docker_support_matrix", "os":["linux"]},
+    
+    {"file":"reference/gpu_libraries/communication", "os":["linux"]},
+    {"file":"reference/ai_tools", "os":["linux"]},
+    {"file":"reference/management_tools", "os":["linux"]},
+    {"file":"reference/validation_tools", "os":["linux"]},
+    {"file":"reference/framework_compatibility/framework_compatibility", "os":["linux"]},
+    {"file":"reference/computer_vision", "os":["linux"]},
+    
+    {"file":"how_to/deep_learning_rocm", "os":["linux"]},
+    {"file":"how_to/gpu_aware_mpi", "os":["linux"]},
+    {"file":"how_to/magma_install/magma_install", "os":["linux"]},
+    {"file":"how_to/pytorch_install/pytorch_install", "os":["linux"]},
+    {"file":"how_to/system_debugging", "os":["linux"]},
+    {"file":"how_to/tensorflow_install/tensorflow_install", "os":["linux"]},
+
+    {"file":"examples/machine_learning", "os":["linux"]},
+    {"file":"examples/inception_casestudy/inception_casestudy", "os":["linux"]},
+    
+    {"file":"understand/file_reorg", "os":["linux"]},
+
+    {"file":"understand/isv_deployment_win", "os":["windows"]},
+]
+
+external_toc_path = "./sphinx/_toc.yml"
+
+docs_core = ROCmDocs("ROCm 5.7.0 Documentation Home")
+docs_core.setup()
+
+external_projects_current_project = "rocm"
+
+for sphinx_var in ROCmDocs.SPHINX_VARS:
+    globals()[sphinx_var] = getattr(docs_core, sphinx_var)
+html_theme_options = {
+    "link_main_doc": False
+}

docs/contribute/building.md

@@ -0,0 +1,165 @@
+# Building Documentation
+
+While contributing, one may build the documentation locally on the command-line
+or rely on Continuous Integration for previewing the resulting HTML pages in a
+browser.
+
+## Pull Request documentation builds
+
+When opening a PR to the `develop` branch on GitHub, the page corresponding to
+the PR (`https://github.com/RadeonOpenCompute/ROCm/pull/<pr_number>`) will have
+a summary at the bottom. This requires the user be logged in to GitHub.
+
+- There, click `Show all checks` and `Details` of the Read the Docs pipeline. It
+  will take you to a URL of the form
+  `https://readthedocs.com/projects/advanced-micro-devices-rocm/builds/<some_build_num>/`
+  - The list of commands shown are the exact ones used by CI to produce a render
+    of the documentation.
+- There, click on the small blue link `View docs` (which is not the same as the
+  bigger button with the same text). It will take you to the built HTML site with
+  a URL of the form
+  `https://advanced-micro-devices-demo--<pr_number>.com.readthedocs.build/projects/alpha/en/<pr_number>/`.
+
+## Build documentation from the Command Line
+
+Python versions known to build documentation:
+
+- 3.8
+
+To build the docs locally using Python Virtual Environment (`venv`), execute the
+following commands from the project root:
+
+```sh
+python3 -mvenv .venv
+# Windows
+.venv/Scripts/python -m pip install -r docs/sphinx/requirements.txt
+.venv/Scripts/python -m sphinx -T -E -b html -d _build/doctrees -D language=en docs _build/html
+# Linux
+.venv/bin/python     -m pip install -r docs/sphinx/requirements.txt
+.venv/bin/python     -m sphinx -T -E -b html -d _build/doctrees -D language=en docs _build/html
+```
+
+Then open up `_build/html/index.html` in your favorite browser.
+
+## Build documentation using Visual Studio (VS) Code
+
+One can put together a productive environment to author documentation and also
+test it locally using VS Code with only a handful of extensions. Even though the
+extension landscape of VS Code is ever changing, here is one example setup that
+proved useful at the time of writing. In it, one can change/add content, build a
+new version of the docs using a single VS Code Task (or hotkey), see all errors/
+warnings emitted by Sphinx in the Problems pane and immediately see the
+resulting website show up on a locally-served web server.
+
+### Configuring VS Code
+
+1. Install the following extensions:
+
+    - Python `(ms-python.python)`
+    - Live Server `(ritwickdey.LiveServer)`
+
+2. Add the following entries in `.vscode/settings.json`
+
+    ```json
+    {
+      "liveServer.settings.root": "/.vscode/build/html",
+      "liveServer.settings.wait": 1000,
+      "python.terminal.activateEnvInCurrentTerminal": true
+    }
+    ```
+
+    The settings above are used for the following reasons:
+    - `liveServer.settings.root`: Sets the root of the output website for live previews. Must be changed
+      alongside the `tasks.json` command.
+    - `liveServer.settings.wait`: Tells live server to wait with the update to give time for Sphinx to
+      regenerate site contents and not refresh before all is done. (Empirical value)
+    - `python.terminal.activateEnvInCurrentTerminal`: Automatic virtual environment activation is a nice touch,
+      should you want to build the site from the integrated terminal.
+
+3. Add the following tasks in `.vscode/tasks.json`
+
+    ```json
+    {
+      "version": "2.0.0",
+      "tasks": [
+        {
+          "label": "Build Docs",
+          "type": "process",
+          "windows": {
+            "command": "${workspaceFolder}/.venv/Scripts/python.exe"
+          },
+          "command": "${workspaceFolder}/.venv/bin/python3",
+          "args": [
+            "-m",
+            "sphinx",
+            "-j",
+            "auto",
+            "-T",
+            "-b",
+            "html",
+            "-d",
+            "${workspaceFolder}/.vscode/build/doctrees",
+            "-D",
+            "language=en",
+            "${workspaceFolder}/docs",
+            "${workspaceFolder}/.vscode/build/html"
+          ],
+          "problemMatcher": [
+            {
+              "owner": "sphinx",
+              "fileLocation": "absolute",
+              "pattern": {
+                "regexp": "^(?:.*\\.{3}\\s+)?(\\/[^:]*|[a-zA-Z]:\\\\[^:]*):(\\d+):\\s+(WARNING|ERROR):\\s+(.*)$",
+                "file": 1,
+                "line": 2,
+                "severity": 3,
+                "message": 4
+              },
+            },
+            {
+              "owner": "sphinx",
+              "fileLocation": "absolute",
+              "pattern": {
+                "regexp": "^(?:.*\\.{3}\\s+)?(\\/[^:]*|[a-zA-Z]:\\\\[^:]*):{1,2}\\s+(WARNING|ERROR):\\s+(.*)$",
+                "file": 1,
+                "severity": 2,
+                "message": 3
+              }
+            }
+          ],
+          "group": {
+            "kind": "build",
+            "isDefault": true
+          }
+        },
+      ],
+    }
+    ```
+
+    > (Implementation detail: two problem matchers were needed to be defined,
+    > because VS Code doesn't tolerate some problem information being potentially
+    > absent. While a single regex could match all types of errors, if a capture
+    > group remains empty (the line number doesn't show up in all warning/error
+    > messages) but the `pattern` references said empty capture group, VS Code
+    > discards the message completely.)
+
+4. Configure Python virtual environment (`venv`)
+
+    - From the Command Palette, run `Python: Create Environment`
+      - Select `venv` environment and the `docs/sphinx/requirements.txt` file.
+      _(Simply pressing enter while hovering over the file from the drop down is
+      insufficient, one has to select the radio button with the 'Space' key if
+      using the keyboard.)_
+
+5. Build the docs
+
+    - Launch the default build Task using either:
+      - a hotkey _(default is `Ctrl+Shift+B`)_ or
+      - by issuing the `Tasks: Run Build Task` from the Command Palette.
+
+6. Open the live preview
+
+    - Navigate to the output of the site within VS Code, right-click on
+    `.vscode/build/html/index.html` and select `Open with Live Server`. The
+    contents should update on every rebuild without having to refresh the
+    browser.

docs/contribute/feedback.md

@@ -0,0 +1,27 @@
+# How to provide feedback for ROCm documentation
+
+There are four standard ways to provide feedback for this repository.
+
+## Pull Request
+
+All contributions to ROCm documentation should arrive via the
+[GitHub Flow](https://docs.github.com/en/get-started/quickstart/github-flow)
+targeting the develop branch of the repository. If you are unable to contribute
+via the GitHub Flow, feel free to email us.
+
+## GitHub Discussions
+
+To ask questions or view answers to frequently asked questions, refer to
+[GitHub Discussions](https://github.com/RadeonOpenCompute/ROCm/discussions).
+On GitHub Discussions, in addition to asking and answering questions,
+members can share updates, have open-ended conversations,
+and follow along on via public announcements.
+
+## GitHub Issue
+
+Issues on existing or absent docs can be filed as
+[GitHub Issues](https://github.com/RadeonOpenCompute/ROCm/issues).
+
+## Email
+
+Send other feedback or questions to [rocm-feedback@amd.com](rocm-feedback@amd.com)