am: add support for 7600 (#8910)

* am: start to add support for 7600

* test_tiny passes

* mmhub 3 0 2

* cleaner
This commit is contained in:
nimlgen
2025-02-06 14:04:07 +03:00
committed by GitHub
parent ae45826758
commit 86feb98dcd
7 changed files with 23645 additions and 4 deletions

View File

@@ -331,6 +331,12 @@ generate_am() {
-o $BASE/am/mmhub_3_0_0.py
fixup $BASE/am/mmhub_3_0_0.py
clang2py -k cdefstum \
extra/amdpci/headers/mmhub_3_0_2_offset.h \
extra/amdpci/headers/mmhub_3_0_2_sh_mask.h \
-o $BASE/am/mmhub_3_0_2.py
fixup $BASE/am/mmhub_3_0_2.py
clang2py -k cdefstum \
extra/amdpci/headers/nbio_4_3_0_offset.h \
extra/amdpci/headers/nbio_4_3_0_sh_mask.h \

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -426,6 +426,7 @@ class KFDIface:
class AMAllocationMeta: owner:AMDDevice; mapped_devs:list[AMDDevice]; mapping:AMMapping # noqa: E702
class PCIIface:
supported_devs:list[int] = [0x744c, 0x7480]
vfio:bool = getenv("VFIO", 1) and HWInterface.exists("/dev/vfio/vfio")
vfio_fd:HWInterface
gpus:list[Any] = []
@@ -437,7 +438,7 @@ class PCIIface:
libpciaccess.pci_system_init()
pci_iter = libpciaccess.pci_id_match_iterator_create(None)
while pcidev:=libpciaccess.pci_device_next(pci_iter):
if pcidev.contents.vendor_id == 0x1002 and pcidev.contents.device_id == 0x744c: PCIIface.gpus.append(pcidev.contents)
if pcidev.contents.vendor_id == 0x1002 and pcidev.contents.device_id in PCIIface.supported_devs: PCIIface.gpus.append(pcidev.contents)
# TODO: visible_devices should be handled layer above this?
visible_devices = [int(x) for x in (getenv('VISIBLE_DEVICES', getenv('HIP_VISIBLE_DEVICES', ''))).split(',') if x.strip()]

View File

@@ -1,7 +1,7 @@
from __future__ import annotations
import ctypes, collections, time, dataclasses, pathlib, fcntl, os
from tinygrad.helpers import to_mv, mv_address, getenv, round_up, DEBUG, temp
from tinygrad.runtime.autogen.am import am, mp_11_0, mp_13_0_0, nbio_4_3_0, mmhub_3_0_0, gc_11_0_0, osssys_6_0_0
from tinygrad.runtime.autogen.am import am, mp_11_0, gc_11_0_0
from tinygrad.runtime.support.allocator import TLSFAllocator
from tinygrad.runtime.support.am.ip import AM_SOC21, AM_GMC, AM_IH, AM_PSP, AM_SMU, AM_GFX, AM_SDMA
@@ -371,8 +371,16 @@ class AMDev:
gc_info = am.struct_gc_info_v1_0.from_address(gc_addr:=ctypes.addressof(bhdr) + bhdr.table_list[am.GC].offset)
self.gc_info = getattr(am, f"struct_gc_info_v{gc_info.header.version_major}_{gc_info.header.version_minor}").from_address(gc_addr)
def _ip_module(self, prefix:str, hwip):
version = [self.ip_versions[hwip]//10000, (self.ip_versions[hwip]//100)%100, self.ip_versions[hwip]%100]
for ver in [version, version[:2]+[0], version[:1]+[0, 0]]:
try: return __import__(f"tinygrad.runtime.autogen.am.{prefix}_{ver[0]}_{ver[1]}_{ver[2]}", fromlist=[f"{prefix}_{ver[0]}_{ver[1]}_{ver[2]}"])
except ImportError: pass
assert False, f"am {self.devfmt}: failed to load {prefix} module with version {version}"
def _build_regs(self):
mods = [("MP0", mp_13_0_0), ("MP1", mp_11_0), ("NBIO", nbio_4_3_0), ("MMHUB", mmhub_3_0_0), ("GC", gc_11_0_0), ("OSSSYS", osssys_6_0_0)]
mods = [("MP0", self._ip_module("mp", am.MP0_HWIP)), ("NBIO", self._ip_module("nbio", am.NBIO_HWIP)), ("GC", self._ip_module("gc", am.GC_HWIP)),
("MP1", mp_11_0), ("MMHUB", self._ip_module("mmhub", am.MMHUB_HWIP)), ("OSSSYS", self._ip_module("osssys", am.OSSSYS_HWIP))]
for base, module in mods:
rpref = "mm" if base == "MP1" else "reg" # MP1 regs starts with mm
reg_names: set[str] = set(k[len(rpref):] for k in module.__dict__.keys() if k.startswith(rpref) and not k.endswith("_BASE_IDX"))

View File

@@ -18,7 +18,7 @@ class AM_GMC(AM_IP):
super().__init__(adev)
# Memory controller aperture
self.mc_base = self.adev.regMMMC_VM_FB_LOCATION_BASE.read() << 24
self.mc_base = (self.adev.regMMMC_VM_FB_LOCATION_BASE.read() & 0xFFFFFF) << 24
self.mc_end = self.mc_base + self.adev.mm.vram_size - 1
# VM aperture