Update documentation requirements

* update SLES 15.4 prerequisites

* update wordlist from develop

* fixing spelling errors

.github/CODEOWNERS

@@ -1 +1 @@
-* @saadrahim @Rmalavally @amd-aakash @zhang2amd @jlgreathouse
+* @saadrahim @Rmalavally @amd-aakash @zhang2amd @jlgreathouse @samjwu @MathiasMagnus

.github/dependabot.yml

@@ -0,0 +1,12 @@
+# To get started with Dependabot version updates, you'll need to specify which
+# package ecosystems to update and where the package manifests are located.
+# Please see the documentation for all configuration options:
+# https://docs.github.com/github/administering-a-repository/configuration-options-for-dependency-updates
+
+version: 2
+updates:
+  - package-ecosystem: "pip" # See documentation for possible values
+    directory: "/docs/sphinx" # Location of package manifests
+    open-pull-requests-limit: 10
+    schedule:
+      interval: "daily"

.github/workflows/linting.yml

@@ -0,0 +1,20 @@
+name: Linting
+
+on:
+  push:
+    branches: 
+    - develop
+    - main
+    - 'docs/*'
+    - 'roc**'
+  pull_request:
+    branches: 
+    - develop
+    - main
+    - 'docs/*'
+    - 'roc**'
+
+jobs:
+  call-workflow-passing-data:
+    name: Documentation
+    uses: RadeonOpenCompute/rocm-docs-core/.github/workflows/linting.yml@develop

.gitignore

@@ -0,0 +1,18 @@
+.venv
+.vscode
+build
+
+# documentation artifacts
+_build/
+_images/
+_static/
+_templates/
+_toc.yml
+docBin/
+_doxygen/
+_readthedocs/
+
+# avoid duplicating contributing.md due to conf.py
+docs/contributing.md
+docs/release.md
+docs/CHANGELOG.md

.markdownlint-cli2.yaml

@@ -0,0 +1,14 @@
+config:
+  default: true
+  MD013: false
+  MD026:
+    punctuation: '.,;:!'
+  MD029:
+    style: ordered
+  MD033: false
+  MD034: false
+  MD041: false
+ignores:
+  - CHANGELOG.md
+  - "{,docs/}{RELEASE,release}.md"
+  - tools/autotag/templates/**/*.md

.readthedocs.yaml

@@ -0,0 +1,21 @@
+# Read the Docs configuration file
+# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
+
+version: 2
+
+build:
+   os: ubuntu-22.04
+   tools:
+      python: "3.10"
+   apt_packages:
+     - "doxygen"
+     - "graphviz" # For dot graphs in doxygen
+
+python:
+   install:
+   - requirements: docs/sphinx/requirements.txt
+
+sphinx:
+   configuration: docs/conf.py
+
+formats: []

.wordlist.txt

@@ -0,0 +1,686 @@
+AAC
+ABI
+ACE
+ACEs
+AccVGPR
+AccVGPRs
+ALU
+AMD
+AMDGPU
+AMDGPUs
+AMDMIGraphX
+AMI
+AOCC
+AOMP
+APIC
+APIs
+APU
+ASIC
+ASICs
+ASan
+ASm
+ATI
+AddressSanitizer
+AlexNet
+Arb
+BLAS
+BMC
+BitCode
+Blit
+Bluefield
+CCD
+CDNA
+CIFAR
+CLI
+CLion
+CMake
+CMakeLists
+CMakePackage
+CP
+CPC
+CPF
+CPP
+CPU
+CPUs
+CSC
+CSE
+CSV
+CSn
+CTests
+CU
+CUDA
+CUs
+CXX
+Cavium
+CentOS
+ChatGPT
+CoRR
+Codespaces
+Commitizen
+CommonMark
+Concretized
+Conda
+ConnectX
+DGEMM
+DKMS
+DL
+DMA
+DNN
+DNNL
+DPM
+DRI
+DW
+DWORD
+Dask
+DataFrame
+DataLoader
+DataParallel
+DeepSpeed
+Dependabot
+DevCap
+Dockerfile
+Doxygen
+ELMo
+ENDPGM
+EPYC
+ESXi
+FFT
+FFTs
+FFmpeg
+FHS
+FMA
+FP
+Filesystem
+Flang
+Fortran
+Fuyu
+GALB
+GCD
+GCDs
+GCN
+GDB
+GDDR
+GDR
+GDS
+GEMM
+GEMMs
+GFortran
+GiB
+GIM
+GL
+GLXT
+GMI
+GPG
+GPR
+GPT
+GPU
+GPU's
+GPUs
+GRBM
+GenAI
+GenZ
+GitHub
+Gitpod
+HBM
+HCA
+HIPCC
+HIPExtension
+HIPIFY
+HPC
+HPCG
+HPE
+HPL
+HSA
+HWE
+Haswell
+Higgs
+Hyperparameters
+ICV
+IDE
+IDEs
+IMDb
+IOMMU
+IOP
+IOPM
+IOV
+IRQ
+ISA
+ISV
+ISVs
+ImageNet
+InfiniBand
+Inlines
+IntelliSense
+Intersphinx
+Intra
+Ioffe
+JSON
+Jupyter
+KFD
+KiB
+KVM
+Keras
+Khronos
+LAPACK
+LCLK
+LDS
+LLM
+LLMs
+LLVM
+LM
+LSAN
+LTS
+LoRA
+MEM
+MERCHANTABILITY
+MFMA
+MiB
+MIGraphX
+MIOpen
+MIOpenGEMM
+MIVisionX
+MLM
+MMA
+MMIO
+MMIOH
+MNIST
+MPI
+MSVC
+MVAPICH
+MVFFR
+Makefile
+Makefiles
+Matplotlib
+Megatron
+Mellanox
+Mellanox's
+Meta's
+MirroredStrategy
+Multicore
+Multithreaded
+MyEnvironment
+MyST
+NBIO
+NBIOs
+NIC
+NICs
+NLI
+NLP
+NPS
+NSP
+NUMA
+NVCC
+NVIDIA
+NVPTX
+NaN
+Nano
+Navi
+Noncoherently
+NousResearch's
+NumPy
+OAM
+OAMs
+OCP
+OEM
+OFED
+OMP
+OMPI
+OMPT
+OMPX
+ONNX
+OSS
+OSU
+OpenCL
+OpenCV
+OpenFabrics
+OpenGL
+OpenMP
+OpenSSL
+OpenVX
+PCI
+PCIe
+PEFT
+PIL
+PILImage
+PRNG
+PRs
+PaLM
+Pageable
+PeerDirect
+Perfetto
+PipelineParallel
+PnP
+PowerShell
+PyPi
+PyTorch
+Qcycles
+RAII
+RCCL
+RDC
+RDMA
+RDNA
+RHEL
+ROC
+ROCProfiler
+ROCTracer
+ROCclr
+ROCdbgapi
+ROCgdb
+ROCk
+ROCm
+ROCmCC
+ROCmSoftwarePlatform
+ROCmValidationSuite
+ROCr
+RST
+RW
+Radeon
+RelWithDebInfo
+Req
+Rickle
+RoCE
+Ryzen
+SALU
+SBIOS
+SCA
+SDK
+SDMA
+SDRAM
+SENDMSG
+SGPR
+SGPRs
+SHA
+SIGQUIT
+SIMD
+SIMDs
+SKU
+SKUs
+SLES
+SMEM
+SMI
+SMT
+SPI
+SQs
+SRAM
+SRAMECC
+SVD
+SWE
+SerDes
+Shlens
+Skylake
+Softmax
+Spack
+Supermicro
+Szegedy
+TCA
+TCC
+TCI
+TCIU
+TCP
+TCR
+TF
+TFLOPS
+TPU
+TPUs
+TensorBoard
+TensorFlow
+TensorParallel
+ToC
+TorchAudio
+TorchMIGraphX
+TorchScript
+TorchServe
+TorchVision
+TransferBench
+TrapStatus
+UAC
+UC
+UCC
+UCX
+UIF
+USM
+UTCL
+UTIL
+Uncached
+Unhandled
+VALU
+VBIOS
+VGPR
+VGPRs
+VM
+VMEM
+VMWare
+VRAM
+VSIX
+VSkipped
+Vanhoucke
+Vulkan
+WGP
+WGPs
+WX
+WikiText
+Wojna
+Workgroups
+Writebacks
+XCD
+XCDs
+XGBoost
+XGBoost's
+XGMI
+XT
+XTX
+Xeon
+Xilinx
+Xnack
+Xteam
+YAML
+YML
+YModel
+ZeRO
+ZenDNN
+accuracies
+activations
+addr
+alloc
+allocator
+allocators
+amdgpu
+api
+atmi
+atomics
+autogenerated
+avx
+awk
+backend
+backends
+benchmarking
+bfloat
+bilinear
+bitsandbytes
+blit
+boson
+bosons
+buildable
+bursty
+bzip
+cacheable
+cd
+centos
+centric
+changelog
+chiplet
+cmake
+cmd
+coalescable
+codename
+collater
+comgr
+completers
+composable
+concretization
+config
+conformant
+convolutional
+convolves
+cpp
+csn
+cuBLAS
+cuFFT
+cuLIB
+cuRAND
+cuSOLVER
+cuSPARSE
+dataset
+datasets
+dataspace
+datatype
+datatypes
+dbgapi
+de
+deallocation
+denoise
+denoised
+denoises
+denormalize
+deserializers
+detections
+dev
+devicelibs
+devsel
+dimensionality
+disambiguates
+distro
+el
+embeddings
+enablement
+endpgm
+encodings
+env
+epilog
+etcetera
+ethernet
+exascale
+executables
+ffmpeg
+filesystem
+fortran
+galb
+gcc
+gdb
+gfortran
+gfx
+githooks
+github
+gnupg
+grayscale
+gzip
+heterogenous
+hipBLAS
+hipBLASLt
+hipCUB
+hipFFT
+hipLIB
+hipRAND
+hipSOLVER
+hipSPARSE
+hipSPARSELt
+hipTensor
+hipamd
+hipblas
+hipcub
+hipfft
+hipfort
+hipify
+hipsolver
+hipsparse
+hpp
+hsa
+hsakmt
+hyperparameter
+ib_core
+inband
+incrementing
+inferencing
+inflight
+init
+initializer
+inlining
+installable
+interprocedural
+intra
+invariants
+invocating
+ipo
+kdb
+latencies
+libfabric
+libjpeg
+libs
+linearized
+linter
+linux
+llvm
+localscratch
+logits
+lossy
+macOS
+matchers
+microarchitecture
+migraphx
+miopen
+miopengemm
+mivisionx
+mkdir
+mlirmiopen
+mtypes
+mvffr
+namespace
+namespaces
+numref
+ocl
+opencl
+opencv
+openmp
+openssl
+optimizers
+os
+pageable
+parallelization
+parameterization
+passthrough
+perfcounter
+performant
+perl
+pragma
+pre
+prebuilt
+precompiled
+prefetch
+prefetchable
+preprocess
+preprocessed
+preprocessing
+prequantized
+prerequisites
+profiler
+protobuf
+pseudorandom
+py
+quasirandom
+queueing
+rccl
+rdc
+reStructuredText
+reformats
+repos
+representativeness
+req
+resampling
+rescaling
+reusability
+roadmap
+roc
+rocAL
+rocALUTION
+rocBLAS
+rocFFT
+rocLIB
+rocMLIR
+rocPRIM
+rocRAND
+rocSOLVER
+rocSPARSE
+rocThrust
+rocWMMA
+rocalution
+rocblas
+rocclr
+rocfft
+rocm
+rocminfo
+rocprim
+rocprof
+rocprofiler
+rocr
+rocrand
+rocsolver
+rocsparse
+rocthrust
+roctracer
+runtime
+runtimes
+sL
+scalability
+scalable
+sendmsg
+serializers
+shader
+sharding
+sigmoid
+sm
+smi
+softmax
+spack
+src
+stochastically
+strided
+subdirectory
+subexpression
+subfolder
+subfolders
+supercomputing
+tensorfloat
+th
+tokenization
+tokenize
+tokenized
+tokenizer
+tokenizes
+toolchain
+toolchains
+toolset
+toolsets
+torchvision
+tqdm
+tracebacks
+txt
+uarch
+uncached
+uncorrectable
+uninstallation
+unsqueeze
+unstacking
+unswitching
+untrusted
+untuned
+upvote
+USM
+UTCL
+UTIL
+utils
+vL
+variational
+vdi
+vectorizable
+vectorization
+vectorize
+vectorized
+vectorizer
+vectorizes
+vjxb
+walkthrough
+walkthroughs
+wavefront
+wavefronts
+whitespaces
+workgroup
+workgroups
+writeback
+writebacks
+wrreq
+wzo
+xargs
+xz
+yaml
+ysvmadyb
+zypper

CONTRIBUTING.md

@@ -0,0 +1,71 @@
+# Contributing to ROCm Docs
+
+AMD values and encourages the ROCm community to contribute to our code and
+documentation. This repository is focused on ROCm documentation and this
+contribution guide describes the recommended method for creating and modifying our
+documentation.
+
+While interacting with ROCm Documentation, we encourage you to be polite and
+respectful in your contributions, content or otherwise. Authors, maintainers of
+these docs act on good intentions and to the best of their knowledge.
+Keep that in mind while you engage. Should you have issues with contributing
+itself, refer to
+[discussions](https://github.com/RadeonOpenCompute/ROCm/discussions) on the
+GitHub repository.
+
+For additional information on documentation functionalities,
+see the user and developer guides for rocm-docs-core
+at {doc}`rocm-docs-core documentation <rocm-docs-core:index>`.
+
+## Supported Formats
+
+Our documentation includes both Markdown and RST files. Markdown is encouraged
+over RST due to the lower barrier to participation. GitHub-flavored Markdown is preferred
+for all submissions as it renders accurately on our GitHub repositories. For existing documentation,
+[MyST](https://myst-parser.readthedocs.io/en/latest/intro.html) Markdown
+is used to implement certain features unsupported in GitHub Markdown. This is
+not encouraged for new documentation. AMD will transition
+to stricter use of GitHub-flavored Markdown with a few caveats. ROCm documentation
+also uses [Sphinx Design](https://sphinx-design.readthedocs.io/en/latest/index.html)
+in our Markdown and RST files. We also use Breathe syntax for Doxygen documentation
+in our Markdown files. See
+[GitHub](https://docs.github.com/en/get-started/writing-on-github/getting-started-with-writing-and-formatting-on-github)'s
+guide on writing and formatting on GitHub as a starting point.
+
+ROCm documentation adds additional requirements to Markdown and RST based files
+as follows:
+
+- Level one headers are only used for page titles. There must be only one level
+  1 header per file for both Markdown and Restructured Text.
+- Pass [markdownlint](https://github.com/markdownlint/markdownlint) check via
+  our automated GitHub action on a Pull Request (PR).
+  See the {doc}`rocm-docs-core linting user guide <rocm-docs-core:user_guide/linting>` for more details.
+
+## Filenames and folder structure
+
+Please use snake case (all lower case letters and underscores instead of spaces)
+for file names. For example, `example_file_name.md`.
+Our documentation follows Pitchfork for folder structure.
+All documentation is in `/docs` except for special files like
+the contributing guide in the `/` folder. All images used in the documentation are
+placed in the `/docs/data` folder.
+
+## Language and Style
+
+Adopt Microsoft CPP-Docs guidelines for
+[Voice and Tone](https://github.com/MicrosoftDocs/cpp-docs/blob/main/styleguide/voice-tone.md).
+
+ROCm documentation templates to be made public shortly. ROCm templates dictate
+the recommended structure and flow of the documentation. Guidelines on how to
+integrate figures, equations, and tables are all based off
+[MyST](https://myst-parser.readthedocs.io/en/latest/intro.html).
+
+Font size and selection, page layout, white space control, and other formatting
+details are controlled via [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core).
+Raise issues in `rocm-docs-core` for any formatting concerns and changes requested.
+
+## More
+
+For more topics, such as submitting feedback and ways to build documentation,
+see the [Contributing Section](https://rocm.docs.amd.com/en/latest/contributing.html)
+at [rocm.docs.amd.com](https://rocm.docs.amd.com)

LICENSE

@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (c) 2022 Advanced Micro Devices, Inc. All rights reserved.
+Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

README.md

@@ -1,99 +1,50 @@
-# ROCm™ Repository Updates
-This repository contains the manifest file for ROCm™ releases, changelogs, and release information. The file default.xml contains information for all repositories and the associated commit used to build the current ROCm release.
+# AMD ROCm™ Platform
 
-The default.xml file uses the repo Manifest format.
+ROCm is an open-source stack, composed primarily of open-source software (OSS), designed for
+graphics processing unit (GPU) computation. ROCm consists of a collection of drivers, development
+tools, and APIs that enable GPU programming from low-level kernel to end-user applications.
 
-# ROCm v5.4.3 Release Notes
-ROCm v5.4.3 is now released. For ROCm v5.4.3 documentation, refer to https://docs.amd.com.
+With ROCm, you can customize your GPU software to meet your specific needs. You can develop,
+collaborate, test, and deploy your applications in a free, open-source, integrated, and secure software
+ecosystem. ROCm is particularly well-suited to GPU-accelerated high-performance computing (HPC),
+artificial intelligence (AI), scientific computing, and computer aided design (CAD).
 
-# ROCm v5.4.2 Release Notes
-ROCm v5.4.2 is now released. For ROCm v5.4.2 documentation, refer to https://docs.amd.com.
+ROCm is powered by AMD’s
+[Heterogeneous-computing Interface for Portability (HIP)](https://github.com/ROCm-Developer-Tools/HIP),
+an OSS C++ GPU programming environment and its corresponding runtime. HIP allows ROCm
+developers to create portable applications on different platforms by deploying code on a range of
+platforms, from dedicated gaming GPUs to exascale HPC clusters.
 
-# ROCm v5.4.1 Release Notes
-ROCm v5.4.1 is now released. For ROCm v5.4.1 documentation, refer to https://docs.amd.com.
+ROCm supports programming models, such as OpenMP and OpenCL, and includes all necessary OSS
+compilers, debuggers, and libraries. ROCm is fully integrated into machine learning (ML) frameworks,
+such as PyTorch and TensorFlow.
 
-# ROCm v5.4 Release Notes
-ROCm v5.4 is now released. For ROCm v5.4 documentation, refer to https://docs.amd.com.
+## ROCm Documentation
 
-# ROCm v5.3.3 Release Notes
-ROCm v5.3.3 is now released. For ROCm v5.3.3 documentation, refer to https://docs.amd.com.
+The ROCm Documentation site is [rocm.docs.amd.com](https://rocm.docs.amd.com).
 
-# ROCm v5.3.2 Release Notes
-ROCm v5.3.2 is now released. For ROCm v5.3.2 documentation, refer to https://docs.amd.com.
+Source code for the documentation is located in the docs folder of most repositories that are part of
+ROCm.
 
-# ROCm v5.3 Release Notes
-ROCm v5.3 is now released. For ROCm v5.3 documentation, refer to https://docs.amd.com.
+This repository contains the manifest file for ROCm releases, changelogs, and release information.
+The file `default.xml` contains information for all repositories and the associated commit used to build
+the current ROCm release.
 
-# ROCm v5.2.3 Release Notes
-The ROCm v5.2.3 patch release is now available. The details are listed below. Highlights of this release include enhancements in RCCL version compatibility and minor bug fixes in the HIP Runtime.
+The `default.xml` file uses the repo Manifest Format.
 
-Additionally, ROCm releases will return to use of the [ROCm](https://github.com/RadeonOpenCompute/ROCm) repository for version-controlled release notes henceforth.
+The develop branch of this repository contains content for the next ROCm release.
 
-**NOTE**: This release of ROCm is validated with the AMDGPU release v22.20.1.
+### How to build documentation via Sphinx
 
-All users of the ROCm v5.2.1 release and below are encouraged to upgrade. Refer to https://docs.amd.com for documentation associated with this release.
+```bash
+cd docs
 
+pip3 install -r sphinx/requirements.txt
 
-## Introducing Preview Support for Ubuntu 20.04.5 HWE
-
-Refer to the following article for information on the preview support for Ubuntu 20.04.5 HWE.
-
-https://www.amd.com/en/support/kb/release-notes/rn-amdgpu-unified-linux-22-20
-
-
-## Changes in This Release
-
-### Ubuntu 18.04 End of Life
-
-Support for Ubuntu 18.04 ends in this release. Future releases of ROCm will not provide prebuilt packages for Ubuntu 18.04.
-
-
-### HIP and Other Runtimes
-
-#### HIP Runtime
-
-##### Fixes
-
- - A bug was discovered in the HIP graph capture implementation in the ROCm v5.2.0 release. If the same kernel is called twice (with different argument values) in a graph capture, the implementation only kept the argument values for the second kernel call.
-
-- A bug was introduced in the hiprtc implementation in the ROCm v5.2.0 release. This bug caused the *hiprtcGetLoweredName* call to fail for named expressions with whitespace in it.
-
-**Example:** The named expression ```my_sqrt<complex<double>>``` passed but ```my_sqrt<complex<double>>``` failed.
-
-
-### ROCm Libraries
-
-#### RCCL
-
-##### Added
-- Compatibility with NCCL 2.12.10
-- Packages for test and benchmark executables on all supported OSes using CPack
-- Adding custom signal handler - opt-in with RCCL_ENABLE_SIGNALHANDLER=1
-  - Additional details provided if Binary File Descriptor library (BFD) is pre-installed.
-  - Adding experimental support for using multiple ranks per device
-    - Requires using a new interface to create communicator (ncclCommInitRankMulti),
-        refer to the interface documentation for details.
-	  - To avoid potential deadlocks, user might have to set an environment variables increasing
-	      the number of hardware queues. For example,
-
+python3 -m sphinx -T -E -b html -d _build/doctrees -D language=en . _build/html
 ```
-    export GPU_MAX_HW_QUEUES=16
 
-```
-- Adding support for reusing ports in NET/IB channels
-  - Opt-in with NCCL_IB_SOCK_CLIENT_PORT_REUSE=1 and NCCL_IB_SOCK_SERVER_PORT_REUSE=1
-    - When "Call to bind failed: Address already in use" error happens in large-scale AlltoAll
-        (for example, >=64 MI200 nodes), users are suggested to opt-in either one or both of the options to resolve the massive port usage issue
-	  - Avoid using NCCL_IB_SOCK_SERVER_PORT_REUSE when NCCL_NCHANNELS_PER_NET_PEER is tuned >1
+## Older ROCm Releases
 
-##### Removed
-- Removed experimental clique-based kernels
-
-### Development Tools
-No notable changes in this release for development tools, including the compiler, profiler, and debugger.
-
-### Deployment and Management Tools
-No notable changes in this release for deployment and management tools.
-
-## Older ROCm™ Releases
-For release information for older ROCm™ releases, refer to [CHANGELOG](CHANGELOG.md).
+For release information for older ROCm releases, refer to
+[`CHANGELOG`](./CHANGELOG.md).

RELEASE.md

@@ -0,0 +1,483 @@
+# Release Notes
+<!-- Do not edit this file! This file is autogenerated with -->
+<!--   tools/autotag/tag_script.py                          -->
+
+<!-- Disable lints since this is an auto-generated file.    -->
+<!-- markdownlint-disable blanks-around-headers             -->
+<!-- markdownlint-disable no-duplicate-header               -->
+<!-- markdownlint-disable no-blanks-blockquote              -->
+<!-- markdownlint-disable ul-indent                         -->
+<!-- markdownlint-disable no-trailing-spaces                -->
+
+<!-- spellcheck-disable -->
+
+The release notes for the ROCm platform.
+
+-------------------
+
+## ROCm 5.7.0
+<!-- markdownlint-disable first-line-h1 -->
+<!-- markdownlint-disable no-duplicate-header -->
+
+### Release Highlights for ROCm v5.7
+
+ROCm 5.7.0 includes many new features. These include: a new library (hipTensor), and optimizations for rocRAND and MIVisionX. Address sanitizer for host and device code (GPU) is now available as a beta. Note that ROCm 5.7.0 is EOS for MI50. 5.7 versions of ROCm are the last major release in the ROCm 5 series. This release is Linux-only.
+
+Important: The next major ROCm release (ROCm 6.0) will not be backward compatible with the ROCm 5 series. Changes will include: splitting LLVM packages into more manageable sizes, changes to the HIP runtime API, splitting rocRAND and hipRAND into separate packages, and reorganizing our file structure.
+
+#### AMD Instinct™ MI50 End of Support Notice
+
+AMD Instinct MI50, Radeon Pro VII, and Radeon VII products (collectively gfx906 GPUs) will enter maintenance mode starting Q3 2023.
+
+As outlined in [5.6.0](https://rocm.docs.amd.com/en/docs-5.6.0/release.html), ROCm 5.7 will be the final release for gfx906 GPUs to be in a fully supported state.
+
+- ROCm 6.0 release will show MI50s as "under maintenance" mode for [Linux](./about/release/linux_support) and [Windows](./about/release/windows_support)
+
+- No new features and performance optimizations will be supported for the gfx906 GPUs beyond this major release (ROCm 5.7).
+
+- Bug fixes / critical security patches will continue to be supported for the gfx906 GPUs till Q2 2024 (EOM (End of Maintenance) will be aligned with the closest ROCm release).
+
+- Bug fixes during the maintenance will be made to the next ROCm point release.
+
+- Bug fixes will not be backported to older ROCm releases for gfx906.
+
+- Distro / Operating system updates will continue as per the ROCm release cadence for gfx906 GPUs till EOM.
+
+#### Feature Updates
+
+##### Non-hostcall HIP Printf
+
+**Current behavior**
+
+The current version of HIP printf relies on hostcalls, which, in turn, rely on PCIe atomics. However, PCle atomics are unavailable in some environments, and, as a result, HIP-printf does not work in those environments. Users may see the following error from runtime (with AMD_LOG_LEVEL 1 and above), 
+
+```
+    Pcie atomics not enabled, hostcall not supported
+```
+**Workaround**
+
+The ROCm 5.7 release introduces an alternative to the current hostcall-based implementation that leverages an older OpenCL-based printf scheme, which does not rely on hostcalls/PCIe atomics. 
+Note: This option is less robust than hostcall-based implementation and is intended to be a workaround when hostcalls do not work.	
+
+The printf variant is now controlled via a new compiler option -mprintf-kind=<value>. This is supported only for HIP programs and takes the following values,
+
+- “hostcall” – This currently available implementation relies on hostcalls, which require the system to support PCIe atomics. It is the default scheme.
+
+- “buffered” – This implementation leverages the older printf scheme used by OpenCL; it relies on a memory buffer where printf arguments are stored during the kernel execution, and then the runtime handles the actual printing once the kernel finishes execution. 
+
+**NOTE**: With the new workaround,
+
+- The printf buffer is fixed size and non-circular.  After the buffer is filled, calls to printf will not result in additional output.
+
+- The printf call returns either 0 (on success) or -1 (on failure, due to full buffer), unlike the hostcall scheme that returns the number of characters printed.
+
+##### Beta Release of LLVM Address Sanitizer (ASAN) with the GPU
+
+The ROCm v5.7 release introduces the beta release of LLVM Address Sanitizer (ASAN) with the GPU. The LLVM Address Sanitizer provides a process that allows developers to detect runtime addressing errors in applications and libraries. The detection is achieved using a combination of compiler-added instrumentation and runtime techniques, including function interception and replacement.
+Until now, the LLVM Address Sanitizer process was only available for traditional purely CPU applications. However, ROCm has extended this mechanism to additionally allow the detection of some addressing errors on the GPU in heterogeneous applications. Ideally, developers should treat heterogeneous HIP and OpenMP applications like pure CPU applications. However, this simplicity has not been achieved yet.
+
+Refer to the documentation on LLVM Address Sanitizer with the GPU at [LLVM Address Sanitizer User Guide](understand/using_gpu_sanitizer.md).
+
+**Note**: The beta release of LLVM Address Sanitizer for ROCm is currently tested and validated on Ubuntu 20.04.
+
+#### Fixed Defects
+
+The following defects are fixed in ROCm v5.7,
+
+- Test hangs observed in HMM RCCL
+
+- NoGpuTst test of Catch2 fails with Docker
+
+- Failures observed with non-HMM HIP directed catch2 tests with XNACK+
+
+- Multiple test failures and test hangs observed in hip-directed catch2 tests with xnack+
+
+#### HIP 5.7.0
+
+##### Optimizations
+
+##### Added
+
+- Added `meta_group_size`/`rank` for getting the number of tiles and rank of a tile in the partition
+
+- Added new APIs supporting Windows only, under development on Linux
+
+    - `hipMallocMipmappedArray` for allocating a mipmapped array on the device
+
+    - `hipFreeMipmappedArray` for freeing a mipmapped array on the device
+
+    - `hipGetMipmappedArrayLevel` for getting a mipmap level of a HIP mipmapped array
+
+    - `hipMipmappedArrayCreate` for creating a mipmapped array
+
+    - `hipMipmappedArrayDestroy` for destroy a mipmapped array
+
+    - `hipMipmappedArrayGetLevel` for getting a mipmapped array on a mipmapped level
+
+##### Changed
+
+##### Fixed
+
+##### Known Issues
+
+- HIP memory type enum values currently don't support equivalent value to `cudaMemoryTypeUnregistered`, due to HIP functionality backward compatibility.
+- HIP API `hipPointerGetAttributes` could return invalid value in case the input memory pointer was not allocated through any HIP API on device or host.
+
+##### Upcoming changes for HIP in ROCm 6.0 release
+
+- Removal of gcnarch from hipDeviceProp_t structure
+
+- Addition of new fields in hipDeviceProp_t structure
+
+    - maxTexture1D
+
+    - maxTexture2D
+
+    - maxTexture1DLayered
+
+    - maxTexture2DLayered
+    
+    - sharedMemPerMultiprocessor
+    
+    - deviceOverlap
+    
+    - asyncEngineCount
+    
+    - surfaceAlignment
+    
+    - unifiedAddressing
+    
+    - computePreemptionSupported
+    
+    - hostRegisterSupported
+    
+    - uuid
+    
+- Removal of deprecated code -hip-hcc codes from hip code tree
+
+- Correct hipArray usage in HIP APIs such as hipMemcpyAtoH and hipMemcpyHtoA
+
+- HIPMEMCPY_3D fields correction to avoid truncation of "size_t" to "unsigned int" inside hipMemcpy3D()
+
+- Renaming of 'memoryType' in hipPointerAttribute_t structure to 'type'
+
+- Correct hipGetLastError to return the last error instead of last API call's return code
+
+- Update hipExternalSemaphoreHandleDesc to add "unsigned int reserved[16]"
+
+- Correct handling of flag values in hipIpcOpenMemHandle for hipIpcMemLazyEnablePeerAccess
+
+- Remove hiparray* and make it opaque with hipArray_t
+
+### Library Changes in ROCM 5.7.0
+
+| Library | Version |
+|---------|---------|
+| hipBLAS |  ⇒ [1.1.0](https://github.com/ROCmSoftwarePlatform/hipBLAS/releases/tag/rocm-5.7.0) |
+| hipCUB |  ⇒ [2.13.1](https://github.com/ROCmSoftwarePlatform/hipCUB/releases/tag/rocm-5.7.0) |
+| hipFFT |  ⇒ [1.0.12](https://github.com/ROCmSoftwarePlatform/hipFFT/releases/tag/rocm-5.7.0) |
+| hipSOLVER |  ⇒ [1.8.1](https://github.com/ROCmSoftwarePlatform/hipSOLVER/releases/tag/rocm-5.7.0) |
+| hipSPARSE |  ⇒ [2.3.8](https://github.com/ROCmSoftwarePlatform/hipSPARSE/releases/tag/rocm-5.7.0) |
+| MIOpen |  ⇒ [2.19.0](https://github.com/ROCmSoftwarePlatform/MIOpen/releases/tag/rocm-5.7.0) |
+| rccl |  ⇒ [2.17.1-1](https://github.com/ROCmSoftwarePlatform/rccl/releases/tag/rocm-5.7.0) |
+| rocALUTION |  ⇒ [2.1.11](https://github.com/ROCmSoftwarePlatform/rocALUTION/releases/tag/rocm-5.7.0) |
+| rocBLAS |  ⇒ [3.1.0](https://github.com/ROCmSoftwarePlatform/rocBLAS/releases/tag/rocm-5.7.0) |
+| rocFFT |  ⇒ [1.0.24](https://github.com/ROCmSoftwarePlatform/rocFFT/releases/tag/rocm-5.7.0) |
+| rocm-cmake |  ⇒ [0.10.0](https://github.com/RadeonOpenCompute/rocm-cmake/releases/tag/rocm-5.7.0) |
+| rocPRIM |  ⇒ [2.13.1](https://github.com/ROCmSoftwarePlatform/rocPRIM/releases/tag/rocm-5.7.0) |
+| rocRAND |  ⇒ [2.10.17](https://github.com/ROCmSoftwarePlatform/rocRAND/releases/tag/rocm-5.7.0) |
+| rocSOLVER |  ⇒ [3.23.0](https://github.com/ROCmSoftwarePlatform/rocSOLVER/releases/tag/rocm-5.7.0) |
+| rocSPARSE |  ⇒ [2.5.4](https://github.com/ROCmSoftwarePlatform/rocSPARSE/releases/tag/rocm-5.7.0) |
+| rocThrust |  ⇒ [2.18.0](https://github.com/ROCmSoftwarePlatform/rocThrust/releases/tag/rocm-5.7.0) |
+| rocWMMA |  ⇒ [1.2.0](https://github.com/ROCmSoftwarePlatform/rocWMMA/releases/tag/rocm-5.7.0) |
+| Tensile |  ⇒ [4.38.0](https://github.com/ROCmSoftwarePlatform/Tensile/releases/tag/rocm-5.7.0) |
+
+#### hipBLAS 1.1.0
+
+hipBLAS 1.1.0 for ROCm 5.7.0
+
+##### Changed
+
+- updated documentation requirements
+
+##### Dependencies
+
+- dependency rocSOLVER now depends on rocSPARSE
+
+#### hipCUB 2.13.1
+
+hipCUB 2.13.1 for ROCm 5.7.0
+
+##### Changed
+
+- CUB backend references CUB and Thrust version 2.0.1.
+- Fixed `DeviceSegmentedReduce::ArgMin` and `DeviceSegmentedReduce::ArgMax` by returning the segment-relative index instead of the absolute one.
+- Fixed `DeviceSegmentedReduce::ArgMin` for inputs where the segment minimum is smaller than the value returned for empty segments. An equivalent fix is applied to `DeviceSegmentedReduce::ArgMax`.
+
+##### Known Issues
+
+- `debug_synchronous` no longer works on CUDA platform. `CUB_DEBUG_SYNC` should be used to enable those checks.
+- `DeviceReduce::Sum` does not compile on CUDA platform for mixed extended-floating-point/floating-point InputT and OutputT types.
+- `DeviceHistogram::HistogramEven` fails on CUDA platform for `[LevelT, SampleIteratorT] = [int, int]`.
+- `DeviceHistogram::MultiHistogramEven` fails on CUDA platform for `[LevelT, SampleIteratorT] = [int, int/unsigned short/float/double]` and `[LevelT, SampleIteratorT] = [float, double]`.
+
+#### hipFFT 1.0.12
+
+hipFFT 1.0.12 for ROCm 5.7.0
+
+##### Added
+
+- Implemented the hipfftXtMakePlanMany, hipfftXtGetSizeMany, hipfftXtExec APIs, to allow requesting half-precision transforms.
+
+##### Changed
+
+- Added --precision argument to benchmark/test clients.  --double is still accepted but is deprecated as a method to request a double-precision transform.
+
+#### hipSOLVER 1.8.1
+
+hipSOLVER 1.8.1 for ROCm 5.7.0
+
+##### Changed
+
+- Changed hipsolver-test sparse input data search paths to be relative to the test executable
+
+#### hipSPARSE 2.3.8
+
+hipSPARSE 2.3.8 for ROCm 5.7.0
+
+##### Improved
+
+- Fix compilation failures when using cusparse 12.1.0 backend
+- Fix compilation failures when using cusparse 12.0.0 backend
+- Fix compilation failures when using cusparse 10.1 (non-update versions) as backend
+- Minor improvements
+
+#### MIOpen 2.19.0
+
+MIOpen 2.19.0 for ROCm 5.7.0
+
+##### Added
+
+- ROCm 5.5 support for gfx1101 (Navi32)
+
+##### Changed
+
+- Tuning results for MLIR on ROCm 5.5
+- Bumping MLIR commit to 5.5.0 release tag
+
+##### Fixed
+
+- Fix 3d convolution Host API bug
+- [HOTFIX][MI200][FP16] Disabled ConvHipImplicitGemmBwdXdlops when FP16_ALT is required.
+
+#### RCCL 2.17.1-1
+
+RCCL 2.17.1-1 for ROCm 5.7.0
+
+##### Changed
+
+- Compatibility with NCCL 2.17.1-1
+- Performance tuning for some collective operations
+
+##### Added
+
+- Minor improvements to MSCCL codepath
+- NCCL_NCHANNELS_PER_PEER support
+- Improved compilation performance
+- Support for gfx94x
+
+##### Fixed
+
+- Potential race-condition during ncclSocketClose()
+
+#### rocALUTION 2.1.11
+
+rocALUTION 2.1.11 for ROCm 5.7.0
+
+##### Added
+
+- Added support for gfx940, gfx941 and gfx942
+
+##### Improved
+
+- Fixed OpenMP runtime issue with Windows toolchain
+
+#### rocBLAS 3.1.0
+
+rocBLAS 3.1.0 for ROCm 5.7.0
+
+##### Added
+
+- yaml lock step argument scanning for rocblas-bench and rocblas-test clients. See Programmers Guide for details.
+- rocblas-gemm-tune is used to find the best performing GEMM kernel for each of a given set of GEMM problems.
+
+##### Fixed
+
+- make offset calculations for rocBLAS functions 64 bit safe.  Fixes for very large leading dimensions or increments potentially causing overflow:
+  - Level 1: axpy, copy, rot, rotm, scal, swap, asum, dot, iamax, iamin, nrm2
+  - Level 2: gemv, symv, hemv, trmv, ger, syr, her, syr2, her2, trsv
+  - Level 3: gemm, symm, hemm, trmm, syrk, herk, syr2k, her2k, syrkx, herkx, trsm, trtri, dgmm, geam
+  - General: set_vector, get_vector, set_matrix, get_matrix
+  - Related fixes: internal scalar loads with &gt; 32bit offsets
+  - fix in-place functionality for all trtri sizes
+
+##### Changed
+
+- dot when using rocblas_pointer_mode_host is now synchronous to match legacy BLAS as it stores results in host memory
+- enhanced reporting of installation issues caused by runtime libraries (Tensile)
+- standardized internal rocblas C++ interface across most functions
+
+##### Deprecated
+
+- Removal of __STDC_WANT_IEC_60559_TYPES_EXT__ define in future release
+
+##### Dependencies
+
+- optional use of AOCL BLIS 4.0 on Linux for clients
+- optional build tool only dependency on python psutil
+
+#### rocFFT 1.0.24
+
+rocFFT 1.0.24 for ROCm 5.7.0
+
+##### Optimizations
+
+- Improved performance of complex forward/inverse 1D FFTs (2049 &lt;= length &lt;= 131071) that use Bluestein&#39;s algorithm.
+
+##### Added
+
+- Implemented a solution map version converter and finish the first conversion from ver.0 to ver.1. Where version 1 removes some incorrect kernels (sbrc/sbcr using half_lds)
+
+##### Changed
+
+- Moved rocfft_rtc_helper executable to lib/rocFFT directory on Linux.
+- Moved library kernel cache to lib/rocFFT directory.
+
+#### rocm-cmake 0.10.0
+
+rocm-cmake 0.10.0 for ROCm 5.7.0
+
+##### Added
+
+- Added ROCMTest module
+- ROCMCreatePackage: Added support for ASAN packages
+
+#### rocPRIM 2.13.1
+
+rocPRIM 2.13.1 for ROCm 5.7.0
+
+##### Changed
+
+- Deprecated configuration `radix_sort_config` for device-level radix sort as it no longer matches the algorithm&#39;s parameters. New configuration `radix_sort_config_v2` is preferred instead.
+- Removed erroneous implementation of device-level `inclusive_scan` and `exclusive_scan`. The prior default implementation using lookback-scan now is the only available implementation.
+- The benchmark metric indicating the bytes processed for `exclusive_scan_by_key` and `inclusive_scan_by_key` has been changed to incorporate the key type. Furthermore, the benchmark log has been changed such that these algorithms are reported as `scan` and `scan_by_key` instead of `scan_exclusive` and `scan_inclusive`.
+- Deprecated configurations `scan_config` and `scan_by_key_config` for device-level scans, as they no longer match the algorithm&#39;s parameters. New configurations `scan_config_v2` and `scan_by_key_config_v2` are preferred instead.
+
+##### Fixed
+
+- Fixed build issue caused by missing header in `thread/thread_search.hpp`.
+
+#### rocRAND 2.10.17
+
+rocRAND 2.10.17 for ROCm 5.7.0
+
+##### Added
+
+- MT19937 pseudo random number generator based on M. Matsumoto and T. Nishimura, 1998, Mersenne Twister: A 623-dimensionally equidistributed uniform pseudorandom number generator.
+- New benchmark for the device API using Google Benchmark, `benchmark_rocrand_device_api`, replacing `benchmark_rocrand_kernel`. `benchmark_rocrand_kernel` is deprecated and will be removed in a future version. Likewise, `benchmark_curand_host_api` is added to replace `benchmark_curand_generate` and `benchmark_curand_device_api` is added to replace `benchmark_curand_kernel`.
+- experimental HIP-CPU feature
+- ThreeFry pseudorandom number generator based on Salmon et al., 2011, &#34;Parallel random numbers: as easy as 1, 2, 3&#34;.
+
+##### Changed
+
+- Python 2.7 is no longer officially supported.
+
+#### rocSOLVER 3.23.0
+
+rocSOLVER 3.23.0 for ROCm 5.7.0
+
+##### Added
+
+- LU factorization without pivoting for block tridiagonal matrices:
+    - GEBLTTRF_NPVT now supports interleaved\_batched format
+- Linear system solver without pivoting for block tridiagonal matrices:
+    - GEBLTTRS_NPVT now supports interleaved\_batched format
+
+##### Fixed
+
+- Fixed stack overflow in sparse tests on Windows
+
+##### Changed
+
+- Changed rocsolver-test sparse input data search paths to be relative to the test executable
+- Changed build scripts to default to compressed debug symbols in Debug builds
+
+#### rocSPARSE 2.5.4
+
+rocSPARSE 2.5.4 for ROCm 5.7.0
+
+##### Added
+
+- Added more mixed precisions for SpMV, (matrix: float, vectors: double, calculation: double) and (matrix: rocsparse_float_complex, vectors: rocsparse_double_complex, calculation: rocsparse_double_complex)
+- Added support for gfx940, gfx941 and gfx942
+
+##### Improved
+
+- Fixed a bug in csrsm and bsrsm
+
+##### Known Issues
+
+In csritlu0, the algorithm rocsparse_itilu0_alg_sync_split_fusion has some accuracy issues to investigate with XNACK enabled. The fallback is rocsparse_itilu0_alg_sync_split.
+
+#### rocThrust 2.18.0
+
+rocThrust 2.18.0 for ROCm 5.7.0
+
+##### Fixed 
+
+- `lower_bound`, `upper_bound`, and `binary_search` failed to compile for certain types.
+- Fixed issue where `transform_iterator` would not compile with `__device__`-only operators.
+
+##### Changed
+
+- Updated `docs` directory structure to match the standard of [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core).
+- Removed references to and workarounds for deprecated hcc
+
+#### rocWMMA 1.2.0
+
+rocWMMA 1.2.0 for ROCm 5.7.0
+
+##### Changed
+
+- Fixed a bug with synchronization
+- Updated rocWMMA cmake versioning
+
+#### Tensile 4.38.0
+
+Tensile 4.38.0 for ROCm 5.7.0
+
+##### Added
+
+- Added support for FP16 Alt Round Near Zero Mode (this feature allows the generation of alternate kernels with intermediate rounding instead of truncation)
+- Added user-driven solution selection feature
+
+##### Optimizations
+
+- Enabled LocalSplitU with MFMA for I8 data type
+- Optimized K mask code in mfmaIter
+- Enabled TailLoop code in NoLoadLoop to prefetch global/local read
+- Enabled DirectToVgpr in TailLoop for NN, TN, and TT matrix orientations
+- Optimized DirectToLds test cases to reduce the test duration
+
+##### Changed
+
+- Removed DGEMM NT custom kernels and related test cases
+- Changed noTailLoop logic to apply noTailLoop only for NT
+- Changed the range of AssertFree0ElementMultiple and Free1
+- Unified aStr, bStr generation code in mfmaIter
+
+##### Fixed
+
+- Fixed LocalSplitU mismatch issue for SGEMM
+- Fixed BufferStore=0 and Ldc != Ldd case
+- Fixed mismatch issue with TailLoop + MatrixInstB &gt; 1

default.xml

@@ -12,7 +12,7 @@ fetch="https://github.com/GPUOpen-ProfessionalCompute-Libraries/" />
 fetch="https://github.com/GPUOpen-Tools/" />
     <remote name="KhronosGroup"
 fetch="https://github.com/KhronosGroup/" />
-    <default revision="refs/tags/rocm-5.4.3"
+    <default revision="refs/tags/rocm-5.7.0"
      remote="roc-github"
      sync-c="true"
      sync-j="4" />
@@ -20,54 +20,55 @@ fetch="https://github.com/KhronosGroup/" />
     <project name="ROCK-Kernel-Driver" />
     <project name="ROCT-Thunk-Interface" />
     <project name="ROCR-Runtime" />
+    <project name="amdsmi" />
     <project name="rocm_smi_lib" />
+    <project name="rocm-core" />
     <project name="rocm-cmake" />
     <project name="rocminfo" />
+    <project name="rocm_bandwidth_test" />
     <project name="rocprofiler" remote="rocm-devtools" />
     <project name="roctracer" remote="rocm-devtools" />
-    <project name="ROCm-OpenCL-Runtime" />
     <project path="ROCm-OpenCL-Runtime/api/opencl/khronos/icd" name="OpenCL-ICD-Loader" remote="KhronosGroup" revision="6c03f8b58fafd9dd693eaac826749a5cfad515f8" />
     <project name="clang-ocl" />
+    <project name="rdc" />
 <!--HIP Projects-->
     <project name="HIP" remote="rocm-devtools" />
-    <project name="hipamd" remote="rocm-devtools" />
     <project name="HIP-Examples" remote="rocm-devtools" />
-    <project name="ROCclr" remote="rocm-devtools" />
+    <project name="clr" remote="rocm-devtools" />
     <project name="HIPIFY" remote="rocm-devtools" />
     <project name="HIPCC" remote="rocm-devtools" />
 <!-- The following projects are all associated with the AMDGPU LLVM compiler -->
     <project name="llvm-project" />
     <project name="ROCm-Device-Libs" />
-    <project name="atmi" />
     <project name="ROCm-CompilerSupport" />
-    <project name="rocr_debug_agent" remote="rocm-devtools" />
-    <project name="rocm_bandwidth_test" />
     <project name="half" remote="rocm-swplat" revision="37742ce15b76b44e4b271c1e66d13d2fa7bd003e" />
-    <project name="RCP" remote="gpuopen-tools" revision="3a49405a1500067c49d181844ec90aea606055bb" />
 <!-- gdb projects -->
     <project name="ROCgdb" remote="rocm-devtools" />
     <project name="ROCdbgapi" remote="rocm-devtools" />
+    <project name="rocr_debug_agent" remote="rocm-devtools" />
 <!-- ROCm Libraries -->
-    <project name="rdc" />
-    <project name="rocBLAS" remote="rocm-swplat" />
-    <project name="Tensile" remote="rocm-swplat" />
-    <project name="hipBLAS" remote="rocm-swplat" />
-    <project name="rocFFT" remote="rocm-swplat" />
-    <project name="hipFFT" remote="rocm-swplat" />
-    <project name="rocRAND" remote="rocm-swplat" />
-    <project name="rocSPARSE" remote="rocm-swplat" />
-    <project name="rocSOLVER" remote="rocm-swplat" />
-    <project name="hipSOLVER" remote="rocm-swplat" />
-    <project name="hipSPARSE" remote="rocm-swplat" />
-    <project name="rocALUTION" remote="rocm-swplat" />
-    <project name="MIOpenGEMM" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocBLAS" remote="rocm-swplat" />
+    <project groups="mathlibs" name="Tensile" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipTensor" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipBLAS" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocFFT" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipFFT" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocRAND" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocSPARSE" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocSOLVER" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSOLVER" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSPARSE" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocALUTION" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocThrust" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipCUB" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocPRIM" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocWMMA" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rccl" remote="rocm-swplat" />
+    <project name="rocMLIR" remote="rocm-swplat" />
     <project name="MIOpen" remote="rocm-swplat" />
-    <project name="rccl" remote="rocm-swplat" />
+    <project name="composable_kernel" remote="rocm-swplat" />
     <project name="MIVisionX" remote="gpuopen-libs" />
-    <project name="rocThrust" remote="rocm-swplat" />
-    <project name="hipCUB" remote="rocm-swplat" />
-    <project name="rocPRIM" remote="rocm-swplat" />
-    <project name="rocWMMA" remote="rocm-swplat" />
+    <project name="rpp" remote="gpuopen-libs" />
     <project name="hipfort" remote="rocm-swplat" />
     <project name="AMDMIGraphX" remote="rocm-swplat" />
     <project name="ROCmValidationSuite" remote="rocm-devtools" />

docs/404.md

@@ -0,0 +1,3 @@
+# 404 - Page Not Found
+
+Return [home](./index) or use the sidebar navigation to get back on track.

docs/about.md

@@ -0,0 +1,74 @@
+# About ROCm Documentation
+
+ROCm documentation is made available under open source [licenses](licensing.md).
+Documentation is built using open source toolchains. Contributions to our
+documentation is encouraged and welcome. As a contributor, please familiarize
+yourself with our documentation toolchain.
+
+## `rocm-docs-core`
+
+[rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) is an AMD-maintained
+project that applies customization for our documentation. This
+project is the tool most ROCm repositories use as part of the documentation
+build. It is also available as a [pip package on PyPI](https://pypi.org/project/rocm-docs-core/).
+
+See the user and developer guides for rocm-docs-core at {doc}`rocm-docs-core documentation <rocm-docs-core:index>`.
+
+## Sphinx
+
+[Sphinx](https://www.sphinx-doc.org/en/master/) is a documentation generator
+originally used for Python. It is now widely used in the Open Source community.
+Originally, Sphinx supported reStructuredText (RST) based documentation, but
+Markdown support is now available.
+ROCm documentation plans to default to Markdown for new projects.
+Existing projects using RST are under no obligation to convert to Markdown. New
+projects that believe Markdown is not suitable should contact the documentation
+team prior to selecting RST.
+
+## Read the Docs
+
+[Read the Docs](https://docs.readthedocs.io/en/stable/) is the service that builds
+and hosts the HTML documentation generated using Sphinx to our end users.
+
+## Doxygen
+
+[Doxygen](https://www.doxygen.nl/) is a documentation generator that extracts
+information from inline code.
+ROCm projects typically use Doxygen for public API documentation unless the
+upstream project uses a different tool.
+
+### Breathe
+
+[Breathe](https://www.breathe-doc.org/) is a Sphinx plugin to integrate Doxygen
+content.
+
+### MyST
+
+[Markedly Structured Text (MyST)](https://myst-tools.org/docs/spec) is an extended
+flavor of Markdown ([CommonMark](https://commonmark.org/)) influenced by reStructuredText (RST) and Sphinx.
+It is integrated into ROCm documentation by the Sphinx extension [`myst-parser`](https://myst-parser.readthedocs.io/en/latest/).
+A cheat sheet that showcases how to use the MyST syntax is available over at
+the [Jupyter reference](https://jupyterbook.org/en/stable/reference/cheatsheet.html).
+
+### Sphinx External TOC
+
+[Sphinx External Table of Contents (TOC)](https://sphinx-external-toc.readthedocs.io/en/latest/intro.html)
+is a Sphinx extension used for ROCm documentation navigation. This tool generates a navigation menu on the left
+based on a YAML file that specifies the table of contents.
+It was selected due to its flexibility that allows scripts to operate on the
+YAML file. Please transition to this file for the project's navigation. You can
+see the `_toc.yml.in` file in this repository in the `docs/sphinx` folder for an
+example.
+
+### Sphinx Book Theme
+
+[Sphinx Book Theme](https://sphinx-book-theme.readthedocs.io/en/latest/) is a Sphinx theme
+that defines the base appearance for ROCm documentation.
+ROCm documentation applies some customization,
+such as a custom header and footer on top of the Sphinx Book Theme.
+
+### Sphinx Design
+
+[Sphinx Design](https://sphinx-design.readthedocs.io/en/latest/index.html) is a Sphinx extension that adds design
+functionality.
+ROCm documentation uses Sphinx Design for grids, cards, and synchronized tabs.

docs/about/licensing.md

@@ -0,0 +1,125 @@
+# ROCm licensing terms
+
+ROCm™ is released by Advanced Micro Devices, Inc. and is licensed per component separately.
+The following table is a list of ROCm components with links to their respective license
+terms. These components may include third party components subject to
+additional licenses. Please review individual repositories for more information.
+The table shows ROCm components, license name, and link to the license terms.
+
+<!-- spellcheck-disable -->
+| Component | License |
+|:------------------------------------------------------------------------------------------------:|:--------------------------------------------------------------------------------------------------------------------------:|
+| [AMDMIGraphX](https://github.com/ROCmSoftwarePlatform/AMDMIGraphX/) | [MIT](https://github.com/ROCmSoftwarePlatform/AMDMIGraphX/blob/develop/LICENSE) |
+| [HIPCC](https://github.com/ROCm-Developer-Tools/HIPCC/blob/develop/LICENSE.txt) | [MIT](https://github.com/ROCm-Developer-Tools/HIPCC/blob/develop/LICENSE.txt) |
+| [HIPIFY](https://github.com/ROCm-Developer-Tools/HIPIFY/) | [MIT](https://github.com/ROCm-Developer-Tools/HIPIFY/blob/amd-staging/LICENSE.txt) |
+| [HIP](https://github.com/ROCm-Developer-Tools/HIP/) | [MIT](https://github.com/ROCm-Developer-Tools/HIP/blob/develop/LICENSE.txt) |
+| [MIOpenGEMM](https://github.com/ROCmSoftwarePlatform/MIOpenGEMM/) | [MIT](https://github.com/ROCmSoftwarePlatform/MIOpenGEMM/blob/master/LICENSE.txt) |
+| [MIOpen](https://github.com/ROCmSoftwarePlatform/MIOpen/) | [MIT](https://github.com/ROCmSoftwarePlatform/MIOpen/blob/master/LICENSE.txt) |
+| [MIVisionX](https://github.com/GPUOpen-ProfessionalCompute-Libraries/MIVisionX/) | [MIT](https://github.com/GPUOpen-ProfessionalCompute-Libraries/MIVisionX/blob/master/LICENSE.txt) |
+| [RCP](https://github.com/GPUOpen-Tools/radeon_compute_profiler/) | [MIT](https://github.com/GPUOpen-Tools/radeon_compute_profiler/blob/master/LICENSE) |
+| [ROCK-Kernel-Driver](https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/) | [GPL 2.0 WITH Linux-syscall-note](https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/master/COPYING) |
+| [ROCR-Runtime](https://github.com/RadeonOpenCompute/ROCR-Runtime/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/ROCR-Runtime/blob/master/LICENSE.txt) |
+| [ROCT-Thunk-Interface](https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/) | [MIT](https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/blob/master/LICENSE.md) |
+| [ROCclr](https://github.com/ROCm-Developer-Tools/ROCclr/) | [MIT](https://github.com/ROCm-Developer-Tools/ROCclr/blob/develop/LICENSE.txt) |
+| [ROCdbgapi](https://github.com/ROCm-Developer-Tools/ROCdbgapi/) | [MIT](https://github.com/ROCm-Developer-Tools/ROCdbgapi/blob/amd-master/LICENSE.txt) |
+| [ROCgdb](https://github.com/ROCm-Developer-Tools/ROCgdb/) | [GNU General Public License v2.0](https://github.com/ROCm-Developer-Tools/ROCgdb/blob/amd-master/COPYING) |
+| [ROCm-CompilerSupport](https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/blob/amd-stg-open/LICENSE.txt) |
+| [ROCm-Device-Libs](https://github.com/RadeonOpenCompute/ROCm-Device-Libs/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/LICENSE.TXT) |
+| [ROCm-OpenCL-Runtime/api/opencl/khronos/icd](https://github.com/KhronosGroup/OpenCL-ICD-Loader/) | [Apache 2.0](https://github.com/KhronosGroup/OpenCL-ICD-Loader/blob/main/LICENSE) |
+| [ROCm-OpenCL-Runtime](https://github.com/RadeonOpenCompute/ROCm-OpenCL-Runtime/) | [MIT](https://github.com/RadeonOpenCompute/ROCm-OpenCL-Runtime/blob/develop/LICENSE.txt) |
+| [ROCmValidationSuite](https://github.com/ROCm-Developer-Tools/ROCmValidationSuite/) | [MIT](https://github.com/ROCm-Developer-Tools/ROCmValidationSuite/blob/master/LICENSE) |
+| [Tensile](https://github.com/ROCmSoftwarePlatform/Tensile/) | [MIT](https://github.com/ROCmSoftwarePlatform/Tensile/blob/develop/LICENSE.md) |
+| [aomp-extras](https://github.com/ROCm-Developer-Tools/aomp-extras/) | [MIT](https://github.com/ROCm-Developer-Tools/aomp-extras/blob/aomp-dev/LICENSE) |
+| [aomp](https://github.com/ROCm-Developer-Tools/aomp/) | [Apache 2.0](https://github.com/ROCm-Developer-Tools/aomp/blob/aomp-dev/LICENSE) |
+| [atmi](https://github.com/RadeonOpenCompute/atmi/) | [MIT](https://github.com/RadeonOpenCompute/atmi/blob/master/LICENSE.txt) |
+| [clang-ocl](https://github.com/RadeonOpenCompute/clang-ocl/) | [MIT](https://github.com/RadeonOpenCompute/clang-ocl/blob/master/LICENSE) |
+| [flang](https://github.com/ROCm-Developer-Tools/flang/) | [Apache 2.0](https://github.com/ROCm-Developer-Tools/flang/blob/master/LICENSE.txt) |
+| [half](https://github.com/ROCmSoftwarePlatform/half/) | [MIT](https://github.com/ROCmSoftwarePlatform/half/blob/master/LICENSE.txt) |
+| [hipBLAS](https://github.com/ROCmSoftwarePlatform/hipBLAS/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipBLAS/blob/develop/LICENSE.md) |
+| [hipCUB](https://github.com/ROCmSoftwarePlatform/hipCUB/) | [Custom](https://github.com/ROCmSoftwarePlatform/hipCUB/blob/develop/LICENSE.txt) |
+| [hipFFT](https://github.com/ROCmSoftwarePlatform/hipFFT/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipFFT/blob/develop/LICENSE.md) |
+| [hipSOLVER](https://github.com/ROCmSoftwarePlatform/hipSOLVER/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipSOLVER/blob/develop/LICENSE.md) |
+| [hipSPARSELt](https://github.com/ROCmSoftwarePlatform/hipSPARSELt/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipSPARSELt/blob/develop/LICENSE.md) |
+| [hipSPARSE](https://github.com/ROCmSoftwarePlatform/hipSPARSE/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipSPARSE/blob/develop/LICENSE.md) |
+| [hipTensor](https://github.com/ROCmSoftwarePlatform/hipTensor) | [MIT](https://github.com/ROCmSoftwarePlatform/hipTensor/blob/develop/LICENSE) |
+| [hipamd](https://github.com/ROCm-Developer-Tools/hipamd/) | [MIT](https://github.com/ROCm-Developer-Tools/hipamd/blob/develop/LICENSE.txt) |
+| [hipfort](https://github.com/ROCmSoftwarePlatform/hipfort/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipfort/blob/master/LICENSE) |
+| [llvm-project](https://github.com/ROCm-Developer-Tools/llvm-project/) | [Apache](https://github.com/ROCm-Developer-Tools/llvm-project/blob/main/LICENSE.TXT) |
+| [rccl](https://github.com/ROCmSoftwarePlatform/rccl/) | [Custom](https://github.com/ROCmSoftwarePlatform/rccl/blob/develop/LICENSE.txt) |
+| [rdc](https://github.com/RadeonOpenCompute/rdc/) | [MIT](https://github.com/RadeonOpenCompute/rdc/blob/master/LICENSE) |
+| [rocALUTION](https://github.com/ROCmSoftwarePlatform/rocALUTION/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocALUTION/blob/develop/LICENSE.md) |
+| [rocBLAS](https://github.com/ROCmSoftwarePlatform/rocBLAS/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocBLAS/blob/develop/LICENSE.md) |
+| [rocFFT](https://github.com/ROCmSoftwarePlatform/rocFFT/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocFFT/blob/develop/LICENSE.md) |
+| [rocPRIM](https://github.com/ROCmSoftwarePlatform/rocPRIM/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocPRIM/blob/develop/LICENSE.txt) |
+| [rocRAND](https://github.com/ROCmSoftwarePlatform/rocRAND/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocRAND/blob/develop/LICENSE.txt) |
+| [rocSOLVER](https://github.com/ROCmSoftwarePlatform/rocSOLVER/) | [BSD-2-Clause](https://github.com/ROCmSoftwarePlatform/rocSOLVER/blob/develop/LICENSE.md) |
+| [rocSPARSE](https://github.com/ROCmSoftwarePlatform/rocSPARSE/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocSPARSE/blob/develop/LICENSE.md) |
+| [rocThrust](https://github.com/ROCmSoftwarePlatform/rocThrust/) | [Apache 2.0](https://github.com/ROCmSoftwarePlatform/rocThrust/blob/develop/LICENSE) |
+| [rocWMMA](https://github.com/ROCmSoftwarePlatform/rocWMMA/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocWMMA/blob/develop/LICENSE.md) |
+| [rocm-cmake](https://github.com/RadeonOpenCompute/rocm-cmake/) | [MIT](https://github.com/RadeonOpenCompute/rocm-cmake/blob/develop/LICENSE) |
+| [rocm_bandwidth_test](https://github.com/RadeonOpenCompute/rocm_bandwidth_test/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/rocm_bandwidth_test/blob/master/LICENSE.txt) |
+| [rocm_smi_lib](https://github.com/RadeonOpenCompute/rocm_smi_lib/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/rocm_smi_lib/blob/master/License.txt) |
+| [rocminfo](https://github.com/RadeonOpenCompute/rocminfo/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/rocminfo/blob/master/License.txt) |
+| [rocprofiler](https://github.com/ROCm-Developer-Tools/rocprofiler/) | [MIT](https://github.com/ROCm-Developer-Tools/rocprofiler/blob/amd-master/LICENSE) |
+| [rocr_debug_agent](https://github.com/ROCm-Developer-Tools/rocr_debug_agent/) | [The University of Illinois/NCSA](https://github.com/ROCm-Developer-Tools/rocr_debug_agent/blob/master/LICENSE.txt) |
+| [roctracer](https://github.com/ROCm-Developer-Tools/roctracer/) | [MIT](https://github.com/ROCm-Developer-Tools/roctracer/blob/amd-master/LICENSE) |
+| rocm-llvm-alt | [AMD Proprietary License](https://www.amd.com/en/support/amd-software-eula)
+
+Open sourced ROCm components are released via public GitHub
+repositories, packages on https://repo.radeon.com and other distribution channels.
+Proprietary products are only available on https://repo.radeon.com. Currently, only
+one component of ROCm, rocm-llvm-alt is governed by a proprietary license.
+Proprietary components are organized in a proprietary subdirectory in the package
+repositories to distinguish from open sourced packages.
+
+The additional terms and conditions below apply to your use of ROCm technical
+documentation.
+
+©2023 Advanced Micro Devices, Inc. All rights reserved.
+
+The information presented in this document is for informational purposes only
+and may contain technical inaccuracies, omissions, and typographical errors. The
+information contained herein is subject to change and may be rendered inaccurate
+for many reasons, including but not limited to product and roadmap changes,
+component and motherboard version changes, new model and/or product releases,
+product differences between differing manufacturers, software changes, BIOS
+flashes, firmware upgrades, or the like. Any computer system has risks of
+security vulnerabilities that cannot be completely prevented or mitigated. AMD
+assumes no obligation to update or otherwise correct or revise this information.
+However, AMD reserves the right to revise this information and to make changes
+from time to time to the content hereof without obligation of AMD to notify any
+person of such revisions or changes.
+
+THIS INFORMATION IS PROVIDED “AS IS.” AMD MAKES NO REPRESENTATIONS OR WARRANTIES
+WITH RESPECT TO THE CONTENTS HEREOF AND ASSUMES NO RESPONSIBILITY FOR ANY
+INACCURACIES, ERRORS, OR OMISSIONS THAT MAY APPEAR IN THIS INFORMATION. AMD
+SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+MERCHANTABILITY, OR FITNESS FOR ANY PARTICULAR PURPOSE. IN NO EVENT WILL AMD BE
+LIABLE TO ANY PERSON FOR ANY RELIANCE, DIRECT, INDIRECT, SPECIAL, OR OTHER
+CONSEQUENTIAL DAMAGES ARISING FROM THE USE OF ANY INFORMATION CONTAINED HEREIN,
+EVEN IF AMD IS EXPRESSLY ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+
+AMD, the AMD Arrow logo, ROCm, and combinations thereof are trademarks of
+Advanced Micro Devices, Inc. Other product names used in this publication are
+for identification purposes only and may be trademarks of their respective
+companies.
+
+## Package licensing
+
+```{attention}
+AQL Profiler and AOCC CPU optimization are both provided in binary form, each
+subject to the license agreement enclosed in the directory for the binary and is
+available here: `/opt/rocm/share/doc/rocm-llvm-alt/EULA`. By using, installing,
+copying or distributing AQL Profiler and/or AOCC CPU Optimizations, you agree to
+the terms and conditions of this license agreement. If you do not agree to the
+terms of this agreement, do not install, copy or use the AQL Profiler and/or the
+AOCC CPU Optimizations.
+```
+
+For the rest of the ROCm packages, you can find the licensing information at the
+following location: `/opt/rocm/share/doc/<component-name>/`
+
+For example, you can fetch the licensing information of the `_amd_comgr_`
+component (Code Object Manager) from the `amd_comgr` folder. A file named
+`LICENSE.txt` contains the license details at:
+`/opt/rocm-5.4.3/share/doc/amd_comgr/LICENSE.txt`

docs/conf.py

@@ -0,0 +1,104 @@
+# Configuration file for the Sphinx documentation builder.
+#
+# This file only contains a selection of the most common options. For a full
+# list see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+import shutil
+
+from rocm_docs import ROCmDocs
+
+
+shutil.copy2('../CONTRIBUTING.md','./contributing.md')
+shutil.copy2('../RELEASE.md','./release.md')
+# Keep capitalization due to similar linking on GitHub's markdown preview.
+shutil.copy2('../CHANGELOG.md','./CHANGELOG.md')
+
+latex_engine = "xelatex"
+latex_elements = {
+    "fontpkg": r"""
+\usepackage{tgtermes}
+\usepackage{tgheros}
+\renewcommand\ttdefault{txtt}
+"""
+}
+
+# configurations for PDF output by Read the Docs
+project = "ROCm Documentation"
+author = "Advanced Micro Devices, Inc."
+copyright = "Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved."
+version = "5.7.0"
+release = "5.7.0"
+
+setting_all_article_info = True
+all_article_info_os = ["linux", "windows"]
+all_article_info_author = ""
+
+# pages with specific settings
+article_pages = [
+    {
+        "file":"release",
+        "os":["linux", "windows"],
+        "date":"2023-07-27"
+    },
+
+    {"file":"deploy/linux/index", "os":["linux"]},
+    {"file":"deploy/linux/install_overview", "os":["linux"]},
+    {"file":"deploy/linux/prerequisites", "os":["linux"]},
+    {"file":"deploy/linux/quick_start", "os":["linux"]},
+    {"file":"deploy/linux/install", "os":["linux"]},
+    {"file":"deploy/linux/upgrade", "os":["linux"]},
+    {"file":"deploy/linux/uninstall", "os":["linux"]},
+    {"file":"deploy/linux/package_manager_integration", "os":["linux"]},
+    {"file":"deploy/docker", "os":["linux"]},
+    
+    {"file":"deploy/windows/cli/index", "os":["windows"]},
+    {"file":"deploy/windows/cli/install", "os":["windows"]},
+    {"file":"deploy/windows/cli/uninstall", "os":["windows"]},
+    {"file":"deploy/windows/cli/upgrade", "os":["windows"]},
+    {"file":"deploy/windows/gui/index", "os":["windows"]},
+    {"file":"deploy/windows/gui/install", "os":["windows"]},
+    {"file":"deploy/windows/gui/uninstall", "os":["windows"]},
+    {"file":"deploy/windows/gui/upgrade", "os":["windows"]},
+    {"file":"deploy/windows/index", "os":["windows"]},
+    {"file":"deploy/windows/prerequisites", "os":["windows"]},
+    {"file":"deploy/windows/quick_start", "os":["windows"]},
+
+    {"file":"release/gpu_os_support", "os":["linux"]},
+    {"file":"release/windows_support", "os":["windows"]},
+    {"file":"release/docker_support_matrix", "os":["linux"]},
+    
+    {"file":"reference/gpu_libraries/communication", "os":["linux"]},
+    {"file":"reference/ai_tools", "os":["linux"]},
+    {"file":"reference/management_tools", "os":["linux"]},
+    {"file":"reference/validation_tools", "os":["linux"]},
+    {"file":"reference/framework_compatibility/framework_compatibility", "os":["linux"]},
+    {"file":"reference/computer_vision", "os":["linux"]},
+    
+    {"file":"how_to/deep_learning_rocm", "os":["linux"]},
+    {"file":"how_to/gpu_aware_mpi", "os":["linux"]},
+    {"file":"how_to/magma_install/magma_install", "os":["linux"]},
+    {"file":"how_to/pytorch_install/pytorch_install", "os":["linux"]},
+    {"file":"how_to/system_debugging", "os":["linux"]},
+    {"file":"how_to/tensorflow_install/tensorflow_install", "os":["linux"]},
+
+    {"file":"examples/machine_learning", "os":["linux"]},
+    {"file":"examples/inception_casestudy/inception_casestudy", "os":["linux"]},
+    
+    {"file":"understand/file_reorg", "os":["linux"]},
+
+    {"file":"understand/isv_deployment_win", "os":["windows"]},
+]
+
+external_toc_path = "./sphinx/_toc.yml"
+
+docs_core = ROCmDocs("ROCm 5.7.0 Documentation Home")
+docs_core.setup()
+
+external_projects_current_project = "rocm"
+
+for sphinx_var in ROCmDocs.SPHINX_VARS:
+    globals()[sphinx_var] = getattr(docs_core, sphinx_var)
+html_theme_options = {
+    "link_main_doc": False
+}

docs/contribute/building.md

@@ -0,0 +1,165 @@
+# Building Documentation
+
+While contributing, one may build the documentation locally on the command-line
+or rely on Continuous Integration for previewing the resulting HTML pages in a
+browser.
+
+## Pull Request documentation builds
+
+When opening a PR to the `develop` branch on GitHub, the page corresponding to
+the PR (`https://github.com/RadeonOpenCompute/ROCm/pull/<pr_number>`) will have
+a summary at the bottom. This requires the user be logged in to GitHub.
+
+- There, click `Show all checks` and `Details` of the Read the Docs pipeline. It
+  will take you to a URL of the form
+  `https://readthedocs.com/projects/advanced-micro-devices-rocm/builds/<some_build_num>/`
+  - The list of commands shown are the exact ones used by CI to produce a render
+    of the documentation.
+- There, click on the small blue link `View docs` (which is not the same as the
+  bigger button with the same text). It will take you to the built HTML site with
+  a URL of the form
+  `https://advanced-micro-devices-demo--<pr_number>.com.readthedocs.build/projects/alpha/en/<pr_number>/`.
+
+## Build documentation from the Command Line
+
+Python versions known to build documentation:
+
+- 3.8
+
+To build the docs locally using Python Virtual Environment (`venv`), execute the
+following commands from the project root:
+
+```sh
+python3 -mvenv .venv
+# Windows
+.venv/Scripts/python -m pip install -r docs/sphinx/requirements.txt
+.venv/Scripts/python -m sphinx -T -E -b html -d _build/doctrees -D language=en docs _build/html
+# Linux
+.venv/bin/python     -m pip install -r docs/sphinx/requirements.txt
+.venv/bin/python     -m sphinx -T -E -b html -d _build/doctrees -D language=en docs _build/html
+```
+
+Then open up `_build/html/index.html` in your favorite browser.
+
+## Build documentation using Visual Studio (VS) Code
+
+One can put together a productive environment to author documentation and also
+test it locally using VS Code with only a handful of extensions. Even though the
+extension landscape of VS Code is ever changing, here is one example setup that
+proved useful at the time of writing. In it, one can change/add content, build a
+new version of the docs using a single VS Code Task (or hotkey), see all errors/
+warnings emitted by Sphinx in the Problems pane and immediately see the
+resulting website show up on a locally-served web server.
+
+### Configuring VS Code
+
+1. Install the following extensions:
+
+    - Python `(ms-python.python)`
+    - Live Server `(ritwickdey.LiveServer)`
+
+2. Add the following entries in `.vscode/settings.json`
+
+    ```json
+    {
+      "liveServer.settings.root": "/.vscode/build/html",
+      "liveServer.settings.wait": 1000,
+      "python.terminal.activateEnvInCurrentTerminal": true
+    }
+    ```
+
+    The settings above are used for the following reasons:
+    - `liveServer.settings.root`: Sets the root of the output website for live previews. Must be changed
+      alongside the `tasks.json` command.
+    - `liveServer.settings.wait`: Tells live server to wait with the update to give time for Sphinx to
+      regenerate site contents and not refresh before all is done. (Empirical value)
+    - `python.terminal.activateEnvInCurrentTerminal`: Automatic virtual environment activation is a nice touch,
+      should you want to build the site from the integrated terminal.
+
+3. Add the following tasks in `.vscode/tasks.json`
+
+    ```json
+    {
+      "version": "2.0.0",
+      "tasks": [
+        {
+          "label": "Build Docs",
+          "type": "process",
+          "windows": {
+            "command": "${workspaceFolder}/.venv/Scripts/python.exe"
+          },
+          "command": "${workspaceFolder}/.venv/bin/python3",
+          "args": [
+            "-m",
+            "sphinx",
+            "-j",
+            "auto",
+            "-T",
+            "-b",
+            "html",
+            "-d",
+            "${workspaceFolder}/.vscode/build/doctrees",
+            "-D",
+            "language=en",
+            "${workspaceFolder}/docs",
+            "${workspaceFolder}/.vscode/build/html"
+          ],
+          "problemMatcher": [
+            {
+              "owner": "sphinx",
+              "fileLocation": "absolute",
+              "pattern": {
+                "regexp": "^(?:.*\\.{3}\\s+)?(\\/[^:]*|[a-zA-Z]:\\\\[^:]*):(\\d+):\\s+(WARNING|ERROR):\\s+(.*)$",
+                "file": 1,
+                "line": 2,
+                "severity": 3,
+                "message": 4
+              },
+            },
+            {
+              "owner": "sphinx",
+              "fileLocation": "absolute",
+              "pattern": {
+                "regexp": "^(?:.*\\.{3}\\s+)?(\\/[^:]*|[a-zA-Z]:\\\\[^:]*):{1,2}\\s+(WARNING|ERROR):\\s+(.*)$",
+                "file": 1,
+                "severity": 2,
+                "message": 3
+              }
+            }
+          ],
+          "group": {
+            "kind": "build",
+            "isDefault": true
+          }
+        },
+      ],
+    }
+    ```
+
+    > (Implementation detail: two problem matchers were needed to be defined,
+    > because VS Code doesn't tolerate some problem information being potentially
+    > absent. While a single regex could match all types of errors, if a capture
+    > group remains empty (the line number doesn't show up in all warning/error
+    > messages) but the `pattern` references said empty capture group, VS Code
+    > discards the message completely.)
+
+4. Configure Python virtual environment (`venv`)
+
+    - From the Command Palette, run `Python: Create Environment`
+      - Select `venv` environment and the `docs/sphinx/requirements.txt` file.
+      _(Simply pressing enter while hovering over the file from the drop down is
+      insufficient, one has to select the radio button with the 'Space' key if
+      using the keyboard.)_
+
+5. Build the docs
+
+    - Launch the default build Task using either:
+      - a hotkey _(default is `Ctrl+Shift+B`)_ or
+      - by issuing the `Tasks: Run Build Task` from the Command Palette.
+
+6. Open the live preview
+
+    - Navigate to the output of the site within VS Code, right-click on
+    `.vscode/build/html/index.html` and select `Open with Live Server`. The
+    contents should update on every rebuild without having to refresh the
+    browser.

docs/contribute/feedback.md

@@ -0,0 +1,27 @@
+# How to provide feedback for ROCm documentation
+
+There are four standard ways to provide feedback for this repository.
+
+## Pull Request
+
+All contributions to ROCm documentation should arrive via the
+[GitHub Flow](https://docs.github.com/en/get-started/quickstart/github-flow)
+targeting the develop branch of the repository. If you are unable to contribute
+via the GitHub Flow, feel free to email us.
+
+## GitHub Discussions
+
+To ask questions or view answers to frequently asked questions, refer to
+[GitHub Discussions](https://github.com/RadeonOpenCompute/ROCm/discussions).
+On GitHub Discussions, in addition to asking and answering questions,
+members can share updates, have open-ended conversations,
+and follow along on via public announcements.
+
+## GitHub Issue
+
+Issues on existing or absent docs can be filed as
+[GitHub Issues](https://github.com/RadeonOpenCompute/ROCm/issues).
+
+## Email
+
+Send other feedback or questions to [rocm-feedback@amd.com](rocm-feedback@amd.com)