Update documentation requirements

* update SLES 15.4 prerequisites

* update wordlist from develop

* fixing spelling errors

.github/CODEOWNERS

@@ -0,0 +1 @@
+* @saadrahim @Rmalavally @amd-aakash @zhang2amd @jlgreathouse @samjwu @MathiasMagnus

.github/dependabot.yml

@@ -0,0 +1,12 @@
+# To get started with Dependabot version updates, you'll need to specify which
+# package ecosystems to update and where the package manifests are located.
+# Please see the documentation for all configuration options:
+# https://docs.github.com/github/administering-a-repository/configuration-options-for-dependency-updates
+
+version: 2
+updates:
+  - package-ecosystem: "pip" # See documentation for possible values
+    directory: "/docs/sphinx" # Location of package manifests
+    open-pull-requests-limit: 10
+    schedule:
+      interval: "daily"

.github/workflows/linting.yml

@@ -0,0 +1,20 @@
+name: Linting
+
+on:
+  push:
+    branches: 
+    - develop
+    - main
+    - 'docs/*'
+    - 'roc**'
+  pull_request:
+    branches: 
+    - develop
+    - main
+    - 'docs/*'
+    - 'roc**'
+
+jobs:
+  call-workflow-passing-data:
+    name: Documentation
+    uses: RadeonOpenCompute/rocm-docs-core/.github/workflows/linting.yml@develop

.gitignore

@@ -0,0 +1,18 @@
+.venv
+.vscode
+build
+
+# documentation artifacts
+_build/
+_images/
+_static/
+_templates/
+_toc.yml
+docBin/
+_doxygen/
+_readthedocs/
+
+# avoid duplicating contributing.md due to conf.py
+docs/contributing.md
+docs/release.md
+docs/CHANGELOG.md

.markdownlint-cli2.yaml

@@ -0,0 +1,14 @@
+config:
+  default: true
+  MD013: false
+  MD026:
+    punctuation: '.,;:!'
+  MD029:
+    style: ordered
+  MD033: false
+  MD034: false
+  MD041: false
+ignores:
+  - CHANGELOG.md
+  - "{,docs/}{RELEASE,release}.md"
+  - tools/autotag/templates/**/*.md

.readthedocs.yaml

@@ -0,0 +1,21 @@
+# Read the Docs configuration file
+# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
+
+version: 2
+
+build:
+   os: ubuntu-22.04
+   tools:
+      python: "3.10"
+   apt_packages:
+     - "doxygen"
+     - "graphviz" # For dot graphs in doxygen
+
+python:
+   install:
+   - requirements: docs/sphinx/requirements.txt
+
+sphinx:
+   configuration: docs/conf.py
+
+formats: []

.wordlist.txt

@@ -0,0 +1,686 @@
+AAC
+ABI
+ACE
+ACEs
+AccVGPR
+AccVGPRs
+ALU
+AMD
+AMDGPU
+AMDGPUs
+AMDMIGraphX
+AMI
+AOCC
+AOMP
+APIC
+APIs
+APU
+ASIC
+ASICs
+ASan
+ASm
+ATI
+AddressSanitizer
+AlexNet
+Arb
+BLAS
+BMC
+BitCode
+Blit
+Bluefield
+CCD
+CDNA
+CIFAR
+CLI
+CLion
+CMake
+CMakeLists
+CMakePackage
+CP
+CPC
+CPF
+CPP
+CPU
+CPUs
+CSC
+CSE
+CSV
+CSn
+CTests
+CU
+CUDA
+CUs
+CXX
+Cavium
+CentOS
+ChatGPT
+CoRR
+Codespaces
+Commitizen
+CommonMark
+Concretized
+Conda
+ConnectX
+DGEMM
+DKMS
+DL
+DMA
+DNN
+DNNL
+DPM
+DRI
+DW
+DWORD
+Dask
+DataFrame
+DataLoader
+DataParallel
+DeepSpeed
+Dependabot
+DevCap
+Dockerfile
+Doxygen
+ELMo
+ENDPGM
+EPYC
+ESXi
+FFT
+FFTs
+FFmpeg
+FHS
+FMA
+FP
+Filesystem
+Flang
+Fortran
+Fuyu
+GALB
+GCD
+GCDs
+GCN
+GDB
+GDDR
+GDR
+GDS
+GEMM
+GEMMs
+GFortran
+GiB
+GIM
+GL
+GLXT
+GMI
+GPG
+GPR
+GPT
+GPU
+GPU's
+GPUs
+GRBM
+GenAI
+GenZ
+GitHub
+Gitpod
+HBM
+HCA
+HIPCC
+HIPExtension
+HIPIFY
+HPC
+HPCG
+HPE
+HPL
+HSA
+HWE
+Haswell
+Higgs
+Hyperparameters
+ICV
+IDE
+IDEs
+IMDb
+IOMMU
+IOP
+IOPM
+IOV
+IRQ
+ISA
+ISV
+ISVs
+ImageNet
+InfiniBand
+Inlines
+IntelliSense
+Intersphinx
+Intra
+Ioffe
+JSON
+Jupyter
+KFD
+KiB
+KVM
+Keras
+Khronos
+LAPACK
+LCLK
+LDS
+LLM
+LLMs
+LLVM
+LM
+LSAN
+LTS
+LoRA
+MEM
+MERCHANTABILITY
+MFMA
+MiB
+MIGraphX
+MIOpen
+MIOpenGEMM
+MIVisionX
+MLM
+MMA
+MMIO
+MMIOH
+MNIST
+MPI
+MSVC
+MVAPICH
+MVFFR
+Makefile
+Makefiles
+Matplotlib
+Megatron
+Mellanox
+Mellanox's
+Meta's
+MirroredStrategy
+Multicore
+Multithreaded
+MyEnvironment
+MyST
+NBIO
+NBIOs
+NIC
+NICs
+NLI
+NLP
+NPS
+NSP
+NUMA
+NVCC
+NVIDIA
+NVPTX
+NaN
+Nano
+Navi
+Noncoherently
+NousResearch's
+NumPy
+OAM
+OAMs
+OCP
+OEM
+OFED
+OMP
+OMPI
+OMPT
+OMPX
+ONNX
+OSS
+OSU
+OpenCL
+OpenCV
+OpenFabrics
+OpenGL
+OpenMP
+OpenSSL
+OpenVX
+PCI
+PCIe
+PEFT
+PIL
+PILImage
+PRNG
+PRs
+PaLM
+Pageable
+PeerDirect
+Perfetto
+PipelineParallel
+PnP
+PowerShell
+PyPi
+PyTorch
+Qcycles
+RAII
+RCCL
+RDC
+RDMA
+RDNA
+RHEL
+ROC
+ROCProfiler
+ROCTracer
+ROCclr
+ROCdbgapi
+ROCgdb
+ROCk
+ROCm
+ROCmCC
+ROCmSoftwarePlatform
+ROCmValidationSuite
+ROCr
+RST
+RW
+Radeon
+RelWithDebInfo
+Req
+Rickle
+RoCE
+Ryzen
+SALU
+SBIOS
+SCA
+SDK
+SDMA
+SDRAM
+SENDMSG
+SGPR
+SGPRs
+SHA
+SIGQUIT
+SIMD
+SIMDs
+SKU
+SKUs
+SLES
+SMEM
+SMI
+SMT
+SPI
+SQs
+SRAM
+SRAMECC
+SVD
+SWE
+SerDes
+Shlens
+Skylake
+Softmax
+Spack
+Supermicro
+Szegedy
+TCA
+TCC
+TCI
+TCIU
+TCP
+TCR
+TF
+TFLOPS
+TPU
+TPUs
+TensorBoard
+TensorFlow
+TensorParallel
+ToC
+TorchAudio
+TorchMIGraphX
+TorchScript
+TorchServe
+TorchVision
+TransferBench
+TrapStatus
+UAC
+UC
+UCC
+UCX
+UIF
+USM
+UTCL
+UTIL
+Uncached
+Unhandled
+VALU
+VBIOS
+VGPR
+VGPRs
+VM
+VMEM
+VMWare
+VRAM
+VSIX
+VSkipped
+Vanhoucke
+Vulkan
+WGP
+WGPs
+WX
+WikiText
+Wojna
+Workgroups
+Writebacks
+XCD
+XCDs
+XGBoost
+XGBoost's
+XGMI
+XT
+XTX
+Xeon
+Xilinx
+Xnack
+Xteam
+YAML
+YML
+YModel
+ZeRO
+ZenDNN
+accuracies
+activations
+addr
+alloc
+allocator
+allocators
+amdgpu
+api
+atmi
+atomics
+autogenerated
+avx
+awk
+backend
+backends
+benchmarking
+bfloat
+bilinear
+bitsandbytes
+blit
+boson
+bosons
+buildable
+bursty
+bzip
+cacheable
+cd
+centos
+centric
+changelog
+chiplet
+cmake
+cmd
+coalescable
+codename
+collater
+comgr
+completers
+composable
+concretization
+config
+conformant
+convolutional
+convolves
+cpp
+csn
+cuBLAS
+cuFFT
+cuLIB
+cuRAND
+cuSOLVER
+cuSPARSE
+dataset
+datasets
+dataspace
+datatype
+datatypes
+dbgapi
+de
+deallocation
+denoise
+denoised
+denoises
+denormalize
+deserializers
+detections
+dev
+devicelibs
+devsel
+dimensionality
+disambiguates
+distro
+el
+embeddings
+enablement
+endpgm
+encodings
+env
+epilog
+etcetera
+ethernet
+exascale
+executables
+ffmpeg
+filesystem
+fortran
+galb
+gcc
+gdb
+gfortran
+gfx
+githooks
+github
+gnupg
+grayscale
+gzip
+heterogenous
+hipBLAS
+hipBLASLt
+hipCUB
+hipFFT
+hipLIB
+hipRAND
+hipSOLVER
+hipSPARSE
+hipSPARSELt
+hipTensor
+hipamd
+hipblas
+hipcub
+hipfft
+hipfort
+hipify
+hipsolver
+hipsparse
+hpp
+hsa
+hsakmt
+hyperparameter
+ib_core
+inband
+incrementing
+inferencing
+inflight
+init
+initializer
+inlining
+installable
+interprocedural
+intra
+invariants
+invocating
+ipo
+kdb
+latencies
+libfabric
+libjpeg
+libs
+linearized
+linter
+linux
+llvm
+localscratch
+logits
+lossy
+macOS
+matchers
+microarchitecture
+migraphx
+miopen
+miopengemm
+mivisionx
+mkdir
+mlirmiopen
+mtypes
+mvffr
+namespace
+namespaces
+numref
+ocl
+opencl
+opencv
+openmp
+openssl
+optimizers
+os
+pageable
+parallelization
+parameterization
+passthrough
+perfcounter
+performant
+perl
+pragma
+pre
+prebuilt
+precompiled
+prefetch
+prefetchable
+preprocess
+preprocessed
+preprocessing
+prequantized
+prerequisites
+profiler
+protobuf
+pseudorandom
+py
+quasirandom
+queueing
+rccl
+rdc
+reStructuredText
+reformats
+repos
+representativeness
+req
+resampling
+rescaling
+reusability
+roadmap
+roc
+rocAL
+rocALUTION
+rocBLAS
+rocFFT
+rocLIB
+rocMLIR
+rocPRIM
+rocRAND
+rocSOLVER
+rocSPARSE
+rocThrust
+rocWMMA
+rocalution
+rocblas
+rocclr
+rocfft
+rocm
+rocminfo
+rocprim
+rocprof
+rocprofiler
+rocr
+rocrand
+rocsolver
+rocsparse
+rocthrust
+roctracer
+runtime
+runtimes
+sL
+scalability
+scalable
+sendmsg
+serializers
+shader
+sharding
+sigmoid
+sm
+smi
+softmax
+spack
+src
+stochastically
+strided
+subdirectory
+subexpression
+subfolder
+subfolders
+supercomputing
+tensorfloat
+th
+tokenization
+tokenize
+tokenized
+tokenizer
+tokenizes
+toolchain
+toolchains
+toolset
+toolsets
+torchvision
+tqdm
+tracebacks
+txt
+uarch
+uncached
+uncorrectable
+uninstallation
+unsqueeze
+unstacking
+unswitching
+untrusted
+untuned
+upvote
+USM
+UTCL
+UTIL
+utils
+vL
+variational
+vdi
+vectorizable
+vectorization
+vectorize
+vectorized
+vectorizer
+vectorizes
+vjxb
+walkthrough
+walkthroughs
+wavefront
+wavefronts
+whitespaces
+workgroup
+workgroups
+writeback
+writebacks
+wrreq
+wzo
+xargs
+xz
+yaml
+ysvmadyb
+zypper

CONTRIBUTING.md

@@ -0,0 +1,71 @@
+# Contributing to ROCm Docs
+
+AMD values and encourages the ROCm community to contribute to our code and
+documentation. This repository is focused on ROCm documentation and this
+contribution guide describes the recommended method for creating and modifying our
+documentation.
+
+While interacting with ROCm Documentation, we encourage you to be polite and
+respectful in your contributions, content or otherwise. Authors, maintainers of
+these docs act on good intentions and to the best of their knowledge.
+Keep that in mind while you engage. Should you have issues with contributing
+itself, refer to
+[discussions](https://github.com/RadeonOpenCompute/ROCm/discussions) on the
+GitHub repository.
+
+For additional information on documentation functionalities,
+see the user and developer guides for rocm-docs-core
+at {doc}`rocm-docs-core documentation <rocm-docs-core:index>`.
+
+## Supported Formats
+
+Our documentation includes both Markdown and RST files. Markdown is encouraged
+over RST due to the lower barrier to participation. GitHub-flavored Markdown is preferred
+for all submissions as it renders accurately on our GitHub repositories. For existing documentation,
+[MyST](https://myst-parser.readthedocs.io/en/latest/intro.html) Markdown
+is used to implement certain features unsupported in GitHub Markdown. This is
+not encouraged for new documentation. AMD will transition
+to stricter use of GitHub-flavored Markdown with a few caveats. ROCm documentation
+also uses [Sphinx Design](https://sphinx-design.readthedocs.io/en/latest/index.html)
+in our Markdown and RST files. We also use Breathe syntax for Doxygen documentation
+in our Markdown files. See
+[GitHub](https://docs.github.com/en/get-started/writing-on-github/getting-started-with-writing-and-formatting-on-github)'s
+guide on writing and formatting on GitHub as a starting point.
+
+ROCm documentation adds additional requirements to Markdown and RST based files
+as follows:
+
+- Level one headers are only used for page titles. There must be only one level
+  1 header per file for both Markdown and Restructured Text.
+- Pass [markdownlint](https://github.com/markdownlint/markdownlint) check via
+  our automated GitHub action on a Pull Request (PR).
+  See the {doc}`rocm-docs-core linting user guide <rocm-docs-core:user_guide/linting>` for more details.
+
+## Filenames and folder structure
+
+Please use snake case (all lower case letters and underscores instead of spaces)
+for file names. For example, `example_file_name.md`.
+Our documentation follows Pitchfork for folder structure.
+All documentation is in `/docs` except for special files like
+the contributing guide in the `/` folder. All images used in the documentation are
+placed in the `/docs/data` folder.
+
+## Language and Style
+
+Adopt Microsoft CPP-Docs guidelines for
+[Voice and Tone](https://github.com/MicrosoftDocs/cpp-docs/blob/main/styleguide/voice-tone.md).
+
+ROCm documentation templates to be made public shortly. ROCm templates dictate
+the recommended structure and flow of the documentation. Guidelines on how to
+integrate figures, equations, and tables are all based off
+[MyST](https://myst-parser.readthedocs.io/en/latest/intro.html).
+
+Font size and selection, page layout, white space control, and other formatting
+details are controlled via [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core).
+Raise issues in `rocm-docs-core` for any formatting concerns and changes requested.
+
+## More
+
+For more topics, such as submitting feedback and ways to build documentation,
+see the [Contributing Section](https://rocm.docs.amd.com/en/latest/contributing.html)
+at [rocm.docs.amd.com](https://rocm.docs.amd.com)

LICENSE

@@ -0,0 +1,21 @@
+MIT License
+
+Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

README.md

@@ -1,900 +1,50 @@
+# AMD ROCm™ Platform
 
-# AMD ROCm™ v4.3.1 Point Release Notes 
+ROCm is an open-source stack, composed primarily of open-source software (OSS), designed for
+graphics processing unit (GPU) computation. ROCm consists of a collection of drivers, development
+tools, and APIs that enable GPU programming from low-level kernel to end-user applications.
 
-This document describes the features, fixed issues, and information about downloading and installing the AMD ROCm™ software.
+With ROCm, you can customize your GPU software to meet your specific needs. You can develop,
+collaborate, test, and deploy your applications in a free, open-source, integrated, and secure software
+ecosystem. ROCm is particularly well-suited to GPU-accelerated high-performance computing (HPC),
+artificial intelligence (AI), scientific computing, and computer aided design (CAD).
 
-It also covers known issues in this release.
+ROCm is powered by AMD’s
+[Heterogeneous-computing Interface for Portability (HIP)](https://github.com/ROCm-Developer-Tools/HIP),
+an OSS C++ GPU programming environment and its corresponding runtime. HIP allows ROCm
+developers to create portable applications on different platforms by deploying code on a range of
+platforms, from dedicated gaming GPUs to exascale HPC clusters.
 
-## List of Supported Operating Systems
+ROCm supports programming models, such as OpenMP and OpenCL, and includes all necessary OSS
+compilers, debuggers, and libraries. ROCm is fully integrated into machine learning (ML) frameworks,
+such as PyTorch and TensorFlow.
 
-The AMD ROCm platform supports the following operating systems:
+## ROCm Documentation
 
-![Screenshot](https://github.com/RadeonOpenCompute/ROCm/blob/master/images/SuppEnv.PNG)
+The ROCm Documentation site is [rocm.docs.amd.com](https://rocm.docs.amd.com).
 
+Source code for the documentation is located in the docs folder of most repositories that are part of
+ROCm.
 
-## What\'s New in This Release
+This repository contains the manifest file for ROCm releases, changelogs, and release information.
+The file `default.xml` contains information for all repositories and the associated commit used to build
+the current ROCm release.
 
-The ROCm v4.3.1 release consists of the following enhancements:
+The `default.xml` file uses the repo Manifest Format.
 
-### Support for RHEL V8.4
+The develop branch of this repository contains content for the next ROCm release.
 
-This release extends support for RHEL v8.4.
+### How to build documentation via Sphinx
 
-### Support for SLES V15 Service Pack 3
+```bash
+cd docs
 
-This release extends support for SLES v15 SP3.
+pip3 install -r sphinx/requirements.txt
 
-### Pass Manager Update 
-
-In the AMD ROCm 4.3.1 release, the ROCm compiler uses the legacy pass manager, by default, to provide a better performance experience with some workloads. 
-
-Previously, in ROCm v4.3, the default choice for the ROCm compiler was the new pass manager. 
-
-For more information about legacy and new pass managers, see http://llvm.org.
-
-
-## Known Issues in This Release
-
-### General Userspace and Application Freeze on MI25
-
-For some workloads on MI25, general user space and application freeze are observed, and the GPU resets intermittently. Note, the freeze may take hours to reproduce.
-
-This issue is under active investigation, and no workarounds are available currently.
-
-### hipRTC - File Not Found Error
-
-hipRTC may fail, and users may encounter the following error:
-
-
-		<built-in>:1:10: fatal error: '__clang_hip_runtime_wrapper.h' file not found
-		#include "__clang_hip_runtime_wrapper.h"
-
-
-
-#### Suggested Workarounds
-
-* Set LLVM_PATH in the environment to <path to ROCm llvm>/llvm. Note, if ROCm is installed at the default location, then LLVM_PATH must be set to /opt/rocm/llvm. 
-	
-* Add “-I <path to ROCm>/llvm/lib/clang/13.0.0/include/” to compiler options in the call to hiprtcCompileProgram (). Note, this workaround requires the following changes in the code:
-
-	
-		// set NUM_OPTIONS to one more than the number of options that was previously required
-		const char* options[NUM_OPTIONS];
-		// fill other options[] here
-		std::string sarg = "-I/opt/rocm/llvm/lib/clang/13.0.0/include/";
-		options[NUM_OPTIONS - 1] = sarg.c_str();
-		hiprtcResult compileResult{hiprtcCompileProgram(prog, NUM_OPTIONS, options)};"
-
-
-
-
-# AMD ROCm™ v4.3 Release Notes 
-
-This document describes the features, fixed issues, and information about downloading and installing the AMD ROCm™ software. It also covers known issues and deprecations in this release.
-
-- [Supported Operating Systems and Documentation Updates](#Supported-Operating-Systems-and-Documentation-Updates)
-  * [Supported Operating Systems](#Supported-Operating-Systems)
-  * [ROCm Installation Updates](#ROCm-Installation-Updates)
-  * [AMD ROCm Documentation Updates](#AMD-ROCm-Documentation-Updates)
-
-   
-- [What\'s New in This Release](#Whats-New-in-This-Release)
-  * [HIP Enhancements](#HIP-Enhancements)
-  * [ROCm Data Center Tool](#ROCm-Data-Center-Tool)
-  * [ROCm Math and Communication Libraries](#ROCm-Math-and-Communication-Libraries)
-  * [ROCProfiler Enhancements](#ROCProfiler-Enhancements)   
-
-- [Known Issues in This Release](#Known-Issues-in-This-Release)
-
-- [Hardware and Software Support](#Hardware-and-Software-Support)
-
-- [Machine Learning and High Performance Computing Software Stack for AMD GPU](#Machine-Learning-and-High-Performance-Computing-Software-Stack-for-AMD-GPU)
-  * [ROCm Binary Package Structure](#ROCm-Binary-Package-Structure)
-  * [ROCm Platform Packages](#ROCm-Platform-Packages)
-  
-
-
-
-## ROCm Installation Updates 
-
-### Supported Operating Systems
-
-The AMD ROCm platform is designed to support the following operating systems:
-
-![Screenshot](https://github.com/RadeonOpenCompute/ROCm/blob/master/images/OSKernelupdated.PNG)
-
-
-### Fresh Installation of AMD ROCM V4.3 Recommended
-
-Complete uninstallation of previous ROCm versions is required before installing a new version of ROCm. **An upgrade from previous releases to AMD ROCm v4.3 is not supported**. For more information, refer to the AMD ROCm Installation Guide at
-
-https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation-Guide.html
-
-**Note**: AMD ROCm release v3.3 or prior releases are not fully compatible with AMD ROCm v3.5 and higher versions. You must perform a fresh ROCm installation if you want to upgrade from AMD ROCm v3.3 or older to 3.5 or higher versions and vice-versa.
-
-**Note**: *render* group is required only for Ubuntu v20.04. For all other ROCm supported operating systems, continue to use video group. 
-
-* For ROCm v3.5 and releases thereafter, the clinfo path is changed to /opt/rocm/opencl/bin/clinfo. 
-
-* For ROCm v3.3 and older releases, the clinfo path remains /opt/rocm/opencl/bin/x86_64/clinfo. 
- 
-## ROCm Multi-Version Installation Update
-
-With the AMD ROCm v4.3 release, the following ROCm multi-version installation changes apply:
-
-The meta packages rocm-dkms<version> are now deprecated for multi-version ROCm installs.  For example, rocm-dkms3.7.0, rocm-dkms3.8.0.
- 
-* Multi-version installation of ROCm should be performed by installing rocm-dev<version> using each of the desired ROCm versions. For example, rocm-dev3.7.0, rocm-dev3.8.0, rocm-dev3.9.0.   
-
-* The rock-dkms loadable kernel modules should be installed using a single rock-dkms package. 
-
-* ROCm v3.9 and above will not set any ldconfig entries for ROCm libraries for multi-version installation.  Users must set LD_LIBRARY_PATH to load the ROCm library version of choice.
-
-**NOTE**: The single version installation of the ROCm stack remains the same. The rocm-dkms package can be used for single version installs and is not deprecated at this time.
-	
-
-## Support for Enviornment Modules
-	
-Environment modules are now supported. This enhancement in the ROCm v4.3 release enables users to switch between ROCm v4.2 and ROCm v4.3 easily and efficiently. 
-	
-For more information about installing environment modules, refer to
-	
-https://modules.readthedocs.io/en/latest/
- 
-
-
-# AMD ROCm Documentation Updates
-
-## AMD ROCm Installation Guide 
-
-The AMD ROCm Installation Guide in this release includes:
-
-* Supported Environments
-
-* Installation Instructions 
-
-* HIP Installation Instructions 
-
-For more information, refer to the ROCm documentation website at:
-
-https://rocmdocs.amd.com/en/latest/
-
-
-## AMD ROCm - HIP Documentation Updates
-
-* HIP Programming Guide v4.3 
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Programming_Guide_v4.3.pdf
-	
-* HIP API Guide v4.3
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_API_Guide_v4.3.pdf
-	
-* HIP-Supported CUDA API Reference Guide v4.3
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Supported_CUDA_API_Reference_Guide_v4.3.pdf
-	
-
-* **NEW** - AMD ROCm Compiler Reference Guide v4.3 
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_Compiler_Reference_Guide_v4.3.pdf
-	
-* HIP FAQ
-	
-https://rocmdocs.amd.com/en/latest/Programming_Guides/HIP-FAQ.html#hip-faq
-
-
-## ROCm Data Center User and API Guide
-
-* ROCm Data Center Tool User Guide
-
-  - Prometheus (Grafana) Integration with Automatic Node Detection 
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCm_DataCenter_Tool_User_Guide_v4.3.pdf
-
-* ROCm Data Center Tool API Guide
-
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_RDC_API_Guide_v4.3.pdf
-	
-
-## ROCm SMI API Documentation Updates 
-
-* ROCm SMI API Guide 
-
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCm_SMI_Guide_v4.3.pdf
- 
-  
-## ROC Debugger User and API Guide 
-
-* ROC Debugger User Guide  
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCDebugger_User_Guide.pdf
-
-* Debugger API Guide 
-
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCDebugger_API.pdf 
-	
-
-## General AMD ROCm Documentation Links
-
-Access the following links for more information:
-
-* For AMD ROCm documentation, see 
-
-  https://rocmdocs.amd.com/en/latest/
-
-* For installation instructions on supped platforms, see
-
-  https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation-Guide.html
-
-* For AMD ROCm binary structure, see
-
-  https://rocmdocs.amd.com/en/latest/Installation_Guide/Software-Stack-for-AMD-GPU.html
-  
-
-* For AMD ROCm Release History, see
-
- https://rocmdocs.amd.com/en/latest/Current_Release_Notes/ROCm-Version-History.html
-
-
-
-# What\'s New in This Release
-
-## HIP Enhancements
-
-### HIP Versioning Update
-
-The HIP version definition is updated from the ROCm v4.2 release as follows: 
-
-```
-	HIP_VERSION=HIP_VERSION_MAJOR * 10000000 + HIP_VERSION_MINOR * 100000 + 
-	HIP_VERSION_PATCH)
+python3 -m sphinx -T -E -b html -d _build/doctrees -D language=en . _build/html
 ```
 
-The HIP version can be queried from a HIP API call
-
-
-```	
-	hipRuntimeGetVersion(&runtimeVersion);	
-```
-	
-**Note**: The version returned will be greater than the version in previous ROCm releases.
-
-	
-### Support for Managed Memory Allocation
-
-HIP now supports and automatically manages Heterogeneous Memory Management (HMM) allocation. The HIP application performs a capability check before making the managed memory API call hipMallocManaged.
-
-**Note**: The _managed_ keyword is unsupported currently. 
-
-```
-	int managed_memory = 0;
-	HIPCHECK(hipDeviceGetAttribute(&managed_memory,
- 	 hipDeviceAttributeManagedMemory,p_gpuDevice));
-	if (!managed_memory ) {
-  	printf ("info: managed memory access not supported on the device %d\n Skipped\n", p_gpuDevice);
-	}
-	else {
- 	 HIPCHECK(hipSetDevice(p_gpuDevice));
-  	HIPCHECK(hipMallocManaged(&Hmm, N * sizeof(T)));
-	. . .
-	}
-```
-
-### Kernel Enqueue Serialization
-
-Developers can control kernel command serialization from the host using the following environment variable,
-AMD_SERIALIZE_KERNEL
-	
-* AMD_SERIALIZE_KERNEL = 1, Wait for completion before enqueue,
-
-* AMD_SERIALIZE_KERNEL = 2, Wait for completion after enqueue,
-
-* AMD_SERIALIZE_KERNEL = 3, Both.
-
-This environment variable setting enables HIP runtime to wait for GPU idle before/after any GPU command.
-
-
-### NUMA-aware Host Memory Allocation
-	
-The Non-Uniform Memory Architecture (NUMA) policy determines how memory is allocated and selects a CPU closest to each GPU. 
-	
-NUMA also measures the distance between the GPU and CPU devices. By default, each GPU selects a Numa CPU node that has the least NUMA distance between them; the host memory is automatically allocated closest to the memory pool of the NUMA node of the current GPU device. 
-	
-Note, using the *hipSetDevice* API with a different GPU provides access to the host allocation. However, it may have a longer NUMA distance.
-
-
-### New Atomic System Scope Atomic Operations
-	
-HIP now provides new APIs with _system as a suffix to support system scope atomic operations. For example,  atomicAnd atomic is dedicated to the GPU device, and atomicAnd_system allows developers to extend the atomic operation to system scope from the GPU device to other CPUs and GPU devices in the system.
-	
-For more information, refer to the HIP Programming Guide at,
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Programming_Guide_v4.3.pdf
-
-### Indirect Function Call and C++ Virtual Functions 
-	
-While the new release of the ROCm compiler supports indirect function calls and C++ virtual functions on a device, there are some known limitations and issues. 
-	
-**Limitations**
-	
-* An address to a function is device specific.  Note, a function address taken on the host can not be used on a device, and a function address taken on a device can not be used on the host.  On a system with multiple devices, an address taken on one device can not be used on a different device.
-	
-* C++ virtual functions only work on the device where the object was constructed.
-	
-* Indirect call to a device function with function scope shared memory allocation is not supported. For example, LDS.
-	
-* Indirect call to a device function defined in a source file different than the calling function/kernel is only supported when compiling the entire program with -fgpu-rdc.
-	
-**Known Issues in This Release**
-	
-* Programs containing kernels with different launch bounds may crash when making an indirect function call.  This issue is due to a compiler issue miscalculating the register budget for the callee function.
-	
-* Programs may not work correctly when making an indirect call to a function that uses more resources. For example, scratch memory, shared memory, registers made available by the caller.
-	
-* Compiling a program with objects with pure or deleted virtual functions on the device will result in a linker error.  This issue is due to the missing implementation of some C++ runtime functions on the device.
-	
-* Constructing an object with virtual functions in private or shared memory may crash the program due to a compiler issue when generating code for the constructor.  
-
-
-## ROCm Data Center Tool 
-
-### Prometheus (Grafana) Integration with Automatic Node Detection 
-
-The ROCm Data Center (RDC) tool enables you to use Consul to discover the rdc_prometheus service automatically. Consul is “a service mesh solution providing a full-featured control plane with service discovery, configuration, and segmentation functionality.” For more information, refer to their website at https://www.consul.io/docs/intro.
-	
-The ROCm Data Center Tool uses Consul for health checks of RDC’s integration with the Prometheus plug-in (rdc_prometheus), and these checks provide information on its efficiency.  
-	
-Previously, when a new compute node was added, users had to change prometheus_targets.json to use Consul manually. Now, with the Consul agent integration, a new compute node can be discovered automatically.
-	
-https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCm_DataCenter_Tool_User_Guide_v4.3.pdf
-
-### Coarse Grain Utilization
-	
-This feature provides a counter that displays the coarse grain GPU usage information, as shown below.
-	
-Sample output
-
-```
-		$ rocm_smi.py --showuse
-		============================== % time GPU is busy =============================
-               GPU[0] : GPU use (%): 0
-               GPU[0] : GFX Activity: 3401
-```
-
-	
-### Add 64-bit Energy Accumulator In-band
-	
-This feature provides an average value of energy consumed over time in a free-flowing RAPL counter, a 64-bit Energy Accumulator.
-	
-Sample output
-	
-```
-	$ rocm_smi.py --showenergycounter
-	=============================== Consumed Energy ================================
-	GPU[0] : Energy counter: 2424868
-	GPU[0] : Accumulated Energy (uJ): 0.0	
-
-```	
-	
-### Support for Continuous Clocks Values
-	
-ROCm SMI will support continuous clock values instead of the previous discrete levels. Moving forward the updated sysfs file will consist of only MIN and MAX values and the user can set the clock value in the given range. 
-	
-Sample output:
-
-```
-	$ rocm_smi.py --setsrange 551 1270 
-	Do you accept these terms? [y/N] y                                                                                    
-	============================= Set Valid sclk Range=======
-	GPU[0]          : Successfully set sclk from 551(MHz) to 1270(MHz)                                                     
-	GPU[1]          : Successfully set sclk from 551(MHz) to 1270(MHz)                                                     
-	=========================================================================
-                       
-	$ rocm_smi.py --showsclkrange                                                                                                                                                                    
-	============================ Show Valid sclk Range======                     
-
-	GPU[0]          : Valid sclk range: 551Mhz - 1270Mhz                                                                  
-	GPU[1]          : Valid sclk range: 551Mhz - 1270Mhz             
-```
-	
-### Memory Utilization Counters
-
-This feature provides a counter display memory utilization information as shown below.
-
-Sample output
-	
-```
-       $ rocm_smi.py --showmemuse
-	========================== Current Memory Use ==============================
-
-	GPU[0] : GPU memory use (%): 0
-	GPU[0] : Memory Activity: 0
-```	
-
-### Performance Determinism
-
-ROCm SMI supports performance determinism as a unique mode of operation. Performance variations are minimal as this enhancement allows users to control the entry and exit to set a soft maximum (ceiling) for the GFX clock.
-	
-Sample output
-
-```
-	$ rocm_smi.py --setperfdeterminism 650
-	cat pp_od_clk_voltage
-	GFXCLK:                
-	0: 500Mhz
-	1: 650Mhz *
-	2: 1200Mhz
-	$ rocm_smi.py --resetperfdeterminism 	
-```	
-	
-**Note**: The idle clock will not take up higher clock values if no workload is running. After enabling determinism, users can run a GFX workload to set performance determinism to the desired clock value in the valid range.
-
-	* GFX clock could either be less than or equal to the max value set in this mode. GFX clock will be at the max clock set in this mode only when required by the running 	workload.
-	
-	* VDDGFX will be higher by an offset (75mv or so based on PPTable) in the determinism mode.
-	
-### HBM Temperature Metric Per Stack
-
-This feature will enable ROCm SMI to report all HBM temperature values as shown below.
-
-Sample output
-
-```	
-   	$ rocm_smi.py –showtemp
-	================================= Temperature =================================
-	GPU[0] : Temperature (Sensor edge) (C): 29.0
-	GPU[0] : Temperature (Sensor junction) (C): 36.0
-	GPU[0] : Temperature (Sensor memory) (C): 45.0
-	GPU[0] : Temperature (Sensor HBM 0) (C): 43.0
-	GPU[0] : Temperature (Sensor HBM 1) (C): 42.0
-	GPU[0] : Temperature (Sensor HBM 2) (C): 44.0
-	GPU[0] : Temperature (Sensor HBM 3) (C): 45.0
-```	
-
-	
-## ROCm Math and Communication Libraries 
-
-### rocBLAS
-
-**Optimizations**
-
-* Improved performance of non-batched and batched rocblas_Xgemv for gfx908 when m <= 15000 and n <= 15000
-	
-* Improved performance of non-batched and batched rocblas_sgemv and rocblas_dgemv for gfx906 when m <= 6000 and n <= 6000
-	
-* Improved the overall performance of non-batched and batched rocblas_cgemv for gfx906
-	
-* Improved the overall performance of rocblas_Xtrsv
-
-For more information, refer to 
-
-https://rocblas.readthedocs.io/en/master/
-
-
-### rocRAND
-
-**Enhancements**
-	
-* gfx90a support added
-	
-* gfx1030 support added
-
-* gfx803 supported re-enabled
-
-**Fixed**
-	
-* Memory leaks in Poisson tests has been fixed.
-	
-* Memory leaks when generator has been created but setting seed/offset/dimensions display an exception has been fixed.
-
-For more information, refer to
-
-https://rocrand.readthedocs.io/en/latest/
-
-
-### rocSOLVER	
-
-**Enhancements**
-	
-Linear solvers for general non-square systems:
-	
-* GELS now supports underdetermined and transposed cases
-	
-* Inverse of triangular matrices
-	
-* TRTRI (with batched and strided_batched versions)
-	
-* Out-of-place general matrix inversion
-	
-* GETRI_OUTOFPLACE (with batched and strided_batched versions)
-	
-* Argument names for the benchmark client now match argument names from the public API
-	
-**Fixed Issues**
-	
-* Known issues with Thin-SVD. The problem was identified in the test specification, not in the thin-SVD implementation or the rocBLAS gemm_batched routines.
-
-* Benchmark client longer crashes as a result of leading dimension or stride arguments not being provided on the command line.
-
-**Optimizations**
-	
-* Improved general performance of matrix inversion (GETRI)
-
-For more information, refer to
-
-https://rocsolver.readthedocs.io/en/latest/
-
-
-### rocSPARSE	
-	
-**Enhancements**
-	
-* (batched) tridiagonal solver with and without pivoting
-	
-* dense matrix sparse vector multiplication (gemvi)
-	
-* support for gfx90a
-	
-* sampled dense-dense matrix multiplication (sddmm)
-	
-**Improvements**
-	
-* client matrix download mechanism
-	
-* boost dependency in clients removed
-
-
-For more information, refer to
-
-https://rocsparse.readthedocs.io/en/latest/usermanual.html#rocsparse-gebsrmv
-
-
-### hipBLAS
-
-**Enhancements**
-	
-* Added *hipblasStatusToString*
-	
-**Fixed**
-	
-* Added catch() blocks around API calls to prevent the leak of C++ exceptions
-	
-
-### rocFFT
-
-**Changes**
-	
-* Re-split device code into single-precision, double-precision, and miscellaneous kernels.
-	
-**Fixed Issues**
-	
-* double-precision planar->planar transpose.
-	
-* 3D transforms with unusual strides, for SBCC-optimized sizes.
-	
-* Improved buffer placement logic.
-
-For more information, refer to
-
-https://rocfft.readthedocs.io/en/rocm-4.3.0/
-	
-
-### hipFFT	
-
-**Fixed Issues**
-	
-* CMAKE updates
-	
-* Added callback API in hipfftXt.h header.
-
-
-### rocALUTION
-	
-**Enhancements**
-	
-* Support for gfx90a target
-	
-* Support for gfx1030 target
-	
-**Improvements**
-	
-* Install script
-	
-For more information, refer to
-	
-### rocTHRUST	
-
-**Enhancements**
-	
-* Updated to match upstream Thrust 1.11
-	
-* gfx90a support added
-	
-* gfx803 support re-enabled
-
-hipCUB	
-
-Enhancements
-
-* DiscardOutputIterator to backend header
-	
-
-## ROCProfiler Enhancements
-
-### Tracing Multiple MPI Ranks 
-
-When tracing multiple MPI ranks in ROCm v4.3, users must use the form:
-
-```
-	mpirun ... <mpi args> ... rocprof ... <rocprof args> ... application ... <application args>
-	
-```
-
-**NOTE**: This feature differs from ROCm v4.2 (and lower), which used "rocprof ... mpirun ... application".
-	
-This change was made to enable ROCProfiler to handle process forking better and launching via mpirun (and related) executables. 
-
-From a user perspective, this new execution mode requires:
-	
-1. Generation of trace data per MPI (or process) rank.
-	
-2. Use of a new ["merge_traces.sh" utility script](https://github.com/ROCm-Developer-Tools/rocprofiler/blob/rocm-4.3.x/bin/merge_traces.sh) to combine traces from multiple processes into a unified trace for profiling.
-	
-For example, to accomplish step #1, ROCm provides a simple bash wrapper that demonstrates how to generate a unique output directory per process:
-	
-```
-	$ cat wrapper.sh
-	#! /usr/bin/env bash
-	if [[ -n ${OMPI_COMM_WORLD_RANK+z} ]]; then
- 	  # mpich
-  	  export MPI_RANK=${OMPI_COMM_WORLD_RANK}
-	elif [[ -n ${MV2_COMM_WORLD_RANK+z} ]]; then
-  	  # ompi
-  	  export MPI_RANK=${MV2_COMM_WORLD_RANK}
-	fi
-	args="$*"
-	pid="$$"
-	outdir="rank_${pid}_${MPI_RANK}"
-	outfile="results_${pid}_${MPI_RANK}.csv"
-	eval "rocprof -d ${outdir} -o ${outdir}/${outfile} $*"
-```
-
-This script:
-	
-* Determines the global MPI rank (implemented here for OpenMPI and MPICH only)
-	
-* Determines the process id of the MPI rank
-	
-* Generates a unique output directory using the two
-
-To invoke this wrapper, use the following command:
-
-```
-	mpirun <mpi args> ./wrapper.sh --hip-trace <application> <args>
-```
-
-This generates an output directory for each used MPI rank. For example, 	
-
-```
-	$ ls -ld rank_* | awk {'print $5" "$9'}
-	4096 rank_513555_0
-	4096 rank_513556_1
-```	
-	
-Finally, these traces may be combined using the [merge traces script](https://github.com/ROCm-Developer-Tools/rocprofiler/blob/rocm-4.3.x/bin/merge_traces.sh). For example, 
-
-```
-	$  ./merge_traces.sh -h
-	Script for aggregating results from multiple rocprofiler out directries.
-	Full path: /opt/rocm/bin/merge_traces.sh
-	Usage:
-  	merge_traces.sh -o <outputdir> [<inputdir>...]
-```	
-
-Use the following input arguments to the merge_traces.sh script to control which traces are merged and where the resulting merged trace is saved.
-	
-* -o <*outputdir*> - output directory where the results are aggregated.
-	
-* <*inputdir*>... - space-separated list of rocprofiler directories. If not specified, CWD is used.
-
-For example, if an output directory named "unified" was supplied to the `merge_traces.sh` script, the file 'unified/results.json' will be generated, and the contains trace data from both MPI ranks. 
-
-Known issue for ROCProfiler
-	
-Collecting several counter collection passes (multiple "pmc:" lines in an counter input file) is not supported in a single run.  
-The workaround is to break the multiline counter input file into multiple single-line counter input files and execute runs.
-
-	
-# Known Issues in This Release
-
-The following are the known issues in this release.
-
-## Upgrade to AMD ROCm v4.3 Not Supported
-
-An upgrade from previous releases to AMD ROCm v4.2 is not supported. Complete uninstallation of previous ROCm versions is required before installing a new version of ROCm.
-	
-## _LAUNCH BOUNDS_Ignored During Kernel Launch
-
-The HIP runtime returns the hipErrorLaunchFailure error code when an application tries to launch kernel with a block size larger than the launch bounds mentioned during compile time. If no launch bounds were specified during the compile time, the default value of 1024 is assumed.  Refer to the HIP trace for more information about the failing kernel. A sample error in the trace is shown below:
- 
-Snippet of the HIP trace
-	
-```
-	:3:devprogram.cpp           :2504: 2227377746776 us: Using Code Object V4.
-	:3:hip_module.cpp           :361 : 2227377768546 us: 7670 : [7f7c6eddd180] ihipModuleLaunchKernel ( 0x0x16fe080, 2048, 1, 1, 		1024, 1, 1, 0, stream:<null>, 0x7ffded8ad260, char array:<null>, event:0, event:0, 0, 0 )
-	:1:hip_module.cpp           :254 : 2227377768572 us: Launch params (1024, 1, 1) are larger than launch bounds (64) for 		kernel _Z8MyKerneliPd
-	:3:hip_platform.cpp         :667 : 2227377768577 us: 7670 : [7f7c6eddd180] ihipLaunchKernel: Returned hipErrorLaunchFailure 		:
-	:3:hip_module.cpp           :493 : 2227377768581 us: 7670 : [7f7c6eddd180] hipLaunchKernel: Returned hipErrorLaunchFailure :
-```
-
-There is no known workaround at this time. 
-	
-## PYCACHE Folder Exists After ROCM SMI Library Uninstallation
-	
-Users may observe that the /opt/rocm-x/bin/__pycache__ folder continues to exist even after the rocm_smi_lib uninstallation.
-Workaround: Delete the /opt/rocm-x/bin/__pycache__ folder manually before uninstalling rocm_smi_lib.
-
-
-# Deploying ROCm
-
-AMD hosts both Debian and RPM repositories for the ROCm packages. 
-
-For more information on ROCM installation on all platforms, see
-
-https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation-Guide.html
-
-
-# Machine Learning and High Performance Computing Software Stack for AMD GPU
-
-For an updated version of the software stack for AMD GPU, see
-
-https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation-Guide.html#software-stack-for-amd-gpu
-
-
-
-# Hardware and Software Support
-ROCm is focused on using AMD GPUs to accelerate computational tasks such as machine learning, engineering workloads, and scientific computing.
-In order to focus our development efforts on these domains of interest, ROCm supports a targeted set of hardware configurations which are detailed further in this section.
-
-**Note:** The AMD ROCm™ open software platform is a compute stack for headless system deployments. GUI-based software applications are currently not supported.
-
-#### Supported GPUs
-Because the ROCm Platform has a focus on particular computational domains, we offer official support for a selection of AMD GPUs that are designed to offer good performance and price in these domains.
-
-**Note:** The integrated GPUs of Ryzen are not officially supported targets for ROCm.
-
-ROCm officially supports AMD GPUs that use following chips:
-
-* GFX9 GPUs
-
-  - "Vega 10" chips, such as on the AMD Radeon RX Vega 64 and Radeon Instinct MI25
-  
-  - "Vega 7nm" chips, such as on the Radeon Instinct MI50, Radeon Instinct MI60 or AMD Radeon VII, Radeon Pro VII
-
-* CDNA GPUs
-
-  - MI100 chips such as on the AMD Instinct™ MI100
-
-
-ROCm is a collection of software ranging from drivers and runtimes to libraries and developer tools.
-Some of this software may work with more GPUs than the "officially supported" list above, though AMD does not make any official claims of support for these devices on the ROCm software platform.
-
-The following list of GPUs are enabled in the ROCm software, though full support is not guaranteed:
-
-  * GFX8 GPUs
-    * "Polaris 11" chips, such as on the AMD Radeon RX 570 and Radeon Pro WX 4100
-    * "Polaris 12" chips, such as on the AMD Radeon RX 550 and Radeon RX 540
-  * GFX7 GPUs
-    * "Hawaii" chips, such as the AMD Radeon R9 390X and FirePro W9100
-
-As described in the next section, GFX8 GPUs require PCI Express 3.0 (PCIe 3.0) with support for PCIe atomics. This requires both CPU and motherboard support. GFX9 GPUs require PCIe 3.0 with support for PCIe atomics by default, but they can operate in most cases without this capability.
-
-The integrated GPUs in AMD APUs are not officially supported targets for ROCm.
-As described [below](#limited-support), "Carrizo", "Bristol Ridge", and "Raven Ridge" APUs are enabled in our upstream drivers and the ROCm OpenCL runtime.
-However, they are not enabled in the HIP runtime, and may not work due to motherboard or OEM hardware limitations.
-As such, they are not yet officially supported targets for ROCm.
-
-For a more detailed list of hardware support, please see [the following documentation](https://en.wikipedia.org/wiki/List_of_AMD_graphics_processing_units).
-
-#### Supported CPUs
-As described above, GFX8 GPUs require PCIe 3.0 with PCIe atomics in order to run ROCm.
-In particular, the CPU and every active PCIe point between the CPU and GPU require support for PCIe 3.0 and PCIe atomics.
-The CPU root must indicate PCIe AtomicOp Completion capabilities and any intermediate switch must indicate PCIe AtomicOp Routing capabilities.
-
-Current CPUs which support PCIe Gen3 + PCIe Atomics are:
-
-  * AMD Ryzen CPUs
-  * The CPUs in AMD Ryzen APUs
-  * AMD Ryzen Threadripper CPUs
-  * AMD EPYC CPUs
-  * Intel Xeon E7 v3 or newer CPUs
-  * Intel Xeon E5 v3 or newer CPUs
-  * Intel Xeon E3 v3 or newer CPUs
-  * Intel Core i7 v4, Core i5 v4, Core i3 v4 or newer CPUs (i.e. Haswell family or newer)
-  * Some Ivy Bridge-E systems
-
-Beginning with ROCm 1.8, GFX9 GPUs (such as Vega 10) no longer require PCIe atomics.
-We have similarly opened up more options for number of PCIe lanes.
-GFX9 GPUs can now be run on CPUs without PCIe atomics and on older PCIe generations, such as PCIe 2.0.
-This is not supported on GPUs below GFX9, e.g. GFX8 cards in the Fiji and Polaris families.
-
-If you are using any PCIe switches in your system, please note that PCIe Atomics are only supported on some switches, such as Broadcom PLX.
-When you install your GPUs, make sure you install them in a PCIe 3.1.0 x16, x8, x4, or x1 slot attached either directly to the CPU's Root I/O controller or via a PCIe switch directly attached to the CPU's Root I/O controller.
-
-In our experience, many issues stem from trying to use consumer motherboards which provide physical x16 connectors that are electrically connected as e.g. PCIe 2.0 x4, PCIe slots connected via the Southbridge PCIe I/O controller, or PCIe slots connected through a PCIe switch that does
-not support PCIe atomics.
-
-If you attempt to run ROCm on a system without proper PCIe atomic support, you may see an error in the kernel log (`dmesg`):
-```
-kfd: skipped device 1002:7300, PCI rejects atomics
-```
-
-Experimental support for our Hawaii (GFX7) GPUs (Radeon R9 290, R9 390, FirePro W9100, S9150, S9170)
-does not require or take advantage of PCIe Atomics. However, we still recommend that you use a CPU
-from the list provided above for compatibility purposes.
-
-#### Not supported or limited support under ROCm
-
-##### Limited support
-
-* ROCm 4.x should support PCIe 2.0 enabled CPUs such as the AMD Opteron, Phenom, Phenom II, Athlon, Athlon X2, Athlon II and older Intel Xeon and Intel Core Architecture and Pentium CPUs. However, we have done very limited testing on these configurations, since our test farm has been catering to CPUs listed above. This is where we need community support. _If you find problems on such setups, please report these issues_.
-* Thunderbolt 1, 2, and 3 enabled breakout boxes should now be able to work with ROCm. Thunderbolt 1 and 2 are PCIe 2.0 based, and thus are only supported with GPUs that do not require PCIe 3.1.0 atomics (e.g. Vega 10). However, we have done no testing on this configuration and would need community support due to limited access to this type of equipment.
-* AMD "Carrizo" and "Bristol Ridge" APUs are enabled to run OpenCL, but do not yet support HIP or our libraries built on top of these compilers and runtimes.
-  * As of ROCm 2.1, "Carrizo" and "Bristol Ridge" require the use of upstream kernel drivers.
-  * In addition, various "Carrizo" and "Bristol Ridge" platforms may not work due to OEM and ODM choices when it comes to key configurations parameters such as inclusion of the required CRAT tables and IOMMU configuration parameters in the system BIOS.
-  * Before purchasing such a system for ROCm, please verify that the BIOS provides an option for enabling IOMMUv2 and that the system BIOS properly exposes the correct CRAT table. Inquire with your vendor about the latter.
-* AMD "Raven Ridge" APUs are enabled to run OpenCL, but do not yet support HIP or our libraries built on top of these compilers and runtimes.
-  * As of ROCm 2.1, "Raven Ridge" requires the use of upstream kernel drivers.
-  * In addition, various "Raven Ridge" platforms may not work due to OEM and ODM choices when it comes to key configurations parameters such as inclusion of the required CRAT tables and IOMMU configuration parameters in the system BIOS.
-  * Before purchasing such a system for ROCm, please verify that the BIOS provides an option for enabling IOMMUv2 and that the system BIOS properly exposes the correct CRAT table. Inquire with your vendor about the latter.
-
-##### Not supported
-
-* "Tonga", "Iceland", "Vega M", and "Vega 12" GPUs are not supported.
-* We do not support GFX8-class GPUs (Fiji, Polaris, etc.) on CPUs that do not have PCIe 3.0 with PCIe atomics.
-  * As such, we do not support AMD Carrizo and Kaveri APUs as hosts for such GPUs.
-  * Thunderbolt 1 and 2 enabled GPUs are not supported by GFX8 GPUs on ROCm. Thunderbolt 1 & 2 are based on PCIe 2.0.
-
-In the default ROCm configuration, GFX8 and GFX9 GPUs require PCI Express 3.0 with PCIe atomics. The ROCm platform leverages these advanced capabilities to allow features such as user-level submission of work from the host to the GPU. This includes PCIe atomic Fetch and Add, Compare and Swap, Unconditional Swap, and AtomicOp Completion.
-
-#### ROCm support in upstream Linux kernels
-
-As of ROCm 1.9.0, the ROCm user-level software is compatible with the AMD drivers in certain upstream Linux kernels.
-As such, users have the option of either using the ROCK kernel driver that are part of AMD's ROCm repositories or using the upstream driver and only installing ROCm user-level utilities from AMD's ROCm repositories.
-
-These releases of the upstream Linux kernel support the following GPUs in ROCm:
- * 4.17: Fiji, Polaris 10, Polaris 11
- * 4.18: Fiji, Polaris 10, Polaris 11, Vega10
- * 4.20: Fiji, Polaris 10, Polaris 11, Vega10, Vega 7nm
-
-The upstream driver may be useful for running ROCm software on systems that are not compatible with the kernel driver available in AMD's repositories.
-For users that have the option of using either AMD's or the upstreamed driver, there are various tradeoffs to take into consideration:
-
-|   | Using AMD's `rock-dkms` package | Using the upstream kernel driver |
-| ---- | ------------------------------------------------------------| ----- |
-| Pros | More GPU features, and they are enabled earlier | Includes the latest Linux kernel features |
-|      | Tested by AMD on supported distributions | May work on other distributions and with custom kernels |
-|      | Supported GPUs enabled regardless of kernel version | |
-|      | Includes the latest GPU firmware | |
-| Cons | May not work on all Linux distributions or versions | Features and hardware support varies depending on kernel version |
-|      | Not currently supported on kernels newer than 5.4 | Limits GPU's usage of system memory to 3/8 of system memory (before 5.6). For 5.6 and beyond, both DKMS and upstream kernels allow use of 15/16 of system memory. |
-|      |   | IPC and RDMA capabilities are not yet enabled |
-|      |   | Not tested by AMD to the same level as `rock-dkms` package |
-|      |   | Does not include most up-to-date firmware |
-
-
-# Disclaimer
-
-AMD®, the AMD Arrow logo, AMD Instinct™, Radeon™, ROCm® and combinations thereof are trademarks of Advanced Micro Devices, Inc.
-
-Linux® is the registered trademark of Linus Torvalds in the U.S. and other countries.
-
-PCIe® is a registered trademark of PCI-SIG Corporation. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.  
-
-Google®  is a registered trademark of Google LLC.
-
-Ubuntu and the Ubuntu logo are registered trademarks of Canonical Ltd.
-
-Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
+## Older ROCm Releases
 
+For release information for older ROCm releases, refer to
+[`CHANGELOG`](./CHANGELOG.md).

RELEASE.md

@@ -0,0 +1,483 @@
+# Release Notes
+<!-- Do not edit this file! This file is autogenerated with -->
+<!--   tools/autotag/tag_script.py                          -->
+
+<!-- Disable lints since this is an auto-generated file.    -->
+<!-- markdownlint-disable blanks-around-headers             -->
+<!-- markdownlint-disable no-duplicate-header               -->
+<!-- markdownlint-disable no-blanks-blockquote              -->
+<!-- markdownlint-disable ul-indent                         -->
+<!-- markdownlint-disable no-trailing-spaces                -->
+
+<!-- spellcheck-disable -->
+
+The release notes for the ROCm platform.
+
+-------------------
+
+## ROCm 5.7.0
+<!-- markdownlint-disable first-line-h1 -->
+<!-- markdownlint-disable no-duplicate-header -->
+
+### Release Highlights for ROCm v5.7
+
+ROCm 5.7.0 includes many new features. These include: a new library (hipTensor), and optimizations for rocRAND and MIVisionX. Address sanitizer for host and device code (GPU) is now available as a beta. Note that ROCm 5.7.0 is EOS for MI50. 5.7 versions of ROCm are the last major release in the ROCm 5 series. This release is Linux-only.
+
+Important: The next major ROCm release (ROCm 6.0) will not be backward compatible with the ROCm 5 series. Changes will include: splitting LLVM packages into more manageable sizes, changes to the HIP runtime API, splitting rocRAND and hipRAND into separate packages, and reorganizing our file structure.
+
+#### AMD Instinct™ MI50 End of Support Notice
+
+AMD Instinct MI50, Radeon Pro VII, and Radeon VII products (collectively gfx906 GPUs) will enter maintenance mode starting Q3 2023.
+
+As outlined in [5.6.0](https://rocm.docs.amd.com/en/docs-5.6.0/release.html), ROCm 5.7 will be the final release for gfx906 GPUs to be in a fully supported state.
+
+- ROCm 6.0 release will show MI50s as "under maintenance" mode for [Linux](./about/release/linux_support) and [Windows](./about/release/windows_support)
+
+- No new features and performance optimizations will be supported for the gfx906 GPUs beyond this major release (ROCm 5.7).
+
+- Bug fixes / critical security patches will continue to be supported for the gfx906 GPUs till Q2 2024 (EOM (End of Maintenance) will be aligned with the closest ROCm release).
+
+- Bug fixes during the maintenance will be made to the next ROCm point release.
+
+- Bug fixes will not be backported to older ROCm releases for gfx906.
+
+- Distro / Operating system updates will continue as per the ROCm release cadence for gfx906 GPUs till EOM.
+
+#### Feature Updates
+
+##### Non-hostcall HIP Printf
+
+**Current behavior**
+
+The current version of HIP printf relies on hostcalls, which, in turn, rely on PCIe atomics. However, PCle atomics are unavailable in some environments, and, as a result, HIP-printf does not work in those environments. Users may see the following error from runtime (with AMD_LOG_LEVEL 1 and above), 
+
+```
+    Pcie atomics not enabled, hostcall not supported
+```
+**Workaround**
+
+The ROCm 5.7 release introduces an alternative to the current hostcall-based implementation that leverages an older OpenCL-based printf scheme, which does not rely on hostcalls/PCIe atomics. 
+Note: This option is less robust than hostcall-based implementation and is intended to be a workaround when hostcalls do not work.	
+
+The printf variant is now controlled via a new compiler option -mprintf-kind=<value>. This is supported only for HIP programs and takes the following values,
+
+- “hostcall” – This currently available implementation relies on hostcalls, which require the system to support PCIe atomics. It is the default scheme.
+
+- “buffered” – This implementation leverages the older printf scheme used by OpenCL; it relies on a memory buffer where printf arguments are stored during the kernel execution, and then the runtime handles the actual printing once the kernel finishes execution. 
+
+**NOTE**: With the new workaround,
+
+- The printf buffer is fixed size and non-circular.  After the buffer is filled, calls to printf will not result in additional output.
+
+- The printf call returns either 0 (on success) or -1 (on failure, due to full buffer), unlike the hostcall scheme that returns the number of characters printed.
+
+##### Beta Release of LLVM Address Sanitizer (ASAN) with the GPU
+
+The ROCm v5.7 release introduces the beta release of LLVM Address Sanitizer (ASAN) with the GPU. The LLVM Address Sanitizer provides a process that allows developers to detect runtime addressing errors in applications and libraries. The detection is achieved using a combination of compiler-added instrumentation and runtime techniques, including function interception and replacement.
+Until now, the LLVM Address Sanitizer process was only available for traditional purely CPU applications. However, ROCm has extended this mechanism to additionally allow the detection of some addressing errors on the GPU in heterogeneous applications. Ideally, developers should treat heterogeneous HIP and OpenMP applications like pure CPU applications. However, this simplicity has not been achieved yet.
+
+Refer to the documentation on LLVM Address Sanitizer with the GPU at [LLVM Address Sanitizer User Guide](understand/using_gpu_sanitizer.md).
+
+**Note**: The beta release of LLVM Address Sanitizer for ROCm is currently tested and validated on Ubuntu 20.04.
+
+#### Fixed Defects
+
+The following defects are fixed in ROCm v5.7,
+
+- Test hangs observed in HMM RCCL
+
+- NoGpuTst test of Catch2 fails with Docker
+
+- Failures observed with non-HMM HIP directed catch2 tests with XNACK+
+
+- Multiple test failures and test hangs observed in hip-directed catch2 tests with xnack+
+
+#### HIP 5.7.0
+
+##### Optimizations
+
+##### Added
+
+- Added `meta_group_size`/`rank` for getting the number of tiles and rank of a tile in the partition
+
+- Added new APIs supporting Windows only, under development on Linux
+
+    - `hipMallocMipmappedArray` for allocating a mipmapped array on the device
+
+    - `hipFreeMipmappedArray` for freeing a mipmapped array on the device
+
+    - `hipGetMipmappedArrayLevel` for getting a mipmap level of a HIP mipmapped array
+
+    - `hipMipmappedArrayCreate` for creating a mipmapped array
+
+    - `hipMipmappedArrayDestroy` for destroy a mipmapped array
+
+    - `hipMipmappedArrayGetLevel` for getting a mipmapped array on a mipmapped level
+
+##### Changed
+
+##### Fixed
+
+##### Known Issues
+
+- HIP memory type enum values currently don't support equivalent value to `cudaMemoryTypeUnregistered`, due to HIP functionality backward compatibility.
+- HIP API `hipPointerGetAttributes` could return invalid value in case the input memory pointer was not allocated through any HIP API on device or host.
+
+##### Upcoming changes for HIP in ROCm 6.0 release
+
+- Removal of gcnarch from hipDeviceProp_t structure
+
+- Addition of new fields in hipDeviceProp_t structure
+
+    - maxTexture1D
+
+    - maxTexture2D
+
+    - maxTexture1DLayered
+
+    - maxTexture2DLayered
+    
+    - sharedMemPerMultiprocessor
+    
+    - deviceOverlap
+    
+    - asyncEngineCount
+    
+    - surfaceAlignment
+    
+    - unifiedAddressing
+    
+    - computePreemptionSupported
+    
+    - hostRegisterSupported
+    
+    - uuid
+    
+- Removal of deprecated code -hip-hcc codes from hip code tree
+
+- Correct hipArray usage in HIP APIs such as hipMemcpyAtoH and hipMemcpyHtoA
+
+- HIPMEMCPY_3D fields correction to avoid truncation of "size_t" to "unsigned int" inside hipMemcpy3D()
+
+- Renaming of 'memoryType' in hipPointerAttribute_t structure to 'type'
+
+- Correct hipGetLastError to return the last error instead of last API call's return code
+
+- Update hipExternalSemaphoreHandleDesc to add "unsigned int reserved[16]"
+
+- Correct handling of flag values in hipIpcOpenMemHandle for hipIpcMemLazyEnablePeerAccess
+
+- Remove hiparray* and make it opaque with hipArray_t
+
+### Library Changes in ROCM 5.7.0
+
+| Library | Version |
+|---------|---------|
+| hipBLAS |  ⇒ [1.1.0](https://github.com/ROCmSoftwarePlatform/hipBLAS/releases/tag/rocm-5.7.0) |
+| hipCUB |  ⇒ [2.13.1](https://github.com/ROCmSoftwarePlatform/hipCUB/releases/tag/rocm-5.7.0) |
+| hipFFT |  ⇒ [1.0.12](https://github.com/ROCmSoftwarePlatform/hipFFT/releases/tag/rocm-5.7.0) |
+| hipSOLVER |  ⇒ [1.8.1](https://github.com/ROCmSoftwarePlatform/hipSOLVER/releases/tag/rocm-5.7.0) |
+| hipSPARSE |  ⇒ [2.3.8](https://github.com/ROCmSoftwarePlatform/hipSPARSE/releases/tag/rocm-5.7.0) |
+| MIOpen |  ⇒ [2.19.0](https://github.com/ROCmSoftwarePlatform/MIOpen/releases/tag/rocm-5.7.0) |
+| rccl |  ⇒ [2.17.1-1](https://github.com/ROCmSoftwarePlatform/rccl/releases/tag/rocm-5.7.0) |
+| rocALUTION |  ⇒ [2.1.11](https://github.com/ROCmSoftwarePlatform/rocALUTION/releases/tag/rocm-5.7.0) |
+| rocBLAS |  ⇒ [3.1.0](https://github.com/ROCmSoftwarePlatform/rocBLAS/releases/tag/rocm-5.7.0) |
+| rocFFT |  ⇒ [1.0.24](https://github.com/ROCmSoftwarePlatform/rocFFT/releases/tag/rocm-5.7.0) |
+| rocm-cmake |  ⇒ [0.10.0](https://github.com/RadeonOpenCompute/rocm-cmake/releases/tag/rocm-5.7.0) |
+| rocPRIM |  ⇒ [2.13.1](https://github.com/ROCmSoftwarePlatform/rocPRIM/releases/tag/rocm-5.7.0) |
+| rocRAND |  ⇒ [2.10.17](https://github.com/ROCmSoftwarePlatform/rocRAND/releases/tag/rocm-5.7.0) |
+| rocSOLVER |  ⇒ [3.23.0](https://github.com/ROCmSoftwarePlatform/rocSOLVER/releases/tag/rocm-5.7.0) |
+| rocSPARSE |  ⇒ [2.5.4](https://github.com/ROCmSoftwarePlatform/rocSPARSE/releases/tag/rocm-5.7.0) |
+| rocThrust |  ⇒ [2.18.0](https://github.com/ROCmSoftwarePlatform/rocThrust/releases/tag/rocm-5.7.0) |
+| rocWMMA |  ⇒ [1.2.0](https://github.com/ROCmSoftwarePlatform/rocWMMA/releases/tag/rocm-5.7.0) |
+| Tensile |  ⇒ [4.38.0](https://github.com/ROCmSoftwarePlatform/Tensile/releases/tag/rocm-5.7.0) |
+
+#### hipBLAS 1.1.0
+
+hipBLAS 1.1.0 for ROCm 5.7.0
+
+##### Changed
+
+- updated documentation requirements
+
+##### Dependencies
+
+- dependency rocSOLVER now depends on rocSPARSE
+
+#### hipCUB 2.13.1
+
+hipCUB 2.13.1 for ROCm 5.7.0
+
+##### Changed
+
+- CUB backend references CUB and Thrust version 2.0.1.
+- Fixed `DeviceSegmentedReduce::ArgMin` and `DeviceSegmentedReduce::ArgMax` by returning the segment-relative index instead of the absolute one.
+- Fixed `DeviceSegmentedReduce::ArgMin` for inputs where the segment minimum is smaller than the value returned for empty segments. An equivalent fix is applied to `DeviceSegmentedReduce::ArgMax`.
+
+##### Known Issues
+
+- `debug_synchronous` no longer works on CUDA platform. `CUB_DEBUG_SYNC` should be used to enable those checks.
+- `DeviceReduce::Sum` does not compile on CUDA platform for mixed extended-floating-point/floating-point InputT and OutputT types.
+- `DeviceHistogram::HistogramEven` fails on CUDA platform for `[LevelT, SampleIteratorT] = [int, int]`.
+- `DeviceHistogram::MultiHistogramEven` fails on CUDA platform for `[LevelT, SampleIteratorT] = [int, int/unsigned short/float/double]` and `[LevelT, SampleIteratorT] = [float, double]`.
+
+#### hipFFT 1.0.12
+
+hipFFT 1.0.12 for ROCm 5.7.0
+
+##### Added
+
+- Implemented the hipfftXtMakePlanMany, hipfftXtGetSizeMany, hipfftXtExec APIs, to allow requesting half-precision transforms.
+
+##### Changed
+
+- Added --precision argument to benchmark/test clients.  --double is still accepted but is deprecated as a method to request a double-precision transform.
+
+#### hipSOLVER 1.8.1
+
+hipSOLVER 1.8.1 for ROCm 5.7.0
+
+##### Changed
+
+- Changed hipsolver-test sparse input data search paths to be relative to the test executable
+
+#### hipSPARSE 2.3.8
+
+hipSPARSE 2.3.8 for ROCm 5.7.0
+
+##### Improved
+
+- Fix compilation failures when using cusparse 12.1.0 backend
+- Fix compilation failures when using cusparse 12.0.0 backend
+- Fix compilation failures when using cusparse 10.1 (non-update versions) as backend
+- Minor improvements
+
+#### MIOpen 2.19.0
+
+MIOpen 2.19.0 for ROCm 5.7.0
+
+##### Added
+
+- ROCm 5.5 support for gfx1101 (Navi32)
+
+##### Changed
+
+- Tuning results for MLIR on ROCm 5.5
+- Bumping MLIR commit to 5.5.0 release tag
+
+##### Fixed
+
+- Fix 3d convolution Host API bug
+- [HOTFIX][MI200][FP16] Disabled ConvHipImplicitGemmBwdXdlops when FP16_ALT is required.
+
+#### RCCL 2.17.1-1
+
+RCCL 2.17.1-1 for ROCm 5.7.0
+
+##### Changed
+
+- Compatibility with NCCL 2.17.1-1
+- Performance tuning for some collective operations
+
+##### Added
+
+- Minor improvements to MSCCL codepath
+- NCCL_NCHANNELS_PER_PEER support
+- Improved compilation performance
+- Support for gfx94x
+
+##### Fixed
+
+- Potential race-condition during ncclSocketClose()
+
+#### rocALUTION 2.1.11
+
+rocALUTION 2.1.11 for ROCm 5.7.0
+
+##### Added
+
+- Added support for gfx940, gfx941 and gfx942
+
+##### Improved
+
+- Fixed OpenMP runtime issue with Windows toolchain
+
+#### rocBLAS 3.1.0
+
+rocBLAS 3.1.0 for ROCm 5.7.0
+
+##### Added
+
+- yaml lock step argument scanning for rocblas-bench and rocblas-test clients. See Programmers Guide for details.
+- rocblas-gemm-tune is used to find the best performing GEMM kernel for each of a given set of GEMM problems.
+
+##### Fixed
+
+- make offset calculations for rocBLAS functions 64 bit safe.  Fixes for very large leading dimensions or increments potentially causing overflow:
+  - Level 1: axpy, copy, rot, rotm, scal, swap, asum, dot, iamax, iamin, nrm2
+  - Level 2: gemv, symv, hemv, trmv, ger, syr, her, syr2, her2, trsv
+  - Level 3: gemm, symm, hemm, trmm, syrk, herk, syr2k, her2k, syrkx, herkx, trsm, trtri, dgmm, geam
+  - General: set_vector, get_vector, set_matrix, get_matrix
+  - Related fixes: internal scalar loads with &gt; 32bit offsets
+  - fix in-place functionality for all trtri sizes
+
+##### Changed
+
+- dot when using rocblas_pointer_mode_host is now synchronous to match legacy BLAS as it stores results in host memory
+- enhanced reporting of installation issues caused by runtime libraries (Tensile)
+- standardized internal rocblas C++ interface across most functions
+
+##### Deprecated
+
+- Removal of __STDC_WANT_IEC_60559_TYPES_EXT__ define in future release
+
+##### Dependencies
+
+- optional use of AOCL BLIS 4.0 on Linux for clients
+- optional build tool only dependency on python psutil
+
+#### rocFFT 1.0.24
+
+rocFFT 1.0.24 for ROCm 5.7.0
+
+##### Optimizations
+
+- Improved performance of complex forward/inverse 1D FFTs (2049 &lt;= length &lt;= 131071) that use Bluestein&#39;s algorithm.
+
+##### Added
+
+- Implemented a solution map version converter and finish the first conversion from ver.0 to ver.1. Where version 1 removes some incorrect kernels (sbrc/sbcr using half_lds)
+
+##### Changed
+
+- Moved rocfft_rtc_helper executable to lib/rocFFT directory on Linux.
+- Moved library kernel cache to lib/rocFFT directory.
+
+#### rocm-cmake 0.10.0
+
+rocm-cmake 0.10.0 for ROCm 5.7.0
+
+##### Added
+
+- Added ROCMTest module
+- ROCMCreatePackage: Added support for ASAN packages
+
+#### rocPRIM 2.13.1
+
+rocPRIM 2.13.1 for ROCm 5.7.0
+
+##### Changed
+
+- Deprecated configuration `radix_sort_config` for device-level radix sort as it no longer matches the algorithm&#39;s parameters. New configuration `radix_sort_config_v2` is preferred instead.
+- Removed erroneous implementation of device-level `inclusive_scan` and `exclusive_scan`. The prior default implementation using lookback-scan now is the only available implementation.
+- The benchmark metric indicating the bytes processed for `exclusive_scan_by_key` and `inclusive_scan_by_key` has been changed to incorporate the key type. Furthermore, the benchmark log has been changed such that these algorithms are reported as `scan` and `scan_by_key` instead of `scan_exclusive` and `scan_inclusive`.
+- Deprecated configurations `scan_config` and `scan_by_key_config` for device-level scans, as they no longer match the algorithm&#39;s parameters. New configurations `scan_config_v2` and `scan_by_key_config_v2` are preferred instead.
+
+##### Fixed
+
+- Fixed build issue caused by missing header in `thread/thread_search.hpp`.
+
+#### rocRAND 2.10.17
+
+rocRAND 2.10.17 for ROCm 5.7.0
+
+##### Added
+
+- MT19937 pseudo random number generator based on M. Matsumoto and T. Nishimura, 1998, Mersenne Twister: A 623-dimensionally equidistributed uniform pseudorandom number generator.
+- New benchmark for the device API using Google Benchmark, `benchmark_rocrand_device_api`, replacing `benchmark_rocrand_kernel`. `benchmark_rocrand_kernel` is deprecated and will be removed in a future version. Likewise, `benchmark_curand_host_api` is added to replace `benchmark_curand_generate` and `benchmark_curand_device_api` is added to replace `benchmark_curand_kernel`.
+- experimental HIP-CPU feature
+- ThreeFry pseudorandom number generator based on Salmon et al., 2011, &#34;Parallel random numbers: as easy as 1, 2, 3&#34;.
+
+##### Changed
+
+- Python 2.7 is no longer officially supported.
+
+#### rocSOLVER 3.23.0
+
+rocSOLVER 3.23.0 for ROCm 5.7.0
+
+##### Added
+
+- LU factorization without pivoting for block tridiagonal matrices:
+    - GEBLTTRF_NPVT now supports interleaved\_batched format
+- Linear system solver without pivoting for block tridiagonal matrices:
+    - GEBLTTRS_NPVT now supports interleaved\_batched format
+
+##### Fixed
+
+- Fixed stack overflow in sparse tests on Windows
+
+##### Changed
+
+- Changed rocsolver-test sparse input data search paths to be relative to the test executable
+- Changed build scripts to default to compressed debug symbols in Debug builds
+
+#### rocSPARSE 2.5.4
+
+rocSPARSE 2.5.4 for ROCm 5.7.0
+
+##### Added
+
+- Added more mixed precisions for SpMV, (matrix: float, vectors: double, calculation: double) and (matrix: rocsparse_float_complex, vectors: rocsparse_double_complex, calculation: rocsparse_double_complex)
+- Added support for gfx940, gfx941 and gfx942
+
+##### Improved
+
+- Fixed a bug in csrsm and bsrsm
+
+##### Known Issues
+
+In csritlu0, the algorithm rocsparse_itilu0_alg_sync_split_fusion has some accuracy issues to investigate with XNACK enabled. The fallback is rocsparse_itilu0_alg_sync_split.
+
+#### rocThrust 2.18.0
+
+rocThrust 2.18.0 for ROCm 5.7.0
+
+##### Fixed 
+
+- `lower_bound`, `upper_bound`, and `binary_search` failed to compile for certain types.
+- Fixed issue where `transform_iterator` would not compile with `__device__`-only operators.
+
+##### Changed
+
+- Updated `docs` directory structure to match the standard of [rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core).
+- Removed references to and workarounds for deprecated hcc
+
+#### rocWMMA 1.2.0
+
+rocWMMA 1.2.0 for ROCm 5.7.0
+
+##### Changed
+
+- Fixed a bug with synchronization
+- Updated rocWMMA cmake versioning
+
+#### Tensile 4.38.0
+
+Tensile 4.38.0 for ROCm 5.7.0
+
+##### Added
+
+- Added support for FP16 Alt Round Near Zero Mode (this feature allows the generation of alternate kernels with intermediate rounding instead of truncation)
+- Added user-driven solution selection feature
+
+##### Optimizations
+
+- Enabled LocalSplitU with MFMA for I8 data type
+- Optimized K mask code in mfmaIter
+- Enabled TailLoop code in NoLoadLoop to prefetch global/local read
+- Enabled DirectToVgpr in TailLoop for NN, TN, and TT matrix orientations
+- Optimized DirectToLds test cases to reduce the test duration
+
+##### Changed
+
+- Removed DGEMM NT custom kernels and related test cases
+- Changed noTailLoop logic to apply noTailLoop only for NT
+- Changed the range of AssertFree0ElementMultiple and Free1
+- Unified aStr, bStr generation code in mfmaIter
+
+##### Fixed
+
+- Fixed LocalSplitU mismatch issue for SGEMM
+- Fixed BufferStore=0 and Ldc != Ldd case
+- Fixed mismatch issue with TailLoop + MatrixInstB &gt; 1

default.xml

@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <manifest>
     <remote name="roc-github"
-fetch="http://github.com/RadeonOpenCompute/" />
+fetch="https://github.com/RadeonOpenCompute/" />
     <remote name="rocm-devtools"
 fetch="https://github.com/ROCm-Developer-Tools/" />
     <remote name="rocm-swplat"
@@ -12,7 +12,7 @@ fetch="https://github.com/GPUOpen-ProfessionalCompute-Libraries/" />
 fetch="https://github.com/GPUOpen-Tools/" />
     <remote name="KhronosGroup"
 fetch="https://github.com/KhronosGroup/" />
-    <default revision="refs/tags/rocm-4.3.1"
+    <default revision="refs/tags/rocm-5.7.0"
      remote="roc-github"
      sync-c="true"
      sync-j="4" />
@@ -20,50 +20,55 @@ fetch="https://github.com/KhronosGroup/" />
     <project name="ROCK-Kernel-Driver" />
     <project name="ROCT-Thunk-Interface" />
     <project name="ROCR-Runtime" />
+    <project name="amdsmi" />
     <project name="rocm_smi_lib" />
+    <project name="rocm-core" />
     <project name="rocm-cmake" />
     <project name="rocminfo" />
+    <project name="rocm_bandwidth_test" />
     <project name="rocprofiler" remote="rocm-devtools" />
     <project name="roctracer" remote="rocm-devtools" />
-    <project name="ROCm-OpenCL-Runtime" />
     <project path="ROCm-OpenCL-Runtime/api/opencl/khronos/icd" name="OpenCL-ICD-Loader" remote="KhronosGroup" revision="6c03f8b58fafd9dd693eaac826749a5cfad515f8" />
     <project name="clang-ocl" />
+    <project name="rdc" />
 <!--HIP Projects-->
     <project name="HIP" remote="rocm-devtools" />
     <project name="HIP-Examples" remote="rocm-devtools" />
-    <project name="ROCclr" remote="rocm-devtools" />
+    <project name="clr" remote="rocm-devtools" />
     <project name="HIPIFY" remote="rocm-devtools" />
+    <project name="HIPCC" remote="rocm-devtools" />
 <!-- The following projects are all associated with the AMDGPU LLVM compiler -->
     <project name="llvm-project" />
     <project name="ROCm-Device-Libs" />
-    <project name="atmi" />
     <project name="ROCm-CompilerSupport" />
-    <project name="rocr_debug_agent" remote="rocm-devtools" />
-    <project name="rocm_bandwidth_test" />
     <project name="half" remote="rocm-swplat" revision="37742ce15b76b44e4b271c1e66d13d2fa7bd003e" />
-    <project name="RCP" remote="gpuopen-tools" revision="3a49405a1500067c49d181844ec90aea606055bb" />
 <!-- gdb projects -->
     <project name="ROCgdb" remote="rocm-devtools" />
     <project name="ROCdbgapi" remote="rocm-devtools" />
+    <project name="rocr_debug_agent" remote="rocm-devtools" />
 <!-- ROCm Libraries -->
-    <project name="rdc" remote="roc-github" />
-    <project name="rocBLAS" remote="rocm-swplat" />
-    <project name="Tensile" remote="rocm-swplat" />
-    <project name="hipBLAS" remote="rocm-swplat" />
-    <project name="rocFFT" remote="rocm-swplat" />
-    <project name="hipFFT" remote="rocm-swplat" />
-    <project name="rocRAND" remote="rocm-swplat" />
-    <project name="rocSPARSE" remote="rocm-swplat" />
-    <project name="rocSOLVER" remote="rocm-swplat" />
-    <project name="hipSPARSE" remote="rocm-swplat" />
-    <project name="rocALUTION" remote="rocm-swplat" />
-    <project name="MIOpenGEMM" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocBLAS" remote="rocm-swplat" />
+    <project groups="mathlibs" name="Tensile" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipTensor" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipBLAS" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocFFT" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipFFT" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocRAND" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocSPARSE" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocSOLVER" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSOLVER" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipSPARSE" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocALUTION" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocThrust" remote="rocm-swplat" />
+    <project groups="mathlibs" name="hipCUB" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocPRIM" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rocWMMA" remote="rocm-swplat" />
+    <project groups="mathlibs" name="rccl" remote="rocm-swplat" />
+    <project name="rocMLIR" remote="rocm-swplat" />
     <project name="MIOpen" remote="rocm-swplat" />
-    <project name="rccl" remote="rocm-swplat" />
+    <project name="composable_kernel" remote="rocm-swplat" />
     <project name="MIVisionX" remote="gpuopen-libs" />
-    <project name="rocThrust" remote="rocm-swplat" />
-    <project name="hipCUB" remote="rocm-swplat" />
-    <project name="rocPRIM" remote="rocm-swplat" />
+    <project name="rpp" remote="gpuopen-libs" />
     <project name="hipfort" remote="rocm-swplat" />
     <project name="AMDMIGraphX" remote="rocm-swplat" />
     <project name="ROCmValidationSuite" remote="rocm-devtools" />

docs/404.md

@@ -0,0 +1,3 @@
+# 404 - Page Not Found
+
+Return [home](./index) or use the sidebar navigation to get back on track.

docs/about.md

@@ -0,0 +1,74 @@
+# About ROCm Documentation
+
+ROCm documentation is made available under open source [licenses](licensing.md).
+Documentation is built using open source toolchains. Contributions to our
+documentation is encouraged and welcome. As a contributor, please familiarize
+yourself with our documentation toolchain.
+
+## `rocm-docs-core`
+
+[rocm-docs-core](https://github.com/RadeonOpenCompute/rocm-docs-core) is an AMD-maintained
+project that applies customization for our documentation. This
+project is the tool most ROCm repositories use as part of the documentation
+build. It is also available as a [pip package on PyPI](https://pypi.org/project/rocm-docs-core/).
+
+See the user and developer guides for rocm-docs-core at {doc}`rocm-docs-core documentation <rocm-docs-core:index>`.
+
+## Sphinx
+
+[Sphinx](https://www.sphinx-doc.org/en/master/) is a documentation generator
+originally used for Python. It is now widely used in the Open Source community.
+Originally, Sphinx supported reStructuredText (RST) based documentation, but
+Markdown support is now available.
+ROCm documentation plans to default to Markdown for new projects.
+Existing projects using RST are under no obligation to convert to Markdown. New
+projects that believe Markdown is not suitable should contact the documentation
+team prior to selecting RST.
+
+## Read the Docs
+
+[Read the Docs](https://docs.readthedocs.io/en/stable/) is the service that builds
+and hosts the HTML documentation generated using Sphinx to our end users.
+
+## Doxygen
+
+[Doxygen](https://www.doxygen.nl/) is a documentation generator that extracts
+information from inline code.
+ROCm projects typically use Doxygen for public API documentation unless the
+upstream project uses a different tool.
+
+### Breathe
+
+[Breathe](https://www.breathe-doc.org/) is a Sphinx plugin to integrate Doxygen
+content.
+
+### MyST
+
+[Markedly Structured Text (MyST)](https://myst-tools.org/docs/spec) is an extended
+flavor of Markdown ([CommonMark](https://commonmark.org/)) influenced by reStructuredText (RST) and Sphinx.
+It is integrated into ROCm documentation by the Sphinx extension [`myst-parser`](https://myst-parser.readthedocs.io/en/latest/).
+A cheat sheet that showcases how to use the MyST syntax is available over at
+the [Jupyter reference](https://jupyterbook.org/en/stable/reference/cheatsheet.html).
+
+### Sphinx External TOC
+
+[Sphinx External Table of Contents (TOC)](https://sphinx-external-toc.readthedocs.io/en/latest/intro.html)
+is a Sphinx extension used for ROCm documentation navigation. This tool generates a navigation menu on the left
+based on a YAML file that specifies the table of contents.
+It was selected due to its flexibility that allows scripts to operate on the
+YAML file. Please transition to this file for the project's navigation. You can
+see the `_toc.yml.in` file in this repository in the `docs/sphinx` folder for an
+example.
+
+### Sphinx Book Theme
+
+[Sphinx Book Theme](https://sphinx-book-theme.readthedocs.io/en/latest/) is a Sphinx theme
+that defines the base appearance for ROCm documentation.
+ROCm documentation applies some customization,
+such as a custom header and footer on top of the Sphinx Book Theme.
+
+### Sphinx Design
+
+[Sphinx Design](https://sphinx-design.readthedocs.io/en/latest/index.html) is a Sphinx extension that adds design
+functionality.
+ROCm documentation uses Sphinx Design for grids, cards, and synchronized tabs.

docs/about/licensing.md

@@ -0,0 +1,125 @@
+# ROCm licensing terms
+
+ROCm™ is released by Advanced Micro Devices, Inc. and is licensed per component separately.
+The following table is a list of ROCm components with links to their respective license
+terms. These components may include third party components subject to
+additional licenses. Please review individual repositories for more information.
+The table shows ROCm components, license name, and link to the license terms.
+
+<!-- spellcheck-disable -->
+| Component | License |
+|:------------------------------------------------------------------------------------------------:|:--------------------------------------------------------------------------------------------------------------------------:|
+| [AMDMIGraphX](https://github.com/ROCmSoftwarePlatform/AMDMIGraphX/) | [MIT](https://github.com/ROCmSoftwarePlatform/AMDMIGraphX/blob/develop/LICENSE) |
+| [HIPCC](https://github.com/ROCm-Developer-Tools/HIPCC/blob/develop/LICENSE.txt) | [MIT](https://github.com/ROCm-Developer-Tools/HIPCC/blob/develop/LICENSE.txt) |
+| [HIPIFY](https://github.com/ROCm-Developer-Tools/HIPIFY/) | [MIT](https://github.com/ROCm-Developer-Tools/HIPIFY/blob/amd-staging/LICENSE.txt) |
+| [HIP](https://github.com/ROCm-Developer-Tools/HIP/) | [MIT](https://github.com/ROCm-Developer-Tools/HIP/blob/develop/LICENSE.txt) |
+| [MIOpenGEMM](https://github.com/ROCmSoftwarePlatform/MIOpenGEMM/) | [MIT](https://github.com/ROCmSoftwarePlatform/MIOpenGEMM/blob/master/LICENSE.txt) |
+| [MIOpen](https://github.com/ROCmSoftwarePlatform/MIOpen/) | [MIT](https://github.com/ROCmSoftwarePlatform/MIOpen/blob/master/LICENSE.txt) |
+| [MIVisionX](https://github.com/GPUOpen-ProfessionalCompute-Libraries/MIVisionX/) | [MIT](https://github.com/GPUOpen-ProfessionalCompute-Libraries/MIVisionX/blob/master/LICENSE.txt) |
+| [RCP](https://github.com/GPUOpen-Tools/radeon_compute_profiler/) | [MIT](https://github.com/GPUOpen-Tools/radeon_compute_profiler/blob/master/LICENSE) |
+| [ROCK-Kernel-Driver](https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/) | [GPL 2.0 WITH Linux-syscall-note](https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/master/COPYING) |
+| [ROCR-Runtime](https://github.com/RadeonOpenCompute/ROCR-Runtime/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/ROCR-Runtime/blob/master/LICENSE.txt) |
+| [ROCT-Thunk-Interface](https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/) | [MIT](https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/blob/master/LICENSE.md) |
+| [ROCclr](https://github.com/ROCm-Developer-Tools/ROCclr/) | [MIT](https://github.com/ROCm-Developer-Tools/ROCclr/blob/develop/LICENSE.txt) |
+| [ROCdbgapi](https://github.com/ROCm-Developer-Tools/ROCdbgapi/) | [MIT](https://github.com/ROCm-Developer-Tools/ROCdbgapi/blob/amd-master/LICENSE.txt) |
+| [ROCgdb](https://github.com/ROCm-Developer-Tools/ROCgdb/) | [GNU General Public License v2.0](https://github.com/ROCm-Developer-Tools/ROCgdb/blob/amd-master/COPYING) |
+| [ROCm-CompilerSupport](https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/ROCm-CompilerSupport/blob/amd-stg-open/LICENSE.txt) |
+| [ROCm-Device-Libs](https://github.com/RadeonOpenCompute/ROCm-Device-Libs/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/LICENSE.TXT) |
+| [ROCm-OpenCL-Runtime/api/opencl/khronos/icd](https://github.com/KhronosGroup/OpenCL-ICD-Loader/) | [Apache 2.0](https://github.com/KhronosGroup/OpenCL-ICD-Loader/blob/main/LICENSE) |
+| [ROCm-OpenCL-Runtime](https://github.com/RadeonOpenCompute/ROCm-OpenCL-Runtime/) | [MIT](https://github.com/RadeonOpenCompute/ROCm-OpenCL-Runtime/blob/develop/LICENSE.txt) |
+| [ROCmValidationSuite](https://github.com/ROCm-Developer-Tools/ROCmValidationSuite/) | [MIT](https://github.com/ROCm-Developer-Tools/ROCmValidationSuite/blob/master/LICENSE) |
+| [Tensile](https://github.com/ROCmSoftwarePlatform/Tensile/) | [MIT](https://github.com/ROCmSoftwarePlatform/Tensile/blob/develop/LICENSE.md) |
+| [aomp-extras](https://github.com/ROCm-Developer-Tools/aomp-extras/) | [MIT](https://github.com/ROCm-Developer-Tools/aomp-extras/blob/aomp-dev/LICENSE) |
+| [aomp](https://github.com/ROCm-Developer-Tools/aomp/) | [Apache 2.0](https://github.com/ROCm-Developer-Tools/aomp/blob/aomp-dev/LICENSE) |
+| [atmi](https://github.com/RadeonOpenCompute/atmi/) | [MIT](https://github.com/RadeonOpenCompute/atmi/blob/master/LICENSE.txt) |
+| [clang-ocl](https://github.com/RadeonOpenCompute/clang-ocl/) | [MIT](https://github.com/RadeonOpenCompute/clang-ocl/blob/master/LICENSE) |
+| [flang](https://github.com/ROCm-Developer-Tools/flang/) | [Apache 2.0](https://github.com/ROCm-Developer-Tools/flang/blob/master/LICENSE.txt) |
+| [half](https://github.com/ROCmSoftwarePlatform/half/) | [MIT](https://github.com/ROCmSoftwarePlatform/half/blob/master/LICENSE.txt) |
+| [hipBLAS](https://github.com/ROCmSoftwarePlatform/hipBLAS/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipBLAS/blob/develop/LICENSE.md) |
+| [hipCUB](https://github.com/ROCmSoftwarePlatform/hipCUB/) | [Custom](https://github.com/ROCmSoftwarePlatform/hipCUB/blob/develop/LICENSE.txt) |
+| [hipFFT](https://github.com/ROCmSoftwarePlatform/hipFFT/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipFFT/blob/develop/LICENSE.md) |
+| [hipSOLVER](https://github.com/ROCmSoftwarePlatform/hipSOLVER/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipSOLVER/blob/develop/LICENSE.md) |
+| [hipSPARSELt](https://github.com/ROCmSoftwarePlatform/hipSPARSELt/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipSPARSELt/blob/develop/LICENSE.md) |
+| [hipSPARSE](https://github.com/ROCmSoftwarePlatform/hipSPARSE/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipSPARSE/blob/develop/LICENSE.md) |
+| [hipTensor](https://github.com/ROCmSoftwarePlatform/hipTensor) | [MIT](https://github.com/ROCmSoftwarePlatform/hipTensor/blob/develop/LICENSE) |
+| [hipamd](https://github.com/ROCm-Developer-Tools/hipamd/) | [MIT](https://github.com/ROCm-Developer-Tools/hipamd/blob/develop/LICENSE.txt) |
+| [hipfort](https://github.com/ROCmSoftwarePlatform/hipfort/) | [MIT](https://github.com/ROCmSoftwarePlatform/hipfort/blob/master/LICENSE) |
+| [llvm-project](https://github.com/ROCm-Developer-Tools/llvm-project/) | [Apache](https://github.com/ROCm-Developer-Tools/llvm-project/blob/main/LICENSE.TXT) |
+| [rccl](https://github.com/ROCmSoftwarePlatform/rccl/) | [Custom](https://github.com/ROCmSoftwarePlatform/rccl/blob/develop/LICENSE.txt) |
+| [rdc](https://github.com/RadeonOpenCompute/rdc/) | [MIT](https://github.com/RadeonOpenCompute/rdc/blob/master/LICENSE) |
+| [rocALUTION](https://github.com/ROCmSoftwarePlatform/rocALUTION/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocALUTION/blob/develop/LICENSE.md) |
+| [rocBLAS](https://github.com/ROCmSoftwarePlatform/rocBLAS/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocBLAS/blob/develop/LICENSE.md) |
+| [rocFFT](https://github.com/ROCmSoftwarePlatform/rocFFT/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocFFT/blob/develop/LICENSE.md) |
+| [rocPRIM](https://github.com/ROCmSoftwarePlatform/rocPRIM/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocPRIM/blob/develop/LICENSE.txt) |
+| [rocRAND](https://github.com/ROCmSoftwarePlatform/rocRAND/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocRAND/blob/develop/LICENSE.txt) |
+| [rocSOLVER](https://github.com/ROCmSoftwarePlatform/rocSOLVER/) | [BSD-2-Clause](https://github.com/ROCmSoftwarePlatform/rocSOLVER/blob/develop/LICENSE.md) |
+| [rocSPARSE](https://github.com/ROCmSoftwarePlatform/rocSPARSE/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocSPARSE/blob/develop/LICENSE.md) |
+| [rocThrust](https://github.com/ROCmSoftwarePlatform/rocThrust/) | [Apache 2.0](https://github.com/ROCmSoftwarePlatform/rocThrust/blob/develop/LICENSE) |
+| [rocWMMA](https://github.com/ROCmSoftwarePlatform/rocWMMA/) | [MIT](https://github.com/ROCmSoftwarePlatform/rocWMMA/blob/develop/LICENSE.md) |
+| [rocm-cmake](https://github.com/RadeonOpenCompute/rocm-cmake/) | [MIT](https://github.com/RadeonOpenCompute/rocm-cmake/blob/develop/LICENSE) |
+| [rocm_bandwidth_test](https://github.com/RadeonOpenCompute/rocm_bandwidth_test/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/rocm_bandwidth_test/blob/master/LICENSE.txt) |
+| [rocm_smi_lib](https://github.com/RadeonOpenCompute/rocm_smi_lib/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/rocm_smi_lib/blob/master/License.txt) |
+| [rocminfo](https://github.com/RadeonOpenCompute/rocminfo/) | [The University of Illinois/NCSA](https://github.com/RadeonOpenCompute/rocminfo/blob/master/License.txt) |
+| [rocprofiler](https://github.com/ROCm-Developer-Tools/rocprofiler/) | [MIT](https://github.com/ROCm-Developer-Tools/rocprofiler/blob/amd-master/LICENSE) |
+| [rocr_debug_agent](https://github.com/ROCm-Developer-Tools/rocr_debug_agent/) | [The University of Illinois/NCSA](https://github.com/ROCm-Developer-Tools/rocr_debug_agent/blob/master/LICENSE.txt) |
+| [roctracer](https://github.com/ROCm-Developer-Tools/roctracer/) | [MIT](https://github.com/ROCm-Developer-Tools/roctracer/blob/amd-master/LICENSE) |
+| rocm-llvm-alt | [AMD Proprietary License](https://www.amd.com/en/support/amd-software-eula)
+
+Open sourced ROCm components are released via public GitHub
+repositories, packages on https://repo.radeon.com and other distribution channels.
+Proprietary products are only available on https://repo.radeon.com. Currently, only
+one component of ROCm, rocm-llvm-alt is governed by a proprietary license.
+Proprietary components are organized in a proprietary subdirectory in the package
+repositories to distinguish from open sourced packages.
+
+The additional terms and conditions below apply to your use of ROCm technical
+documentation.
+
+©2023 Advanced Micro Devices, Inc. All rights reserved.
+
+The information presented in this document is for informational purposes only
+and may contain technical inaccuracies, omissions, and typographical errors. The
+information contained herein is subject to change and may be rendered inaccurate
+for many reasons, including but not limited to product and roadmap changes,
+component and motherboard version changes, new model and/or product releases,
+product differences between differing manufacturers, software changes, BIOS
+flashes, firmware upgrades, or the like. Any computer system has risks of
+security vulnerabilities that cannot be completely prevented or mitigated. AMD
+assumes no obligation to update or otherwise correct or revise this information.
+However, AMD reserves the right to revise this information and to make changes
+from time to time to the content hereof without obligation of AMD to notify any
+person of such revisions or changes.
+
+THIS INFORMATION IS PROVIDED “AS IS.” AMD MAKES NO REPRESENTATIONS OR WARRANTIES
+WITH RESPECT TO THE CONTENTS HEREOF AND ASSUMES NO RESPONSIBILITY FOR ANY
+INACCURACIES, ERRORS, OR OMISSIONS THAT MAY APPEAR IN THIS INFORMATION. AMD
+SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+MERCHANTABILITY, OR FITNESS FOR ANY PARTICULAR PURPOSE. IN NO EVENT WILL AMD BE
+LIABLE TO ANY PERSON FOR ANY RELIANCE, DIRECT, INDIRECT, SPECIAL, OR OTHER
+CONSEQUENTIAL DAMAGES ARISING FROM THE USE OF ANY INFORMATION CONTAINED HEREIN,
+EVEN IF AMD IS EXPRESSLY ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+
+AMD, the AMD Arrow logo, ROCm, and combinations thereof are trademarks of
+Advanced Micro Devices, Inc. Other product names used in this publication are
+for identification purposes only and may be trademarks of their respective
+companies.
+
+## Package licensing
+
+```{attention}
+AQL Profiler and AOCC CPU optimization are both provided in binary form, each
+subject to the license agreement enclosed in the directory for the binary and is
+available here: `/opt/rocm/share/doc/rocm-llvm-alt/EULA`. By using, installing,
+copying or distributing AQL Profiler and/or AOCC CPU Optimizations, you agree to
+the terms and conditions of this license agreement. If you do not agree to the
+terms of this agreement, do not install, copy or use the AQL Profiler and/or the
+AOCC CPU Optimizations.
+```
+
+For the rest of the ROCm packages, you can find the licensing information at the
+following location: `/opt/rocm/share/doc/<component-name>/`
+
+For example, you can fetch the licensing information of the `_amd_comgr_`
+component (Code Object Manager) from the `amd_comgr` folder. A file named
+`LICENSE.txt` contains the license details at:
+`/opt/rocm-5.4.3/share/doc/amd_comgr/LICENSE.txt`

docs/conf.py

@@ -0,0 +1,104 @@
+# Configuration file for the Sphinx documentation builder.
+#
+# This file only contains a selection of the most common options. For a full
+# list see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+import shutil
+
+from rocm_docs import ROCmDocs
+
+
+shutil.copy2('../CONTRIBUTING.md','./contributing.md')
+shutil.copy2('../RELEASE.md','./release.md')
+# Keep capitalization due to similar linking on GitHub's markdown preview.
+shutil.copy2('../CHANGELOG.md','./CHANGELOG.md')
+
+latex_engine = "xelatex"
+latex_elements = {
+    "fontpkg": r"""
+\usepackage{tgtermes}
+\usepackage{tgheros}
+\renewcommand\ttdefault{txtt}
+"""
+}
+
+# configurations for PDF output by Read the Docs
+project = "ROCm Documentation"
+author = "Advanced Micro Devices, Inc."
+copyright = "Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved."
+version = "5.7.0"
+release = "5.7.0"
+
+setting_all_article_info = True
+all_article_info_os = ["linux", "windows"]
+all_article_info_author = ""
+
+# pages with specific settings
+article_pages = [
+    {
+        "file":"release",
+        "os":["linux", "windows"],
+        "date":"2023-07-27"
+    },
+
+    {"file":"deploy/linux/index", "os":["linux"]},
+    {"file":"deploy/linux/install_overview", "os":["linux"]},
+    {"file":"deploy/linux/prerequisites", "os":["linux"]},
+    {"file":"deploy/linux/quick_start", "os":["linux"]},
+    {"file":"deploy/linux/install", "os":["linux"]},
+    {"file":"deploy/linux/upgrade", "os":["linux"]},
+    {"file":"deploy/linux/uninstall", "os":["linux"]},
+    {"file":"deploy/linux/package_manager_integration", "os":["linux"]},
+    {"file":"deploy/docker", "os":["linux"]},
+    
+    {"file":"deploy/windows/cli/index", "os":["windows"]},
+    {"file":"deploy/windows/cli/install", "os":["windows"]},
+    {"file":"deploy/windows/cli/uninstall", "os":["windows"]},
+    {"file":"deploy/windows/cli/upgrade", "os":["windows"]},
+    {"file":"deploy/windows/gui/index", "os":["windows"]},
+    {"file":"deploy/windows/gui/install", "os":["windows"]},
+    {"file":"deploy/windows/gui/uninstall", "os":["windows"]},
+    {"file":"deploy/windows/gui/upgrade", "os":["windows"]},
+    {"file":"deploy/windows/index", "os":["windows"]},
+    {"file":"deploy/windows/prerequisites", "os":["windows"]},
+    {"file":"deploy/windows/quick_start", "os":["windows"]},
+
+    {"file":"release/gpu_os_support", "os":["linux"]},
+    {"file":"release/windows_support", "os":["windows"]},
+    {"file":"release/docker_support_matrix", "os":["linux"]},
+    
+    {"file":"reference/gpu_libraries/communication", "os":["linux"]},
+    {"file":"reference/ai_tools", "os":["linux"]},
+    {"file":"reference/management_tools", "os":["linux"]},
+    {"file":"reference/validation_tools", "os":["linux"]},
+    {"file":"reference/framework_compatibility/framework_compatibility", "os":["linux"]},
+    {"file":"reference/computer_vision", "os":["linux"]},
+    
+    {"file":"how_to/deep_learning_rocm", "os":["linux"]},
+    {"file":"how_to/gpu_aware_mpi", "os":["linux"]},
+    {"file":"how_to/magma_install/magma_install", "os":["linux"]},
+    {"file":"how_to/pytorch_install/pytorch_install", "os":["linux"]},
+    {"file":"how_to/system_debugging", "os":["linux"]},
+    {"file":"how_to/tensorflow_install/tensorflow_install", "os":["linux"]},
+
+    {"file":"examples/machine_learning", "os":["linux"]},
+    {"file":"examples/inception_casestudy/inception_casestudy", "os":["linux"]},
+    
+    {"file":"understand/file_reorg", "os":["linux"]},
+
+    {"file":"understand/isv_deployment_win", "os":["windows"]},
+]
+
+external_toc_path = "./sphinx/_toc.yml"
+
+docs_core = ROCmDocs("ROCm 5.7.0 Documentation Home")
+docs_core.setup()
+
+external_projects_current_project = "rocm"
+
+for sphinx_var in ROCmDocs.SPHINX_VARS:
+    globals()[sphinx_var] = getattr(docs_core, sphinx_var)
+html_theme_options = {
+    "link_main_doc": False
+}

docs/contribute/building.md

@@ -0,0 +1,165 @@
+# Building Documentation
+
+While contributing, one may build the documentation locally on the command-line
+or rely on Continuous Integration for previewing the resulting HTML pages in a
+browser.
+
+## Pull Request documentation builds
+
+When opening a PR to the `develop` branch on GitHub, the page corresponding to
+the PR (`https://github.com/RadeonOpenCompute/ROCm/pull/<pr_number>`) will have
+a summary at the bottom. This requires the user be logged in to GitHub.
+
+- There, click `Show all checks` and `Details` of the Read the Docs pipeline. It
+  will take you to a URL of the form
+  `https://readthedocs.com/projects/advanced-micro-devices-rocm/builds/<some_build_num>/`
+  - The list of commands shown are the exact ones used by CI to produce a render
+    of the documentation.
+- There, click on the small blue link `View docs` (which is not the same as the
+  bigger button with the same text). It will take you to the built HTML site with
+  a URL of the form
+  `https://advanced-micro-devices-demo--<pr_number>.com.readthedocs.build/projects/alpha/en/<pr_number>/`.
+
+## Build documentation from the Command Line
+
+Python versions known to build documentation:
+
+- 3.8
+
+To build the docs locally using Python Virtual Environment (`venv`), execute the
+following commands from the project root:
+
+```sh
+python3 -mvenv .venv
+# Windows
+.venv/Scripts/python -m pip install -r docs/sphinx/requirements.txt
+.venv/Scripts/python -m sphinx -T -E -b html -d _build/doctrees -D language=en docs _build/html
+# Linux
+.venv/bin/python     -m pip install -r docs/sphinx/requirements.txt
+.venv/bin/python     -m sphinx -T -E -b html -d _build/doctrees -D language=en docs _build/html
+```
+
+Then open up `_build/html/index.html` in your favorite browser.
+
+## Build documentation using Visual Studio (VS) Code
+
+One can put together a productive environment to author documentation and also
+test it locally using VS Code with only a handful of extensions. Even though the
+extension landscape of VS Code is ever changing, here is one example setup that
+proved useful at the time of writing. In it, one can change/add content, build a
+new version of the docs using a single VS Code Task (or hotkey), see all errors/
+warnings emitted by Sphinx in the Problems pane and immediately see the
+resulting website show up on a locally-served web server.
+
+### Configuring VS Code
+
+1. Install the following extensions:
+
+    - Python `(ms-python.python)`
+    - Live Server `(ritwickdey.LiveServer)`
+
+2. Add the following entries in `.vscode/settings.json`
+
+    ```json
+    {
+      "liveServer.settings.root": "/.vscode/build/html",
+      "liveServer.settings.wait": 1000,
+      "python.terminal.activateEnvInCurrentTerminal": true
+    }
+    ```
+
+    The settings above are used for the following reasons:
+    - `liveServer.settings.root`: Sets the root of the output website for live previews. Must be changed
+      alongside the `tasks.json` command.
+    - `liveServer.settings.wait`: Tells live server to wait with the update to give time for Sphinx to
+      regenerate site contents and not refresh before all is done. (Empirical value)
+    - `python.terminal.activateEnvInCurrentTerminal`: Automatic virtual environment activation is a nice touch,
+      should you want to build the site from the integrated terminal.
+
+3. Add the following tasks in `.vscode/tasks.json`
+
+    ```json
+    {
+      "version": "2.0.0",
+      "tasks": [
+        {
+          "label": "Build Docs",
+          "type": "process",
+          "windows": {
+            "command": "${workspaceFolder}/.venv/Scripts/python.exe"
+          },
+          "command": "${workspaceFolder}/.venv/bin/python3",
+          "args": [
+            "-m",
+            "sphinx",
+            "-j",
+            "auto",
+            "-T",
+            "-b",
+            "html",
+            "-d",
+            "${workspaceFolder}/.vscode/build/doctrees",
+            "-D",
+            "language=en",
+            "${workspaceFolder}/docs",
+            "${workspaceFolder}/.vscode/build/html"
+          ],
+          "problemMatcher": [
+            {
+              "owner": "sphinx",
+              "fileLocation": "absolute",
+              "pattern": {
+                "regexp": "^(?:.*\\.{3}\\s+)?(\\/[^:]*|[a-zA-Z]:\\\\[^:]*):(\\d+):\\s+(WARNING|ERROR):\\s+(.*)$",
+                "file": 1,
+                "line": 2,
+                "severity": 3,
+                "message": 4
+              },
+            },
+            {
+              "owner": "sphinx",
+              "fileLocation": "absolute",
+              "pattern": {
+                "regexp": "^(?:.*\\.{3}\\s+)?(\\/[^:]*|[a-zA-Z]:\\\\[^:]*):{1,2}\\s+(WARNING|ERROR):\\s+(.*)$",
+                "file": 1,
+                "severity": 2,
+                "message": 3
+              }
+            }
+          ],
+          "group": {
+            "kind": "build",
+            "isDefault": true
+          }
+        },
+      ],
+    }
+    ```
+
+    > (Implementation detail: two problem matchers were needed to be defined,
+    > because VS Code doesn't tolerate some problem information being potentially
+    > absent. While a single regex could match all types of errors, if a capture
+    > group remains empty (the line number doesn't show up in all warning/error
+    > messages) but the `pattern` references said empty capture group, VS Code
+    > discards the message completely.)
+
+4. Configure Python virtual environment (`venv`)
+
+    - From the Command Palette, run `Python: Create Environment`
+      - Select `venv` environment and the `docs/sphinx/requirements.txt` file.
+      _(Simply pressing enter while hovering over the file from the drop down is
+      insufficient, one has to select the radio button with the 'Space' key if
+      using the keyboard.)_
+
+5. Build the docs
+
+    - Launch the default build Task using either:
+      - a hotkey _(default is `Ctrl+Shift+B`)_ or
+      - by issuing the `Tasks: Run Build Task` from the Command Palette.
+
+6. Open the live preview
+
+    - Navigate to the output of the site within VS Code, right-click on
+    `.vscode/build/html/index.html` and select `Open with Live Server`. The
+    contents should update on every rebuild without having to refresh the
+    browser.

docs/contribute/feedback.md

@@ -0,0 +1,27 @@
+# How to provide feedback for ROCm documentation
+
+There are four standard ways to provide feedback for this repository.
+
+## Pull Request
+
+All contributions to ROCm documentation should arrive via the
+[GitHub Flow](https://docs.github.com/en/get-started/quickstart/github-flow)
+targeting the develop branch of the repository. If you are unable to contribute
+via the GitHub Flow, feel free to email us.
+
+## GitHub Discussions
+
+To ask questions or view answers to frequently asked questions, refer to
+[GitHub Discussions](https://github.com/RadeonOpenCompute/ROCm/discussions).
+On GitHub Discussions, in addition to asking and answering questions,
+members can share updates, have open-ended conversations,
+and follow along on via public announcements.
+
+## GitHub Issue
+
+Issues on existing or absent docs can be filed as
+[GitHub Issues](https://github.com/RadeonOpenCompute/ROCm/issues).
+
+## Email
+
+Send other feedback or questions to [rocm-feedback@amd.com](rocm-feedback@amd.com)